Patents by Inventor Tetsuya Hayashi

Tetsuya Hayashi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7061027
    Abstract: An aspect of the present invention provides a semiconductor device that includes a semiconductor base made of a first semiconductor material of a first conductivity type, a hetero-semiconductor region forming a heterojunction with the semiconductor base and made of a second semiconductor material having a different band gap from the first semiconductor material, a first gate electrode arranged in the vicinity of the heterojunction, a first gate insulating film configured to insulate the first gate electrode from the semiconductor base, a source electrode formed in contact with the hetero-semiconductor region, a drain electrode formed in contact with the semiconductor base, and an electric field extending region partly facing the first gate electrode, the first gate insulating film and hetero-semiconductor region interposed between the electric field extending region and the first gate electrode, the electric field extending region extending a built-in electric field into the hetero-semiconductor region.
    Type: Grant
    Filed: March 2, 2005
    Date of Patent: June 13, 2006
    Assignee: Nissan Motor Co., Ltd.
    Inventors: Hideaki Tanaka, Masakatsu Hoshi, Tetsuya Hayashi
  • Publication number: 20060118818
    Abstract: An aspect of the present invention provides a semiconductor device that includes, a first semiconductor body of a first conductivity type, a first switching mechanism provided on the first semiconductor body, configured and arranged to switch on/off current flowing through the semiconductor device, and a first reverse-blocking heterojunction diode provided on the semiconductor body, configured and arranged to block current reverse to the current switched on/off by the first switching mechanism.
    Type: Application
    Filed: November 30, 2005
    Publication date: June 8, 2006
    Inventors: Yoshio Shimoida, Masakatsu Hoshi, Hideaki Tanaka, Tetsuya Hayashi, Toshiro Shinohara, Shigeharu Yamagami
  • Patent number: 7042086
    Abstract: A stacked semiconductor module encompasses (a) a upper switching element having a first semiconductor chip, a first top electrode disposed at a top surface of the first semiconductor chip, a first bottom electrode disposed at a bottom surface of the first semiconductor chip, and a first control electrode configured to control conduction between the first top and first bottom electrodes; (b) a first wiring plate disposed beneath the upper switching element, electrically connected to the first bottom electrode; and (c) a lower switching element disposed beneath the wiring plate, having a second semiconductor chip, a second top electrode disposed at a top surface of the second semiconductor chip, electrically connected to the first wiring plate, a second bottom electrode disposed at a bottom surface of the second semiconductor chip, and a second control electrode configured to control conduction between the second top and second bottom electrodes.
    Type: Grant
    Filed: October 6, 2003
    Date of Patent: May 9, 2006
    Assignee: Nissan Motor Co., Ltd.
    Inventors: Yoshio Shimoida, Toshiro Shinohara, Tetsuya Hayashi, Masanori Yamagiwa
  • Patent number: 7033083
    Abstract: A support structure carries a thrust load of a transmission which includes a torque converter having an impeller and a turbine opposite to each other with a stator therebetween. A thrust needle roller bearing having needle rollers arranged in two rows is provided at, at least one of places respectively between the stator and the impeller and between the stator and the turbine. The support structure carrying a thrust load of the transmission, a method of manufacturing the support structure and the thrust needle roller bearing are thus obtained, with an improvement in inflow and outflow of a lubricating oil, a reduction of the differential slip of the needle rollers, and an improvement in strength durability.
    Type: Grant
    Filed: November 5, 2003
    Date of Patent: April 25, 2006
    Assignee: NTN Corporation
    Inventors: Kousuke Obayashi, Tetsuya Hayashi, Shinji Oishi
  • Publication number: 20060068537
    Abstract: A method of manufacturing a semiconductor device having: forming a hetero semiconductor layer on at least the major surface of the semiconductor substrate body of a first conductivity type; etching the hetero semiconductor layer selectively by use of a mask layer having openings in way that the hetero semiconductor layer remains to be not etched with a predetermined thickness; oxidizing an exposed parts of the hetero semiconductor layer; forming the hetero semiconductor region by etching a oxidized film formed in the oxidizing; and forming the gate insulating film in a way that the gate insulating film makes an intimate contact with the hetero semiconductor region and the semiconductor substrate body. The bandgap of the hetero semiconductor layer is different from that of the semiconductor substrate body.
    Type: Application
    Filed: September 22, 2005
    Publication date: March 30, 2006
    Inventors: Tetsuya Hayashi, Masakatsu Hoshi, Yoshio Shimoida, Hideaki Tanaka
  • Publication number: 20060060917
    Abstract: An aspect of the present invention provides a method of manufacturing a semiconductor device, the method including a first process to form a second hetero-semiconductor layer on a principal surface of the semiconductor base, a second process to etch selectively the second hetero-semiconductor layer to form the second hetero-semiconductor region employing a mask layer provided with a predetermined opening, a third process to form employing the mask layer, a first hetero-semiconductor layer, a fourth process to etch selectively the first hetero-semiconductor layer to form the first hetero-semiconductor region, and a fifth process to form the gate insulating film in contact with the first hetero-semiconductor region and the semiconductor base.
    Type: Application
    Filed: September 2, 2005
    Publication date: March 23, 2006
    Inventors: Tetsuya Hayashi, Masakatsu Hoshi, Hideaki Tanaka, Yoshio Shimoida
  • Publication number: 20060051663
    Abstract: A lithium ion secondary battery including: an electrode group including a belt-like positive electrode and a belt-like negative electrode that are wound with a separator interposed therebetween; and a can with a bottom for accommodating the electrode group, wherein the positive electrode has a positive electrode current collector and a positive electrode mixture layer carried on the positive electrode current collector, the negative electrode has a negative electrode current collector and a negative electrode mixture layer carried on the negative electrode current collector, and a porous heat-resistant layer is partially provided between the separator and at least one of the positive electrode mixture layer and the negative electrode mixture layer. Since a porous heat-resistant layer is thus placed, a high performance lithium ion secondary battery capable of efficiently preventing internal short circuit due to overheating while preventing decrease in battery characteristics can be provided.
    Type: Application
    Filed: August 30, 2005
    Publication date: March 9, 2006
    Inventors: Hideaki Fujita, Tsuyoshi Hatanaka, Tetsuya Hayashi, Akira Nagasaki, Yusuke Fukumoto, Kohei Suzuki
  • Patent number: 7005704
    Abstract: An aspect of the present invention provides a semiconductor device includes that a drain region of a first conductivity type formed in a semiconductor substrate, a source region of the first conductivity type, an insulating film in contact with the source region, a gate electrode insulated from the source region by the insulating film, and a base region of a second conductivity type electrically connected to the gate electrode and in contact with the drain region, wherein majority carriers flow between the source region and the drain region before minority carriers are introduced from the base region into the drain region when a predetermined potential is applied to the gate electrode.
    Type: Grant
    Filed: June 4, 2004
    Date of Patent: February 28, 2006
    Assignee: Nissan Motor Co., Ltd.
    Inventors: Tetsuya Hayashi, Masakatsu Hoshi, Saichirou Kaneko, Hideaki Tanaka
  • Publication number: 20050224838
    Abstract: An aspect of the present invention provides a semiconductor device that includes a semiconductor base essentially made of a first semiconductor material of a first conductivity type, a hetero-semiconductor region essentially made of a second semiconductor material whose band gap is different from that of the first semiconductor material, formed on the semiconductor base, and forming a heterojunction with the semiconductor base, a cathode electrode formed in contact with the semiconductor base, and an anode electrode formed in contact with the hetero-semiconductor region, wherein the first semiconductor material is a silicon-carbide (SiC) single crystal and the heterojunction is formed on a {0001-} crystal face of the silicon-carbide single crystal.
    Type: Application
    Filed: April 1, 2005
    Publication date: October 13, 2005
    Inventors: Hideaki Tanaka, Masakatsu Hoshi, Tetsuya Hayashi
  • Publication number: 20050199873
    Abstract: An aspect of the present invention provides a semiconductor device that includes a semiconductor base made of a first semiconductor material of a first conductivity type, a hetero-semiconductor region forming a heterojunction with the semiconductor base and made of a second semiconductor material having a different band gap from the first semiconductor material, a first gate electrode arranged in the vicinity of the heterojunction, a first gate insulating film configured to insulate the first gate electrode from the semiconductor base, a source electrode formed in contact with the hetero-semiconductor region, a dram electrode formed in contact with the semiconductor base, and an electric field extending region partly facing the first gate electrode, the first gate insulating film and hetero-semiconductor region interposed between the electric field extending region and the first gate electrode, the electric field extending region extending a built-in electric field into the hetero-semiconductor region.
    Type: Application
    Filed: March 2, 2005
    Publication date: September 15, 2005
    Inventors: Hideaki Tanaka, Masakatsu Hoshi, Tetsuya Hayashi
  • Publication number: 20050133794
    Abstract: A semiconductor device includes a heterojunction semiconductor region 9, which forms a heterojunction with a drain region 2. The heterojunction semiconductor region 9 is connected to a source electrode 7, and has a band gap different from a band gap of a semiconductor substrate constituting the drain region 2. It is possible to set the size of an energy barrier against conduction electrons, which is formed between the drain region 2 and the heterojunction semiconductor region 9, into a desired size by changing the conductivity type or the impurity density of the heterojunction semiconductor region 9. This is a characteristic not found in a Schottky junction, in which the size of the energy barrier is inherently determined by a work function of a metal material. It is easy to achieve optimal design of a passive element in response to a withstand voltage system of a MOSFET as a switching element.
    Type: Application
    Filed: December 16, 2004
    Publication date: June 23, 2005
    Inventors: Tetsuya Hayashi, Masakatsu Hoshi, Saichirou Kaneko, Hideaki Tanaka
  • Patent number: 6893773
    Abstract: A power generation element is stored in an inner space formed by combining a battery case (2) and a seal case (3) formed as a half-shell body with a rectangular plane shape such that the individual openings are placed opposing to each other with a gasket (4) interposed therebetween, and the gasket (4) is pressed between the open end of the battery case (2) and a step (35) of the seal case (3) for sealing during caulking. Because recesses (36) are formed on the individual peripheral edges of a bottom surface (31) of the seal case (3), the strength of straight parts of a seal-case side-peripheral surface (32) of the seal case (3) increases against a seal pressure during caulking, and a decrease of seal capability caused by the straight parts bulging toward the outside during sealing is prevented.
    Type: Grant
    Filed: October 4, 2001
    Date of Patent: May 17, 2005
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Tetsuya Hayashi, Makoto Nakanishi, Kunihiko Bessho
  • Publication number: 20050095505
    Abstract: A lithium ion secondary battery has an electrode group including: a winding core; and a positive electrode and a negative electrode that are wound around the winding core. This electrode group does not have an independent separator between the positive and negative electrodes. A porous film is integrally formed on both sides of at least one of the positive electrode and the negative electrode. The negative electrode and the positive electrode are connected to the winding core by a negative electrode resin film and a positive electrode resin film, respectively. The use of such resin films makes it possible to reduce the breakage of the porous films and prevent a short-circuit between the positive and negative electrodes.
    Type: Application
    Filed: October 27, 2004
    Publication date: May 5, 2005
    Inventors: Tsumoru Ohata, Shigeo Ikuta, Akiko Fujino, Tetsuya Hayashi, Kohei Suzuki
  • Publication number: 20050069214
    Abstract: An image compression device provided for effective utilization of the memory used for image storage and for attaining a reduction in the compression processing time of an image. An image quality evaluation value calculation section calculates the image quality evaluation value of the block for image quality evaluation value calculation which is compressed using four quantization tables in which the quantized data in each is different. A quantization table selection section calculates an approximation curve for approximations or supplies the image quality evaluation value of the block for image quality evaluation value calculation for each quantization table and from the calculated approximation curve further calculates a standard table value for practicable compression to reduce the file size without deterioration of the image quality. Subsequently, a quantization section compresses the original image data using the quantization table with the calculated standard table value.
    Type: Application
    Filed: September 27, 2004
    Publication date: March 31, 2005
    Applicant: Casio Computer Co., Ltd.
    Inventor: Tetsuya Hayashi
  • Publication number: 20050062048
    Abstract: An aspect of the present invention provides a semiconductor device that includes a first conductivity type semiconductor body, a source region in contact with the semiconductor body, whose bandgap is different from that of the semiconductor body, and which formed heterojunction with the semiconductor body, a gate insulating film in contact with a portion of junction between the source region and the semiconductor body, a gate electrode in contact with the gate insulating film, a source electrode, a low resistance region in contact with the source electrode and the source region, and connected ohmically with the source electrode, and a drain electrode connected ohmically with the semiconductor body.
    Type: Application
    Filed: September 23, 2004
    Publication date: March 24, 2005
    Inventors: Tetsuya Hayashi, Hideaki Tanaka, Masakatsu Hoshi, Saichirou Kaneko
  • Publication number: 20050045892
    Abstract: An aspect of the present invention provides a semiconductor device that includes a first semiconductor region of a first conductivity type and a second semiconductor region of a second conductivity type, having a different band gap from the first semiconductor region and forming a heterojunction with the first semiconductor region.
    Type: Application
    Filed: July 26, 2004
    Publication date: March 3, 2005
    Inventors: Tetsuya Hayashi, Hideaki Tanaka, Masakatsu Hoshi, Saichirou Kaneko
  • Publication number: 20050031952
    Abstract: A power generation element is stored in an inner space formed by combining a battery case (2) and a seal case (3) formed as a half-shell body with a rectangular plane shape such that the individual openings are placed opposing to each other with a gasket (4) interposed therebetween, and the gasket (4) is pressed between the open end of the battery case (2) and a step (35) of the seal case (3) for sealing during caulking. Because recesses (36) are formed on the individual peripheral edges of a bottom surface (31) of the seal case (3), the strength of straight parts of a seal-case side-peripheral surface (32) of the seal case (3) increases against a seal pressure during caulking, and a decrease of seal capability caused by the straight parts bulging toward the outside during sealing is prevented.
    Type: Application
    Filed: September 8, 2004
    Publication date: February 10, 2005
    Applicant: Matsushita Electric Industrial Co., Ltd.
    Inventors: Tetsuya Hayashi, Makoto Nakanishi, Kunihiko Bessho
  • Publication number: 20050012143
    Abstract: An aspect of the present invention provides a semiconductor device that includes a semiconductor base including, a semiconductor substrate of a first conductivity type and a drain region of the first conductivity type formed on the semiconductor substrate and having a lower impurity concentration than the semiconductor substrate, a gate electrode insulated from the semiconductor base by a gate insulating film, the gate electrode made of a semiconductor material, a built-in potential difference between a region and the gate electrode made of the semiconductor material is greater than that of polysilicon having as high impurity concentration as possible, the region is a part of the drain region adjacent to the gate electrode through the gate insulating film.
    Type: Application
    Filed: June 22, 2004
    Publication date: January 20, 2005
    Inventors: Hideaki Tanaka, Masakatsu Hoshi, Tetsuya Hayashi, Saichirou Kaneko
  • Publication number: 20040251503
    Abstract: An aspect of the present invention provides a semiconductor device includes that a drain region of a first conductivity type formed in a semiconductor substrate, a source region of the first conductivity type, an insulating film in contact with the source region, a gate electrode insulated from the source region by the insulating film, and a base region of a second conductivity type electrically connected to the gate electrode and in contact with the drain region, wherein majority carriers flow between the source region and the drain region before minority carriers are introduced from the base region into the drain region when a predetermined potential is applied to the gate electrode.
    Type: Application
    Filed: June 4, 2004
    Publication date: December 16, 2004
    Applicant: NISSAN MOTOR CO., LTD.
    Inventors: Tetsuya Hayashi, Masakatsu Hoshi, Saichirou Kaneko, Hideaki Tanaka
  • Publication number: 20040240845
    Abstract: The present invention relates to edition of motion picture data and produces desired results using precise settings while allowing an editing apparatus to be easily operated. The present apparatus includes a memory card or a built-in memory which stores motion picture data, a display section which displays an image, and a control section which reproduces the stored motion picture data to display the reproduced data on the display section and which operates in response to an input from a key input section instructing on an edition point position at an arbitrary time during reproduction of a motion picture, to use the edition point position as a base point to store an amount of the motion picture data corresponding to a predetermined time.
    Type: Application
    Filed: May 20, 2004
    Publication date: December 2, 2004
    Applicant: Casio Computer Co., Ltd.
    Inventor: Tetsuya Hayashi