Abstract: A display device includes a substrate having display portion and peripheral portion, a plurality of gate signal lines and a plurality of drain signal lines formed over the substrate, a plurality of switching elements connected to the plurality of gate signal lines and the plurality of drain signal lines and formed over the substrate, and a plurality of pixel electrodes connected to the plurality of switching elements and formed in the display portion. An organic interlayer film is formed in the display portion and the peripheral portion, and a covering layer is formed on the organic interlayer film in the peripheral portion and the insulating film includes at least one of a plurality of recesses and protuberances.

Abstract: A region surrounded by two gate wiring and two drain wiring includes pixels and when there is a defect of short-circuit in adjacent pixel electrodes, the short-circuited portion is removed by irradiating a laser via a mask having a transmission pattern, which corresponds to a pattern of the gate wiring, drain wiring and pixel electrodes in the short-circuited portion. The above short-circuited portion is identified and removed in comparison to a normal pattern, by use of information from an inspection apparatus, and the pattern defect formed on the substrate is automatically repaired. By applying the above method to a manufacturing process of display apparatus, in particular, to a resist pattern forming process, a display apparatus having a highly qualified display property may be achieved.

Abstract: In one embodiment, a liquid crystal display device includes a first substrate, a second substrate and a liquid crystal layer held between the first and second substrates. The first substrate includes a first insulating substrate, and a pixel electrode and a counter electrode formed on the first insulating substrate. The second substrate includes a second insulating substrate. A first light shield layer is formed on a surface of the second insulating substrate apart from an end of the second insulating substrate opposing to the first substrate, and having a frame portion in a frame shape. Furthermore, a second light shield layer is arranged adjoining the first light shield layer extending up to the end of the second insulating substrate opposing to the first substrate. A third light shield layer to shield light is provided between the first light shield layer and second light shield layer.

Abstract: Provided is a TFT board for a liquid crystal display device including: a circuit layer formed on a substrate, the circuit layer including a thin film transistor including a semiconductor layer, a gate electrode, a drain electrode, and a source electrode; and a color filter layer formed on the circuit layer. The color filter layer has a through hole formed therein above the semiconductor layer in a region between the source electrode and the drain electrode.

Abstract: In one embodiment, a liquid crystal display device having a plurality of pixels includes a first substrate having an insulating substrate, a first detection element extending in a first direction above the insulating substrate, a second detection element extending in a second direction crossing the first direction and an insulating film provided between the first and second detection circuits. A second substrate is arranged opposing to the first substrate so as to hold a liquid crystal layer therebetween. A detection circuit is provided on the first substrate to detect change of electrostatic capacitance between the first and second detection elements. At least one of the first and second detection elements is an element required for operating the liquid crystal layer.

Abstract: A liquid crystal display device includes an array substrate, a counter substrate and a liquid crystal layer held between the array substrate and the counter substrate. A display portion having a plurality of pixels arranged in a matrix is formed of the substrates and the liquid crystal layer. Each of the pixels includes a pixel electrode and a counter electrode arranged opposing to the pixel electrode. A driving portion is formed on the array substrate to supply a pixel voltage to the pixel electrode. A correcting circuit is formed on the array substrate to correct the voltage supplied to the pixel electrode by adding a predetermined DC voltage to the voltage supplied to the pixel electrode corresponding to gradations to be displayed in the pixel.

Abstract: Provided is a manufacturing method for a liquid crystal display device, in which a semiconductor pattern and a metal pattern are formed so that the semiconductor pattern includes a first portion formed under the metal pattern and a second portion which outwardly extends off the metal pattern from the first portion. An insulating layer for covering the metal pattern and the semiconductor pattern is formed. The insulating layer is subjected to etching in a first region located above the metal pattern and in a second region located above at least the second portion of the semiconductor pattern. In the etching step, the insulating layer in the first region is subjected to etching to form a through hole for electrical connection to the metal pattern, and the insulating layer and the semiconductor pattern in the second region are subjected to etching to remove the second portion of the semiconductor pattern.

Abstract: An etching resist including first and second portions, the first portion being thicker than the second portion, is formed on a metallic layer. Through the etching resist, a semiconductor layer and the metallic layer are patterned by etching so as to form a wiring from the metallic layer and leave the semiconductor layer under the wiring. An electrical test is conducted on the wiring. The second portion is removed while the first portion is left unremoved. Selective etching is performed through the first portion so as to leave the semiconductor layer unetched to pattern the wiring to be divided into drain and source electrodes. A substrate is cut. In patterning the wiring, the wiring is etched to be cut at a position closer to a cutting line of the substrate with respect to the drain and source electrodes, while leaving the semiconductor layer unetched.

Abstract: A display device includes: a first line and a second line which are arranged adjacent to and parallel to each other in a spaced-apart manner; a conductive layer which is arranged at a position where the conductive layer overlaps with the first line and the second line; and an insulation layer which is interposed between the first and second lines and the conducive layer. Here, the conductive layer includes a first overlapping portion which overlaps with the first line, a second overlapping portion which overlaps with the second line, and a connecting portion which connects the first overlapping portion and the second overlapping portion between the first overlapping portion and the second overlapping portion.

Abstract: A liquid crystal display device includes pixels, each of which includes a first transistor and a second transistor. The size of the first transistor is larger than the size of the second transistor. In addition, channel widths and gate widths for the first transistor are larger than those of the second transistor. Also, the first transistor is located to be closer to a drain signal line provided for the pixel than the second transistor. In normal operation, the first transistor is coupled to the drain signal line and the second transistor is floating. However, if an abnormality occurs in the first transistor, it is cut off from the drain signal line and the second transistor is connected to the drain signal line by a repair line.

Abstract: A normal transistor CTFT connected to a data signal line DL and a pixel electrode PX and a spare transistor FTFT in a floating state are formed on a gate line GL. When an operational abnormality occurs in the normal transistor CTFT, the normal transistor CTFT is cut off from the data signal line DL and is cut off from the pixel electrode PX connected via a through hole TH by cutting lines CL. Thereafter, the spare transistor FTFT is connected to the data signal line DL and the pixel electrode PX by repair lines RL.

Abstract: A display device has a pair of substrates arranged opposite to each other, a light modulation layer interposed between the pair of substrates, and spacers arranged between the pair of substrates to maintain a gap therebetween. A display area is formed by the pair of substrates, the modulation layer and the spacers, and includes a plurality of pixels arranged in rows and columns of a matrix. The spacers are arranged between adjacent pixels in the column direction so that an area density of the spacers continuously changes from an edge portion to a predetermined portion in the display area extending in the row direction.

Abstract: A liquid crystal display includes pixels each having an switching element, drain drivers and gate drivers for operating the switching elements and the pixels, and drain lines and gate lines supplying signals from the drain drivers and the gate drivers to the switching elements being formed on one of a pair of substrates sandwiching a liquid crystal layer. Wiring lines are formed on the one of a pair of substrates for transferring display data signals and a clock signal to the gate drivers.

Abstract: A circuit array substrate includes an optically transparent substrate, pixels having switching elements formed on the transparent substrate, gate electrode lines connected to the switching elements, the gate electrode lines being provided on a first insulation film with separating portions in the pixels, signal lines connected to the switching elements, the signal lines being provided on a second insulation film which is different from the first insulation film, and electrically conductive portions provided on the second film to electrically connect the electrode lines with the separating portions to each other. The separating portions reduce electrostatic capacitances defined between the gate electrode lines and the switching elements when the conductive portions are not connected between the separating portions.

Abstract: A thin-film transistor substrate includes a pixel region where gate electrode lines are arranged on an insulating substrate sandwiching semiconductor layer patterns and a gate insulator with the insulating substrate, wherein shapes of the semiconductor patterns and the gate electrode lines are set so that a value of K obtained by the following equation is smaller than a first set value when the thin-film transistor substrate is mounted on a metal table: K=(L/Ce)×{Ca/(Ca+Cb)}×S where Ca represents a capacitor between each of the semiconductor layer patterns and the metal table, Cb represents a capacitor between each of the semiconductor layer patterns and the gate electrode lines, Ce represents a capacitor between each of the gate electrode lines and the metal table, L represents a length of each of the gate electrode line, and S represents a substrate surface area that one of the gate electrode lines are in charge of per unit length.

Abstract: To suppress occurrence of low temperature bubbles while securing pressure resistance to external forces applied to substrates of a liquid crystal display device, a plurality of spacers disposed between the substrates are divided into a plurality of spacer groups 2, one unit of which is configured with spacers 2a, 2b allocated in close proximity to each other; and the spacer groups 2 are disposed with a density that the low temperature bubbles do not occur. Hence, the strength of the substrates increases, and in a region 10 where no spacers exist, a large deformation of the substrates by shrinkage is allowed, and a liquid crystal layer 8 is sufficiently enough shrunk even under a low temperature environment to prevent the low temperature bubbles from occurring.

Abstract: A display device includes a substrate having display portion and peripheral portion, a plurality of gate signal lines and a plurality of drain signal lines formed over the substrate, a plurality of switching elements connected to the plurality of gate signal lines and the plurality of drain signal lines and formed over the substrate, and a plurality of pixel electrodes connected to the plurality of switching elements and formed in the display portion. An organic interlayer film is formed in the display portion and the peripheral portion, and a covering layer is formed on the organic interlayer film in the peripheral portion and the insulating film includes at least one of a plurality of recesses and protuberances.

Abstract: A liquid crystal display includes pixels each having an switching element, drain drivers and gate drivers for operating the switching elements and the pixels, and drain lines and gate lines supplying signals from the drain drivers and the gate drivers to the switching elements being formed on one of a pair of substrates sandwiching a liquid crystal layer. Wiring lines are formed on the one of a pair of substrates for transferring display data signals and a clock signal to the gate drivers.

Abstract: A thin-film transistor substrate includes a pixel region where gate electrode lines are arranged on an insulating substrate sandwiching semiconductor layer patterns and a gate insulator with the insulating substrate, wherein shapes of the semiconductor patterns and the gate electrode lines are set so that a value of K obtained by the following equation is smaller than a first set value when the thin-film transistor substrate is mounted on a metal table: K=(L/Ce)×{Ca/(Ca+Cb)}×S where Ca represents a capacitor between each of the semiconductor layer patterns and the metal table, Cb represents a capacitor between each of the semiconductor layer patterns and the gate electrode lines, Ce represents a capacitor between each of the gate electrode lines and the metal table, L represents a length of each of the gate electrode line, and S represents a substrate surface area that one of the gate electrode lines are in charge of per unit length.

Abstract: A normal transistor CTFT connected to a data signal line DL and a pixel electrode PX and a spare transistor FTFT in a floating state are formed on a gate line GL. When an operational abnormality occurs in the normal transistor CTFT, the normal transistor CTFT is cut off from the data signal line DL and is cut off from the pixel electrode PX connected via a through hole TH by cutting lines CL. Thereafter, the spare transistor FTFT is connected to the data signal line DL and the pixel electrode PX by repair lines RL.