Patents by Inventor Tetsuya Otsuki

Tetsuya Otsuki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20110210408
    Abstract: A sensor device includes: a silicon substrate; a first electrode provided at an active surface side of the silicon substrate; an external connection terminal provided at the active surface side so as to be electrically connected to the first electrode; a stress relief layer provided between the silicon substrate and the external connection terminal; and a vibrating gyro element as a sensor element including a extraction electrode. The vibrating gyro element is held to the silicon substrate by connection between the extraction electrode and the external connection terminal.
    Type: Application
    Filed: March 1, 2011
    Publication date: September 1, 2011
    Applicant: SEIKO EPSON CORPORATION
    Inventor: Tetsuya OTSUKI
  • Publication number: 20100302756
    Abstract: A method of manufacturing an electronic device, the method includes: preparing a first lead frame having a first lead, the first lead having a first portion located in a first region; electrically connecting the first lead and a first electronic part; bending the first lead such that the first portion is located outside the first region; arranging a second lead frame to overlap the first lead frame such that a second portion of a second lead of the second lead frame is located in the first region; and electrically connecting the second lead and the second electronic part.
    Type: Application
    Filed: May 25, 2010
    Publication date: December 2, 2010
    Applicant: SEIKO EPSON CORPORATION
    Inventor: Tetsuya OTSUKI
  • Publication number: 20100102423
    Abstract: A semiconductor device manufacturing method includes (a) bonding a first surface of a metal plate to a substrate, (b) forming a plurality of metal posts that are arranged in vertical and lateral directions in a plan view and include a first metal post and a second metal post, by partially etching the metal plate bonded to the substrate from a second surface of the metal plate, (c) fixing an integrated circuit (IC) element to the second surface of the first metal post, (d) coupling the second metal post and a pad terminal of the integrated circuit element via a conductive material, (e) resin-sealing the integrated circuit element, the metal posts, and the conductive material by providing a resin onto the substrate, and (f) removing the substrate from the resin and the first surfaces of the metal posts sealed using the resin.
    Type: Application
    Filed: December 28, 2009
    Publication date: April 29, 2010
    Applicant: SEIKO EPSON CORPORATION
    Inventor: Tetsuya OTSUKI
  • Patent number: 7696082
    Abstract: A semiconductor device manufacturing method includes (a) bonding a first surface of a metal plate to a substrate, (b) forming a plurality of metal posts that are arranged in vertical and lateral directions in a plan view and include a first metal post and a second metal post, by partially etching the metal plate bonded to the substrate from a second surface of the metal plate, (c) fixing an integrated circuit (IC) element to the second surface of the first metal post, (d) coupling the second metal post and a pad terminal of the integrated circuit element via a conductive material, (e) resin-sealing the integrated circuit element, the metal posts, and the conductive material by providing a resin onto the substrate, and (f) removing the substrate from the resin and the first surfaces of the metal posts sealed using the resin.
    Type: Grant
    Filed: January 17, 2008
    Date of Patent: April 13, 2010
    Assignee: Seiko Epson Corporation
    Inventor: Tetsuya Otsuki
  • Patent number: 7541278
    Abstract: A first conductive layer is formed. An insulating layer is formed so that at least a part of the insulating layer is disposed on the first conductive layer. A second conductive layer is formed so that at least a part of the second conductive layer is disposed on the insulating layer over the first conductive layer. Each of the first and second conductive layers is formed by discharging drops of a solvent containing fine particles of a conductive material. The insulating layer is formed by discharging drops of a solvent containing fine particles of an insulating material.
    Type: Grant
    Filed: July 17, 2008
    Date of Patent: June 2, 2009
    Assignee: Seiko Epson Corporation
    Inventor: Tetsuya Otsuki
  • Publication number: 20080293239
    Abstract: A first conductive layer is formed. An insulating layer is formed so that at least a part of the insulating layer is disposed on the first conductive layer. A second conductive layer is formed so that at least a part of the second conductive layer is disposed on the insulating layer over the first conductive layer. Each of the first and second conductive layers is formed by discharging drops of a solvent containing fine particles of a conductive material. The insulating layer is formed by discharging drops of a solvent containing fine particles of an insulating material.
    Type: Application
    Filed: July 17, 2008
    Publication date: November 27, 2008
    Applicant: Seiko Epson Corporation
    Inventor: Tetsuya Otsuki
  • Patent number: 7413975
    Abstract: A first conductive layer is formed. An insulating layer is formed so that at least a part of the insulating layer is disposed on the first conductive layer. A second conductive layer is formed so that at least a part of the second conductive layer is disposed on the insulating layer over the first conductive layer. Each of the first and second conductive layers is formed by discharging drops of a solvent containing fine particles of a conductive material. The insulating layer is formed by discharging drops of a solvent containing fine particles of an insulating material.
    Type: Grant
    Filed: April 7, 2006
    Date of Patent: August 19, 2008
    Assignee: Seiko Epson Corporation
    Inventor: Tetsuya Otsuki
  • Publication number: 20080174012
    Abstract: A semiconductor device manufacturing method includes (a) bonding a first surface of a metal plate to a substrate, (b) forming a plurality of metal posts that are arranged in vertical and lateral directions in a plan view and include a first metal post and a second metal post, by partially etching the metal plate bonded to the substrate from a second surface of the metal plate, (c) fixing an integrated circuit (IC) element to the second surface of the first metal post, (d) coupling the second metal post and a pad terminal of the integrated circuit element via a conductive material, (e) resin-sealing the integrated circuit element, the metal posts, and the conductive material by providing a resin onto the substrate, and (f) removing the substrate from the resin and the first surfaces of the metal posts sealed using the resin.
    Type: Application
    Filed: January 17, 2008
    Publication date: July 24, 2008
    Applicant: SEIKO EPSON CORPORATION
    Inventor: Tetsuya OTSUKI
  • Patent number: 7372167
    Abstract: A semiconductor device according to claim 1, wherein A method of manufacturing a semiconductor chip the carrier substrate A semiconductor device includes; a carrier substrate in which a semiconductor chip is mounted; a first land that is mounted on the carrier substrate and placed on a region which is differ from a region for mounting the semiconductor chip, and a basis metal of an junction surface of the first land is exposed; and a second land that is mounted on the carrier substrate and placed on a region which is differ from a region for mounting the semiconductor chip, and a plating layer is deposited on a junction surface of the second land.
    Type: Grant
    Filed: August 30, 2005
    Date of Patent: May 13, 2008
    Assignee: Seiko Epson Corporation
    Inventor: Tetsuya Otsuki
  • Publication number: 20070094870
    Abstract: A receiving layer formed of a thermoplastic resin is softened by applying heat. By using a solvent containing conductive particles, an interconnect layer is formed on the receiving layer which is softened by the application of heat. The conductive particles are bonded together by heating the interconnect layer.
    Type: Application
    Filed: December 15, 2006
    Publication date: May 3, 2007
    Applicant: Seiko Epson Corporation
    Inventors: Tetsuya Otsuki, Hirofumi Kurosawa, Hiroshi Miki
  • Patent number: 7189598
    Abstract: A receiving layer is formed from a thermosetting resin precursor. An interconnecting layer is formed on the receiving layer from a dispersion liquid containing conductive particles. Heat is applied to the receiving layer and the interconnecting layer to cure the thermosetting resin precursor and to bond the conductive particles together.
    Type: Grant
    Filed: March 2, 2004
    Date of Patent: March 13, 2007
    Assignee: Seiko Epson Corporation
    Inventors: Tetsuya Otsuki, Hirofumi Kurosawa, Hiroshi Miki
  • Publication number: 20060165875
    Abstract: A first conductive layer is formed. An insulating layer is formed so that at least a part of the insulating layer is disposed on the first conductive layer. A second conductive layer is formed so that at least a part of the second conductive layer is disposed on the insulating layer over the first conductive layer. Each of the first and second conductive layers is formed by discharging drops of a solvent containing fine particles of a conductive material. The insulating layer is formed by discharging drops of a solvent containing fine particles of an insulating material.
    Type: Application
    Filed: April 7, 2006
    Publication date: July 27, 2006
    Applicant: Seiko Epson Corporation
    Inventor: Tetsuya Otsuki
  • Publication number: 20060049510
    Abstract: A semiconductor device according to claim 1, wherein A method of manufacturing a semiconductor chip the carrier substrate A semiconductor device includes; a carrier substrate in which a semiconductor chip is mounted; a first land that is mounted on the carrier substrate and placed on a region which is differ from a region for mounting the semiconductor chip, and a basis metal of an junction surface of the first land is exposed; and a second land that is mounted on the carrier substrate and placed on a region which is differ from a region for mounting the semiconductor chip, and a plating layer is deposited on a junction surface of the second land.
    Type: Application
    Filed: August 30, 2005
    Publication date: March 9, 2006
    Applicant: Seiko Epson Corporation
    Inventor: Tetsuya Otsuki
  • Publication number: 20060049519
    Abstract: A semiconductor device, comprises: a carrier substrate in which a semiconductor chip is mounted; and a land formed in the carrier substrate and arranged in a region different from the mounting face of the semiconductor chip, wherein a coarse face, the surface roughness of which is 20 through 100 ?m, is formed in a bonding face of the land.
    Type: Application
    Filed: August 26, 2005
    Publication date: March 9, 2006
    Applicant: Seiko Epson Corporation
    Inventor: Tetsuya Otsuki
  • Publication number: 20040241903
    Abstract: A receiving layer is formed from a thermosetting resin precursor. An interconnecting layer is formed on the receiving layer from a dispersion liquid containing conductive particles. Heat is applied to the receiving layer and the interconnecting layer to cure the thermosetting resin precursor and to bond the conductive particles together.
    Type: Application
    Filed: March 2, 2004
    Publication date: December 2, 2004
    Inventors: Tetsuya Otsuki, Hirofumi Kurosawa, Hiroshi Miki
  • Publication number: 20040237296
    Abstract: A receiving layer formed of a thermoplastic resin is softened by applying heat. By using a solvent containing conductive particles, an interconnect layer is formed on the receiving layer which is softened by the application of heat. The conductive particles are bonded together by heating the interconnect layer.
    Type: Application
    Filed: March 2, 2004
    Publication date: December 2, 2004
    Inventors: Tetsuya Otsuki, Hirofumi Kurosawa, Hiroshi Miki
  • Publication number: 20040135269
    Abstract: A first conductive layer is formed. An insulating layer is formed so that at least a part of the insulating layer is disposed on the first conductive layer. A second conductive layer is formed so that at least a part of the second conductive layer is disposed on the insulating layer over the fist conductive layer. Each of the first and second conductive layers is formed by discharging drops of a solvent containing fine particles of a conductive material. The insulating layer is formed by discharging drops of a solvent containing fine particles of an insulating material.
    Type: Application
    Filed: July 23, 2003
    Publication date: July 15, 2004
    Applicant: Seiko Epson Corporation
    Inventor: Tetsuya Otsuki
  • Patent number: 6595685
    Abstract: An apparatus and method for measuring thermophysical property value of a specimen. The apparatus includes a heating laser and probe laser for measuring at least one characteristic on the surface of the specimen. A detector detects the reflected probe laser beam, and a computer calculates the thermophysical property value of the specimen based on the reflected probe laser beam.
    Type: Grant
    Filed: October 13, 1999
    Date of Patent: July 22, 2003
    Assignees: National Research Laboratory of Metrology, Kabushiki Kaisha Bethel
    Inventors: Tetsuya Baba, Naoyuki Taketoshi, Kimihito Hatori, Tetsuya Otsuki
  • Publication number: 20020131476
    Abstract: An apparatus and method for measuring thermophysical property value of a specimen. The apparatus includes a heating laser and probe laser for ? on the surface of the specimen. A detector detects the reflected probe laser beam, and a computer calculates the thermophysical property value of the specimen based on the reflected probe laser beam.
    Type: Application
    Filed: October 13, 1999
    Publication date: September 19, 2002
    Inventors: TETSUYA BABA, NAOYUKI TAKETOSHI, KIMIHITO HATORI, TETSUYA OTSUKI
  • Patent number: 6133623
    Abstract: A resin sealing type semiconductor device comprises an element mounting member (10) having an element mounting surface (12), a semiconductor element (20) bonded to the element mounting surface (12), a plurality of leads (30) provided and separated from the semiconductor element (20), a frame lead (36) disposed between these leads (30) and the semiconductor element (20), various wires (40) and a resin sealing portion which seals the element mounting member (10), the semiconductor element (20), parts of the leads (30) and the frame lead (36). The leads (30) include first inner leads (32a) disposed discontinuously with the frame lead (36) and second leads (32b) disposed integrally with the frame lead (36).The resin sealing type semiconductor device has good heat radiation characteristics and high reliability. Wire bonding with a highly flexible wiring arrangement design is provided by using leads commonly.
    Type: Grant
    Filed: February 25, 1998
    Date of Patent: October 17, 2000
    Assignee: Seiko Epson Corporation
    Inventors: Tetsuya Otsuki, Kenzo Yoshimori