Patents by Inventor Tetsuya Taguwa

Tetsuya Taguwa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6589873
    Abstract: There is disclosed a process for manufacturing a semiconductor device. When a metal film is formed by plasma CVD in a contact hole which penetrates an interlayer insulating film and reaches an electrode of the device, a gas comprising hydrogen and argon in a deposition chamber of a plasma CVD apparatus is introduced. Then a metal halide gas is introduced in the deposition chamber simultaneously with or before plasma generation.
    Type: Grant
    Filed: January 6, 2000
    Date of Patent: July 8, 2003
    Assignee: NEC Electronics Corporation
    Inventor: Tetsuya Taguwa
  • Patent number: 6569759
    Abstract: A semiconductor integrated circuit device is implemented by circuit components and a multi-layered wiring structure, and titanium nitride is used for a part of the integrated circuit such as a conductive plug, an accumulating electrode and a conductive line, wherein the titanium nitride layer is laminated on a titanium silicide layer so as to absorb thermal stress due to the titanium nitride layer.
    Type: Grant
    Filed: February 13, 2002
    Date of Patent: May 27, 2003
    Assignee: NEC Electronics Corporation
    Inventor: Tetsuya Taguwa
  • Patent number: 6475907
    Abstract: There is provided a method for manufacturing a semiconductor device having a barrier metal layer, including the steps of forming a titanium film as the barrier metal layer on a silicon oxide film, forming a titanium nitride film, and oxidizing a surface of this titanium nitride film, then the titanium nitride film is formed thereon. This titanium nitride film is formed as taking in oxygen from an underlying oxide film. Therefore, its crystal growth is inhibited and its barrier metal layer property is improved.
    Type: Grant
    Filed: April 18, 2000
    Date of Patent: November 5, 2002
    Assignee: NEC Corporation
    Inventor: Tetsuya Taguwa
  • Patent number: 6440828
    Abstract: A miniature contact is incorporated in a semiconductor device for transferring an electric signal between a conductive wiring and an impurity region, and a titanium silicide and a single crystal silicon region doped with an impurity forms an ohmic contact; in order to form the ohmic contact, a surface portion of the single crystal silicon region is made amorphous by using an ion-bombardment, thereafter, titanium is deposited on the amorphous silicon to have the thickness ranging between 3 nanometers and 10 nanometers, and the titanium layer is converted to a titanium silicide layer through an annealing at 400 degrees to 500 degrees in centigrade, thereby forming the low-resistive ohmic contact without changing the impurity profile of the single crystal silicon region.
    Type: Grant
    Filed: May 30, 1997
    Date of Patent: August 27, 2002
    Assignee: NEC Corporation
    Inventors: Shunichiro Sato, Toshiki Shinmura, Yoshiaki Yamada, Tetsuya Taguwa, Koji Urabe
  • Patent number: 6432493
    Abstract: A method of carrying out a plasma-enhanced chemical vapor deposition. A process gas is introduced into a reaction chamber containing a susceptor having a first region on which a semiconductor substrate is placed and a second region other than the first region, upon which a ceramics insulator is placed. A plasma is generated between the susceptor and an electrode, and a thin film is formed on the semiconductor substrate and on the ceramics insulator covering the second region of the susceptor. The resulting plasma-enhanced chemical vapor deposition results in enhanced uniformity of the thin metal film formed on the semiconductor substrate, and improved yield, and barrier characteristics.
    Type: Grant
    Filed: September 21, 2000
    Date of Patent: August 13, 2002
    Assignee: NEC Corporation
    Inventor: Tetsuya Taguwa
  • Publication number: 20020081858
    Abstract: There is disclosed a process for manufacturing a semiconductor device. When a metal film is formed by plasma CVD in a contact hole which penetrates an interlayer insulating film and reaches an electrode of the device, a gas comprising hydrogen and argon in a deposition chamber of a plasma CVD apparatus is introduced. Then a metal halide gas is introduced in the deposition chamber simultaneously with or before plasma generation.
    Type: Application
    Filed: January 6, 2000
    Publication date: June 27, 2002
    Inventor: TETSUYA TAGUWA
  • Publication number: 20020070456
    Abstract: A semiconductor integrated circuit device is implemented by circuit components and a multi-layered wiring structure, and titanium nitride is used for a part of the integrated circuit such as a conductive plug, an accumulating electrode and a conductive line, wherein the titanium nitride layer is laminated on a titanium silicide layer so as to absorb thermal stress due to the titanium nitride layer.
    Type: Application
    Filed: February 13, 2002
    Publication date: June 13, 2002
    Inventor: Tetsuya Taguwa
  • Patent number: 6404058
    Abstract: A semiconductor integrated circuit device is implemented by circuit components and a multi-layered wiring structure, and titanium nitride is used for a part of the integrated circuit such as a conductive plug, an accumulating electrode and a conductive line, wherein the titanium nitride layer is laminated on a titanium silicide layer so as to absorb thermal stress due to the titanium nitride layer.
    Type: Grant
    Filed: February 2, 2000
    Date of Patent: June 11, 2002
    Assignee: NEC Corporation
    Inventor: Tetsuya Taguwa
  • Publication number: 20020043722
    Abstract: A semiconductor device manufacturing method comprising the steps of:
    Type: Application
    Filed: January 26, 1998
    Publication date: April 18, 2002
    Inventor: TETSUYA TAGUWA
  • Publication number: 20020009830
    Abstract: A processed object, i.e., a circuit-constituting member is positioned by a member-transferring unit at a given position in a member-waiting portion when plasma starts to be generated in a plasma-generative portion, and the circuit-constituting member is transferred from the member-waiting portion to the plasma-generative portion when the plasma started to be generated in the plasma-generative portion is brought into a stable condition thereof. Thus, the circuit-constituting member is not subjected to a circuit-processing by plasma before the stable condition is not reached but is surely subjected to the circuit-processing only by plasma in the stable condition.
    Type: Application
    Filed: March 13, 2001
    Publication date: January 24, 2002
    Inventor: Tetsuya Taguwa
  • Publication number: 20010046789
    Abstract: A barrier metal that can be used in a semiconductor is to be made extremely thin. Further, the manufacturing steps of a semiconductor device are shortened to reduce its manufacturing cost. An insulating layer (e.g., a thermal nitride layer 10) with good step coverage formed on a surface of a conductor film such as lower electrodes 9 and 9a of a capacitor on a semiconductor substrate is transformed into a reformed layer 11, which serves as a conductive barrier layer. Alternatively, the insulating layer formed on the surface of the insulating layer on the semiconductor substrate is totally or partially reformed into the conductive barrier layer. This reforming process is conducted by heating the above-mentioned semiconductor substrate at a predetermined temperature and, applying a plasma-excited high melting-point metal onto the surface of the above-mentioned insulating layer. This high melting-point metal may be Ti, Ta, Ni, Mo, W or the like.
    Type: Application
    Filed: March 8, 2001
    Publication date: November 29, 2001
    Inventor: Tetsuya Taguwa
  • Patent number: 6204170
    Abstract: In order to prevent a thick metal nitride film formed in a contact hole or a through-hole and on an insulating film to bury the hole from being cracked of peeled off, a method for easily removing unnecessary metal film on the insulating film while leaving a metal silicide film formed in the hole is provided. The method comprises the steps of depositing a titanium film in the hole formed in the insulating film and on the insulating film by CVD, forming the metal silicide film by a reaction between the titanium film on a bottom of the hole and a semiconductor substrate and, then, selectively removing unnecessary metal film other than the metal silicide film by using an etching gas containing halogen.
    Type: Grant
    Filed: May 6, 1998
    Date of Patent: March 20, 2001
    Assignee: NEC Corporation
    Inventor: Tetsuya Taguwa
  • Patent number: 6176936
    Abstract: A chamber cleaning method of a CVD apparatus is provided, which decreases the cleaning time and increases the throughput of a CVD process. A desired film of a metal or metal compound has been formed on a semiconductor substrate placed in a reaction chamber of the CVD apparatus through a reducing decomposition reaction of a source gas. The source gas is a metal halide gas containing a metal element of the desired film. An undesired film of a same metal or metal compound as the desired film has been formed on an inner exposed surface of the chamber in addition to the desired film formed on the substrate. First, (a) the semiconductor substrate on which the desired film has been formed is taken out of the reaction chamber of the CVD apparatus.
    Type: Grant
    Filed: July 22, 1998
    Date of Patent: January 23, 2001
    Assignee: NEC Corporation
    Inventor: Tetsuya Taguwa
  • Patent number: 6167836
    Abstract: There is provided a plasma-enhanced chemical vapor deposition apparatus including a reaction chamber into which a process gas is introduced and from which an exhausted gas is discharged, a susceptor having a first region on which a semiconductor substrate is to be placed and a second region other than the first region, an electrode located in facing relation with the susceptor and cooperating with the susceptor to generate plasma therebetween for forming a thin film on the semiconductor substrate placed on the first region of the susceptor, and a ceramics insulator covering the second region of the susceptor therewith. The above-mentioned plasma-enhanced chemical vapor deposition apparatus enhances uniformity of a thin metal film to be formed on a semiconductor substrate, and further improves a barrier characteristic of the thin metal film.
    Type: Grant
    Filed: March 31, 1998
    Date of Patent: January 2, 2001
    Assignee: NEC Corporation
    Inventor: Tetsuya Taguwa
  • Patent number: 6107190
    Abstract: There is provided a method of fabricating a semiconductor including the steps, in this order, of (a) forming an interlayer insulating film on a semiconductor substrate, (b) forming a first TiN film on the interlayer insulating film by sputtering, (c) forming a hole throughout the interlayer insulating film to thereby cause the semiconductor substrate to appear, (d) forming a second TiN film over the first TiN film by chemical vapor deposition to thereby fill the hole with the second TiN film, and (e) removing the first and second TiN films except TiN filling the hole therewith. When a Ti or TiN film having a thickness sufficient to fill a contact hole or a through-hole therewith is to be formed by CVD even at low temperature, the this method prevents the Ti or TiN film from being cracked or peeled off.
    Type: Grant
    Filed: October 28, 1997
    Date of Patent: August 22, 2000
    Assignee: NEC Corporation
    Inventors: Tetsuya Taguwa, Yoshiaki Yamada
  • Patent number: 6020254
    Abstract: A method of fabricating semiconductor devices which satisfactorily removes native oxide films and damaged layers which are formed on the surfaces of the conductor layers in the silicon substrates when contact holes are opened, and which tend to increase the contact resistances. A thin oxide film 5 is formed on the surface of a conductor region 3 in a silicon substrate 1 which is exposed at the bottom of the contact hole, and the oxide film 5 is then etched off with hydrogen-containing plasma. The native oxide film and/or damaged layer 3a, and the etching residue on the surface of the conduct layer 3 are satisfactorily removed, thus allowing provision of a contact structure with a low contact resistance regardless of whether the conductor type is P or N, without increasing the diameter of the contact hole.
    Type: Grant
    Filed: November 21, 1996
    Date of Patent: February 1, 2000
    Assignee: NEC Corporation
    Inventor: Tetsuya Taguwa