Patents by Inventor Tetsuyoshi Ogura

Tetsuyoshi Ogura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20140192005
    Abstract: The tactile sense presentation device comprises: a plurality of first electrodes covered with an insulating film and arranged on a same plane; a plurality of second electrodes arranged on the plane with tops exposed to outside; and a control unit performing a first operation in parallel with a second operation, wherein the first operation is for applying temporally changing first voltages to a part of the plurality of first electrodes to generate electric fields which are changed by the part of the plurality of first electrodes, and the second operation is for applying temporally changing first electric currents to a part of the plurality of second electrodes to cause the electric currents to flow from the part of the plurality of second electrodes to second electrodes which are different from the part of the plurality of second electrodes via electric conductors.
    Type: Application
    Filed: June 20, 2013
    Publication date: July 10, 2014
    Applicant: Panasonic Corporation
    Inventors: Daisuke Wakuda, Takeshi Suzuki, Tetsuyoshi Ogura, Koichi Hirano
  • Publication number: 20140151225
    Abstract: An electrochemical detector is an electrochemical detector for detecting a substance in a liquid by generating a redox cycle, the electrochemical detector comprising: a first working electrode having a first electrode surface, a second working electrode having a second electrode surface, and a plurality of insulating spacer particles, wherein the first and second electrode surfaces are placed so as to face each other so that an electric field is formed between the first and second electrode surfaces, and the plurality of spacer particles are placed along the first and second electrode surfaces so as to separate the first and second electrode surfaces from each other.
    Type: Application
    Filed: December 12, 2012
    Publication date: June 5, 2014
    Applicant: Panasonic Corporation
    Inventors: Yoshihisa Yamashita, Seiichi Nakatani, Tetsuyoshi Ogura, Koichi Hirano, Makoto Takahashi, Satoshi Arimoto
  • Patent number: 8344264
    Abstract: A pair of discretionary points on a principal surface of a block are coupled to each other with a metal wire having a length larger than a distance between the pair of discretionary points, liquid resin is applied to the principal surface so as to cover the metal wire and then cured, so that a resin-cured material is formed, and the upper-surface portion of the resin-cured material is removed together with an intermediate portion of the metal wire, and then the block is removed from the resin-cured material.
    Type: Grant
    Filed: June 23, 2009
    Date of Patent: January 1, 2013
    Assignee: Panasonic Corporation
    Inventors: Yutaka Kumano, Hideki Iwaki, Tetsuyoshi Ogura, Shingo Komatsu, Koichi Hirano
  • Patent number: 8324623
    Abstract: A semiconductor chip comprising a capacitor capable of effectively controlling the voltage drop of an LSI is provided. A semiconductor substrate is provided with an element electrode having at least its surface constituted of an aluminum electrode. The surface of the aluminum electrode is roughened. An oxide film is provided on the aluminum electrode. A conductive film is provided on the oxide film. The aluminum electrode, oxide film and conductive film form a capacitor.
    Type: Grant
    Filed: April 5, 2011
    Date of Patent: December 4, 2012
    Assignee: Panasonic Corporation
    Inventors: Koichi Hirano, Tetsuyoshi Ogura, Seiichi Nakatani
  • Patent number: 7943518
    Abstract: A semiconductor chip comprising a capacitor capable of effectively controlling the voltage drop of an LSI is provided. A semiconductor substrate is provided with an element electrode having at least its surface constituted of an aluminum electrode. The surface of the aluminum electrode is roughened. An oxide film is provided on the aluminum electrode. A conductive film is provided on the oxide film. The aluminum electrode, oxide film and conductive film form a capacitor.
    Type: Grant
    Filed: August 24, 2007
    Date of Patent: May 17, 2011
    Assignee: Panasonic Corporation
    Inventors: Koichi Hirano, Tetsuyoshi Ogura, Seiichi Nakatani
  • Patent number: 7814445
    Abstract: An interference analysis device that analyzes interference includes an input unit that inputs design data, a selection unit that selects an analysis region, a division unit that divides a wire into segments, a calculation unit that calculates a circuit matrix regarding a coupled line, and an analysis unit that obtains a degree of electromagnetic interference, wherein the calculation unit calculates a circuit matrix of the coupled line, using a parameter set obtained by adding an asymmetry parameter to RLGC parameters of a transmission line in the coupled line. Thus, a method for analyzing an interference of circuit wiring can be provided, which is capable of shortening a processing time substantially while maintaining high precision.
    Type: Grant
    Filed: April 14, 2006
    Date of Patent: October 12, 2010
    Assignee: Panasonic Corporation
    Inventors: Hideki Iwaki, Naoki Komatsu, Tetsuyoshi Ogura, Toru Yamada
  • Patent number: 7805265
    Abstract: A method for measuring electric circuit parameters of a 2-terminal circuit having first and second terminals, includes steps of: terminating one of the first and second terminals with a terminal impedance Z1, to measure reflection characteristics ?1 for the other terminal; terminating one of the first and second terminals with a terminal impedance Z2 different from the terminal impedance Z1, to measure reflection characteristics ?2 for the other terminal; terminating one of the first and second terminals with a terminal impedance Z3 different from the terminal impedances Z1 and Z2, to measure reflection characteristics ?3 for the other terminal; and calculating electric circuit parameters of the 2-terminal circuit based on the resultant reflection characteristics ?1, ?2 and ?3, whereby measuring electric circuit parameters, such as S-parameters, Z-parameters or the like, even of a DUT having a weak ground, in a simple way with high accuracy and low cost.
    Type: Grant
    Filed: May 13, 2005
    Date of Patent: September 28, 2010
    Assignee: Panasonic Corporation
    Inventors: Akihiko Namba, Tetsuyoshi Ogura, Toru Yamada
  • Patent number: 7788076
    Abstract: An interference analysis device can be provided, which analyzes interference between wirings of a circuit board with reduced load and for a short time period. The interference analysis device according to the present invention includes: a design data input part for inputting design data of the circuit board; a noise characteristics setting part that sets data representing electrical characteristics of noise for a wiring of the circuit board; a limit value setting part that sets an allowable limit value of noise received by a wiring; a selection part that selects a wiring group to be analyzed based on the noise characteristics data and the allowable limit value; an interference analysis part that calculates, concerning the selected wiring group, an amount of interference from a wiring giving the interference to a wiring receiving the interference; and a received noise level calculation part that calculates a noise level that the wiring receiving the interference will receive.
    Type: Grant
    Filed: March 8, 2005
    Date of Patent: August 31, 2010
    Assignee: Panasonic Corporation
    Inventors: Hideki Iwaki, Tetsuyoshi Ogura, Naoki Komatsu, Takeshi Nakayama, Tomohiro Kinoshita
  • Publication number: 20100164061
    Abstract: A semiconductor chip comprising a capacitor capable of effectively controlling the voltage drop of an LSI is provided. A semiconductor substrate is provided with an element electrode having at least its surface constituted of an aluminum electrode. The surface of the aluminum electrode is roughened. An oxide film is provided on the aluminum electrode. A conductive film is provided on the oxide film. The aluminum electrode, oxide film and conductive film form a capacitor.
    Type: Application
    Filed: August 24, 2007
    Publication date: July 1, 2010
    Inventors: Koichi Hirano, Tetsuyoshi Ogura, Seiichi Nakatani
  • Patent number: 7647034
    Abstract: A design support system for circuit board includes: a noise source extracting unit for extracting a source of unwanted radiation noise which is generated from a circuit board mounted on an electronic equipment; a noise characteristics input unit for inputting noise characteristics of the unwanted radiation noise which is emitted by the extracted noise source; a noise attenuation ratio input unit for inputting an attenuation ratio of the unwanted radiation noise which is emitted by the noise source and propagated to a feed point of an antenna; a correlation value calculation unit for calculating a correlation value between the noise characteristics and the attenuation ratio of the unwanted radiation noise; and a comparator unit for comparing the calculated correlation value with a predetermined allowable value, whereby avoiding malfunction of an electronic equipment due to interference of unwanted radiation noises generated from the particular electronic equipment into the circuit board via the antenna.
    Type: Grant
    Filed: August 31, 2006
    Date of Patent: January 12, 2010
    Assignee: Panasonic Corporation
    Inventors: Tomoya Maekawa, Toru Yamada, Tetsuyoshi Ogura
  • Patent number: 7642973
    Abstract: A design support apparatus of the present invention includes the following: an antenna electromagnetic field distribution input portion that inputs data indicating an antenna electromagnetic field distribution in the vicinity of electronic equipment; a board near electromagnetic field distribution input portion that inputs data indicating a board near electromagnetic field distribution as unwanted radiation noise radiated from a board of the electronic equipment; and a correlation value generator that generates a distribution of correlation values showing a correlation between the antenna electromagnetic field and the board near electromagnetic field based on the antenna electromagnetic field distribution data and the board near electromagnetic field distribution data.
    Type: Grant
    Filed: December 20, 2005
    Date of Patent: January 5, 2010
    Assignee: Panasonic Corporation
    Inventors: Tomoya Maekawa, Tetsuyoshi Ogura, Toru Yamada
  • Publication number: 20090321124
    Abstract: A pair of discretionary points on a principal surface of a block are coupled to each other with a metal wire having a length larger than a distance between the pair of discretionary points, liquid resin is applied to the principal surface so as to cover the metal wire and then cured, so that a resin-cured material is formed, and the upper-surface portion of the resin-cured material is removed together with an intermediate portion of the metal wire, and then the block is removed from the resin-cured material.
    Type: Application
    Filed: June 23, 2009
    Publication date: December 31, 2009
    Inventors: Yutaka KUMANO, Hideki IWAKI, Tetsuyoshi OGURA, Shingo KOMATSU, Koichi HIRANO
  • Patent number: 7548792
    Abstract: An equivalent material constant calculation system that calculates an equivalent material constant of a structure constituted by a plurality of materials includes a shape data input portion that inputs shape data, a material data input portion that inputs material constant data, a dividing portion that divides the structure into a plurality of small regions, and a small region interior calculation portion that calculates equivalent material constants in the small regions, in which the small region interior calculation portion, based on the shape data and material constant data, with a function that includes a value in a variable that expresses a position in at least one direction in the small region, expresses an equivalent material constant for a region that is a portion of a small region, and using the function, calculates an equivalent material constant for the small region with respect to the at least one direction.
    Type: Grant
    Filed: March 21, 2008
    Date of Patent: June 16, 2009
    Assignee: Panasonic Corporation
    Inventors: Yutaka Kumano, Tetsuyoshi Ogura, Toru Yamada
  • Publication number: 20090019403
    Abstract: An interference analysis device that analyzes interference includes an input unit 2 that inputs design data, a selection unit 3 that selects an analysis region, a division unit 5 that divides a wire into segments, a calculation unit 6 that calculates a circuit matrix regarding a coupled line, and an analysis unit 7 that obtains a degree of electromagnetic interference, wherein the calculation unit 6 calculates a circuit matrix of the coupled line, using a parameter set obtained by adding an asymmetry parameter to RLGC parameters of a transmission line in the coupled line. Thus, a method for analyzing an interference of circuit wiring can be provided, which is capable of shortening a processing time substantially while maintaining high precision.
    Type: Application
    Filed: April 14, 2006
    Publication date: January 15, 2009
    Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
    Inventors: Hideki Iwaki, Naoki Komatsu, Tetsuyoshi Ogura, Toru Yamada
  • Publication number: 20090012750
    Abstract: A chassis surface temperature estimate apparatus capable of quickly and easily estimating a chassis surface temperature without obtaining a parameter for each component through actual measurement for thermal design is provided. A thermal analysis execution section (6) executes a thermal analysis in units of heat-generation groups each including at least one heat-generating component, and obtains the chassis surface temperatures caused by respective heat-generation groups. A storage section (8) stores the chassis surface temperatures obtained for respective heat-generation group. A synthesis section (7) firstly reads the chassis surface temperature data from the storage section (8), and converts the chassis surface temperatures caused by respective heat-generation groups to radiation amounts. Secondly, the synthesis section (7) calculates a sum of radiation amounts by adding the radiation amounts obtained through the conversion.
    Type: Application
    Filed: January 9, 2007
    Publication date: January 8, 2009
    Inventors: Yutaka Kumano, Tetsuyoshi Ogura, Toru Yamada
  • Publication number: 20080183322
    Abstract: An equivalent material constant calculation system that calculates an equivalent material constant of a structure constituted by a plurality of materials includes a shape data input portion that inputs shape data, a material data input portion that inputs material constant data, a dividing portion that divides the structure into a plurality of small regions, and a small region interior calculation portion that calculates equivalent material constants in the small regions, in which the small region interior calculation portion, based on the shape data and material constant data, with a function that includes a value in a variable that expresses a position in at least one direction in the small region, expresses an equivalent material constant for a region that is a portion of a small region, and using the function, calculates an equivalent material constant for the small region with respect to the at least one direction.
    Type: Application
    Filed: March 21, 2008
    Publication date: July 31, 2008
    Applicant: Matsushita Electric Industrial Co., Ltd
    Inventors: Yutaka Kumano, Tetsuyoshi Ogura, Toru Yamada
  • Patent number: 7385286
    Abstract: At least four terminal electrodes are provided on a surface of multi-layer substrate main body. An electric functional layer is selectively provided at an internal area of said multi-layer substrate placed at a downward position of all terminal electrodes in a substrate thickness direction. A semiconductor device is flip-chip-bonded to the terminal electrodes. Thus, the semiconductor device is electrically connected to the electric functional layer at a short distance. As a result, a reduction in parasitic inductance and an improvement in high frequency characteristic can be accomplished. Generation of height variations between the terminal electrodes can be prevented, and the semiconductor device is stably flip-chip-bonded to the multi-layer substrate.
    Type: Grant
    Filed: June 5, 2002
    Date of Patent: June 10, 2008
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Hideki Iwaki, Tetsuyoshi Ogura, Yutaka Taguchi
  • Patent number: 7379780
    Abstract: An equivalent material constant calculation system that calculates an equivalent material constant of a structure constituted by a plurality of materials includes a shape data input portion that inputs shape data, a material data input portion that inputs material constant data, a dividing portion that divides the structure into a plurality of small regions, and a small region interior calculation portion that calculates equivalent material constants in the small regions, in which the small region interior calculation portion, based on the shape data and material constant data, with a function that includes a value in a variable that expresses a position in at least one direction in the small region, expresses an equivalent material constant for a region that is a portion of a small region, and using the function, calculates an equivalent material constant for the small region with respect to the at least one direction.
    Type: Grant
    Filed: October 27, 2005
    Date of Patent: May 27, 2008
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Yutaka Kumano, Tetsuyoshi Ogura, Toru Yamada
  • Publication number: 20080004819
    Abstract: A method for measuring electric circuit parameters of a 2-terminal circuit having first and second terminals, includes steps of: terminating one of the first and second terminals with a terminal impedance Z1, to measure reflection characteristics al for the other terminal; terminating one of the first and second terminals with a terminal impedance Z2 different from the terminal impedance Z1, to measure reflection characteristics (2 for the other terminal; terminating one of the first and second terminals with a terminal impedance Z3 different from the terminal impedances Z1 and Z2, to measure reflection characteristics ?3 for the other terminal; and calculating electric circuit parameters of the 2-terminal circuit based on the resultant reflection characteristics ?1, ?2 and ?3, whereby measuring electric circuit parameters, such as S-parameters, Z-parameters or the like, even of a DUT having a weak ground, in a simple way with high accuracy and low cost.
    Type: Application
    Filed: May 13, 2005
    Publication date: January 3, 2008
    Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
    Inventors: Akihiko Namba, Tetsuyoshi Ogura, Toru Yamada
  • Publication number: 20070137890
    Abstract: A signal transmitting lead 105 is provided on an electrically insulating layer 103. Auxiliary leads 104A and 104B are provided while the auxiliary leads 104A and 104B are not in electrical contact with the signal transmitting lead 105. At least a part of the auxiliary leads 104A and 104B is covered with an electromagnetic shielding layer 106. Consequently, radiant noise from the inside or the outside of a printed wiring board can be suppressed without degrading characteristics of a signal which is transmitted through the signal transmitting lead 105.
    Type: Application
    Filed: January 29, 2007
    Publication date: June 21, 2007
    Applicant: Matsushita Electric Industrial Co., Ltd.
    Inventors: Hiroyoshi Tagi, Tetsuyoshi Ogura, Yutaka Taguchi, Toshiyuki Asahi, Tatsuo Ogawa