Patents by Inventor Tetsuyoshi Ogura
Tetsuyoshi Ogura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20070079272Abstract: A design support system for circuit board includes: a noise source extracting unit for extracting a source of unwanted radiation noise which is generated from a circuit board mounted on an electronic equipment; a noise characteristics input unit for inputting noise characteristics of the unwanted radiation noise which is emitted by the extracted noise source; a noise attenuation ratio input unit for inputting an attenuation ratio of the unwanted radiation noise which is emitted by the noise source and propagated to a feed point of an antenna; a correlation value calculation unit for calculating a correlation value between the noise characteristics and the attenuation ratio of the unwanted radiation noise; and a comparator unit for comparing the calculated correlation value with a predetermined allowable value, whereby avoiding malfunction of an electronic equipment due to interference of unwanted radiation noises generated from the particular electronic equipment into the circuit board via the antenna.Type: ApplicationFiled: August 31, 2006Publication date: April 5, 2007Inventors: Tomoya Maekawa, Toru Yamada, Tetsuyoshi Ogura
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Publication number: 20060132118Abstract: A design support apparatus of the present invention includes the following: an antenna electromagnetic field distribution input portion that inputs data indicating an antenna electromagnetic field distribution in the vicinity of electronic equipment; a board near electromagnetic field distribution input portion that inputs data indicating a board near electromagnetic field distribution as unwanted radiation noise radiated from a board of the electronic equipment; and a correlation value generator that generates a distribution of correlation values showing a correlation between the antenna electromagnetic field and the board near electromagnetic field based on the antenna electromagnetic field distribution data and the board near electromagnetic field distribution data.Type: ApplicationFiled: December 20, 2005Publication date: June 22, 2006Applicant: Matsushita Electric Industrial Co., Ltd.Inventors: Tomoya Maekawa, Tetsuyoshi Ogura, Toru Yamada
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Patent number: 7056571Abstract: There is provided a wiring board including an insulation substrate and a wiring layer which is located on at least one main surface of the insulation substrate, wherein the insulation substrate comprises a woven fabric which is made of yarns and an organic resin with which the woven fabric is impregnated, and at least one wiring of wirings which form the wiring layer extends over the woven fabric except for top portions of the yarns.Type: GrantFiled: December 19, 2003Date of Patent: June 6, 2006Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Satoru Tomekawa, Tetsuyoshi Ogura, Hiroyoshi Tagi
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Publication number: 20060095493Abstract: An equivalent material constant calculation system that calculates an equivalent material constant of a structure constituted by a plurality of materials includes a shape data input portion that inputs shape data, a material data input portion that inputs material constant data, a dividing portion that divides the structure into a plurality of small regions, and a small region interior calculation portion that calculates equivalent material constants in the small regions, in which the small region interior calculation portion, based on the shape data and material constant data, with a function that includes a value in a variable that expresses a position in at least one direction in the small region, expresses an equivalent material constant for a region that is a portion of a small region, and using the function, calculates an equivalent material constant for the small region with respect to the at least one direction.Type: ApplicationFiled: October 27, 2005Publication date: May 4, 2006Applicant: Matsushita Electric Industrial Co., Ltd.Inventors: Yutaka Kumano, Tetsuyoshi Ogura, Toru Yamada
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Publication number: 20050258533Abstract: A semiconductor device mounting structure is provided that includes an electrically insulating layer including a plurality of layers of electrically insulating substrates, a first semiconductor device, a second semiconductor device, a heat dispersion portion provided at a main surface of the electrically insulating layer, a first heat-conducting path connecting the heat dispersion portion and the first semiconductor device, and a second heat-conducting path connecting the heat dispersion portion and the second semiconductor device, wherein the first semiconductor device is arranged between at least a portion of the heat dispersion portion and the second semiconductor device. This provides a semiconductor device mounting structure that, in addition to being capable of high-density mounting of a plurality of semiconductor devices, is capable of dispersing with good efficiency heat generated by the plurality of semiconductor devices.Type: ApplicationFiled: May 16, 2005Publication date: November 24, 2005Applicant: Matsushita Electric Industrial Co., Ltd.Inventors: Yutaka Kumano, Tetsuyoshi Ogura, Toru Yamada
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Publication number: 20050197817Abstract: An interference analysis device can be provided, which analyzes interference between wirings of a circuit board with reduced load and for a short time period. The interference analysis device according to the present invention includes: a design data input part for inputting design data of the circuit board; a noise characteristics setting part that sets data representing electrical characteristics of noise for a wiring of the circuit board; a limit value setting part that sets an allowable limit value of noise received by a wiring; a selection part that selects a wiring group to be analyzed based on the noise characteristics data and the allowable limit value; an interference analysis part that calculates, concerning the selected wiring group, an amount of interference from a wiring giving the interference to a wiring receiving the interference; and a received noise level calculation part that calculates a noise level that the wiring receiving the interference will receive.Type: ApplicationFiled: March 8, 2005Publication date: September 8, 2005Applicant: Matsushita Electric Industrial Co., Ltd.Inventors: Hideki Iwaki, Tetsuyoshi Ogura, Naoki Komatsu, Takeshi Nakayama, Tomohiro Kinoshita
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Patent number: 6885788Abstract: A light reception/emission device built-in module with optical and electrical wiring combined therein includes: an optical waveguide layer including a core portion and a cladding portion; first and second wiring patterns formed on a main surface of the optical waveguide layer; a light reception device disposed inside the optical waveguide layer, the light reception device being optically connected with the core portion of the optical waveguide layer and being electrically connected with the first wiring pattern; and a light emission device disposed inside the optical waveguide layer, the light emission device being optically connected with the core portion of the optical waveguide layer and being electrically connected with the second wiring pattern. With this configuration, optical coupling between the optical waveguide and the light reception/emission device can be conducted precisely.Type: GrantFiled: June 20, 2003Date of Patent: April 26, 2005Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Hideki Iwaki, Yutaka Taguchi, Tetsuyoshi Ogura, Yasuhiro Sugaya, Toshiyuki Asahi, Tousaku Nishiyama, Yoshinobu Idogawa
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Patent number: 6870264Abstract: An insulator is provided between interconnect layers oppositely placed. The interconnect layers are connected between by connection members provided through the insulator. The connection members at one and the other ends are connected between in their center positions. A shield layer is provided spaced from the intermediate connection layer generally on a same plane as the intermediate connection layer. A condition of (R·r)/(2·h)?L?(5·R·r)/h is satisfied, provided that a connection distance between the interconnect layers through the connection members and the intermediate connection layer is h, the connection members where considered generally as a circular cylinder have a diameter R, the intermediate connection layer where considered generally as circular has a diameter r, and a spaced distance between the intermediate connection layer and the shield layer is L. Thus, characteristic impedance is stabilized.Type: GrantFiled: November 28, 2001Date of Patent: March 22, 2005Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Hideki Iwaki, Yutaka Taguchi, Tetsuyoshi Ogura
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Patent number: 6774316Abstract: The present invention aims to provide a wiring substrate highly reliable in insulation and connection and a method for manufacturing the wiring substrate. A wiring substrate having two or more wiring layers, insulation layers interposed between the neighboring wiring layers and containing an organic resin, and a via formed in the insulation layers and extended between neighboring wiring layers. The via including functional substances, as well as some of the voids (first voids) where at least the organic resins from the insulation layers exist and the remaining voids (second voids) where a gas exists.Type: GrantFiled: July 26, 2001Date of Patent: August 10, 2004Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Takeshi Suzuki, Tatsuo Ogawa, Satoru Tomekawa, Yoshihiro Bessho, Tousaku Nishiyama, Tetsuyoshi Ogura
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Publication number: 20040142154Abstract: There is provided a wiring board including an insulation substrate and a wiring layer which is located on at least one main surface of the insulation substrate wherein the insulation substrate comprises a woven fabric which is made of yarns and an organic resin with which the woven fabric is impregnated, and at least one wiring of wirings which form the wiring layer extends over the woven fabric except top portions of the yarns.Type: ApplicationFiled: December 19, 2003Publication date: July 22, 2004Inventors: Satoru Tomekawa, Tetsuyoshi Ogura, Hiroyoshi Tagi
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Publication number: 20040012935Abstract: A signal transmitting lead 105 is provided on an electrically insulating layer 103. Auxiliary leads 104A and 104B are provided while the auxiliary leads 104A and 104B are not in electrical contact with the signal transmitting lead 105. At least a part of the auxiliary leads 104A and 104B is covered with an electromagnetic shielding layer 106. Consequently, radiant noise from the inside or the outside of a printed wiring board can be suppressed without degrading characteristics of a signal which is transmitted through the signal transmitting lead 105.Type: ApplicationFiled: July 7, 2003Publication date: January 22, 2004Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.Inventors: Hiroyoshi Tagi, Tetsuyoshi Ogura, Yutaka Taguchi, Toshiyuki Asahi, Tatsuo Ogawa
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Publication number: 20040001661Abstract: A light reception/emission device built-in module with optical and electrical wiring combined therein includes: an optical waveguide layer including a core portion and a cladding portion; first and second wiring patterns formed on a main surface of the optical waveguide layer; a light reception device disposed inside the optical waveguide layer, the light reception device being optically connected with the core portion of the optical waveguide layer and being electrically connected with the first wiring pattern; and a light emission device disposed inside the optical waveguide layer, the light emission device being optically connected with the core portion of the optical waveguide layer and being electrically connected with the second wiring pattern. With this configuration, optical coupling between the optical waveguide and the light reception/emission device can be conducted precisely.Type: ApplicationFiled: June 20, 2003Publication date: January 1, 2004Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.Inventors: Hideki Iwaki, Yutaka Taguchi, Tetsuyoshi Ogura, Yasuhiro Sugaya, Toshiyuki Asahi, Tousaku Nishiyama, Yoshinobu Idogawa
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Patent number: 6615465Abstract: A method for producing an acceleration sensor comprising an electromechanical transducer having a piezoelectric element includes providing at least two piezoelectric substrates where each has two opposing main surfaces. The piezoelectric element is formed by directly connecting one of the main surfaces of one of the at least two piezoelectric substrates with an opposing one of the main surfaces of another one of the at least two piezoelectric substrates. Supporters are provided to support the electromechanical transducer and are directly connected to the at least two piezoelectric substrates composing the piezoelectric element. Electrodes that extend continuously from the unconnected main surfaces of the at least two piezoelectric substrates composing the piezoelectric element to surfaces of the supporters are then formed.Type: GrantFiled: May 19, 2000Date of Patent: September 9, 2003Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Tetsuro Otsuchi, Masato Sugimoto, Tetsuyoshi Ogura, Yoshihiro Tomita, Osamu Kawasaki
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Publication number: 20020180063Abstract: At least four terminal electrodes are provided on a surface of multi-layer substrate main body. An electric functional layer is selectively provided at an internal area of said multi-layer substrate placed at a downward position of all terminal electrodes in a substrate thickness direction. A semiconductor device is flip-chip-bonded to the terminal electrodes. Thus, the semiconductor device is electrically connected to the electric functional layer at a short distance. As a result, a reduction in parasitic inductance and an improvement in high frequency characteristic can be accomplished. Generation of height variations between the terminal electrodes can be prevented, and the semiconductor device is stably flip-chip-bonded to the multi-layer substrate.Type: ApplicationFiled: June 5, 2002Publication date: December 5, 2002Applicant: Matsushita Electric Industrial Co., Ltd.Inventors: Hideki Iwaki, Tetsuyoshi Ogura, Yutaka Taguchi
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Publication number: 20020171328Abstract: A small acceleration sensor which is highly sensitive over a large frequency region and which varies little in characteristics such as sensitivity. A piezoelectric element is formed by connecting two main faces of rectangular LiNbO3 piezoelectric substrates, in which the polarization axes are directed oppositely. Supporters comprising LiNbO3 are directly connected to one end of the piezoelectric element. Electrodes of chromium-gold being 0.2 &mgr;m thick are successively connected to the two main faces of the piezoelectric element and to the supporters, thus to produce a cantilever structure bimorph electromechanical transducer.Type: ApplicationFiled: May 19, 2000Publication date: November 21, 2002Inventors: Tetsuro Otsuchi, Masato Sugimoto, Tetsuyoshi Ogura, Yoshihiro Tomita, Osamu Kawasaki
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Patent number: 6392164Abstract: An insulator is provided between interconnect layers oppositely placed. The interconnect layers are connected between by connection members provided through the insulator. The connection members at one and the other ends are connected between in their center positions. A shield layer is provided spaced from the intermediate connection layer generally on a same plane as the intermediate connection layer. The interconnect layers where considered generally as a circular cylinder have a diameter m, and the intermediate connection layer where considered generally as circular has a diameter r, r<m is given where the connection members are high in characteristic impedance than the interconnect layers, and r<m is given where the connection members are low in characteristic impedance then the interconnect layers.Type: GrantFiled: October 14, 1999Date of Patent: May 21, 2002Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Hideki Iwaki, Yutaka Taguchi, Tetsuyoshi Ogura
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Publication number: 20020034839Abstract: An insulator is provided between interconnect layers oppositely placed. The interconnect layers are connected between by connection members provided through the insulator. The connection members at one and the other ends are connected between in their center positions. A shield layer is provided spaced from the intermediate connection layer generally on a same plane as the intermediate connection layer. A condition of (R·r)/(2·h)≦L≦(5·R·r)/h is satisfied, provided that a connection distance between the interconnect layers through the connection members and the intermediate connection layer is h, the connection members where considered generally as a circular cylinder have a diameter R, the intermediate connection layer where considered generally as circular has a diameter r, and a spaced distance between the intermediate connection layer and the shield layer is L. Thus, characteristic impedance is stabilized.Type: ApplicationFiled: November 28, 2001Publication date: March 21, 2002Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.Inventors: Hideki Iwaki, Yutaka Taguchi, Tetsuyoshi Ogura
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Patent number: 6270202Abstract: A liquid jetting apparatus has a concave casing having an opened flat face, and a piezoelectric drive element for at least partly sealing the opened flat face to form a liquid reservoir to store a liquid, such as ink. The reservoir has a liquid injection port for injecting a liquid and a liquid jet port for jetting the stored liquid. The piezoelectric drive element is directly bonded to the open flat face.Type: GrantFiled: April 23, 1998Date of Patent: August 7, 2001Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Akihiko Namba, Yoshihiro Tomita, Tetsuyoshi Ogura, Osamu Kawasaki, Masato Sugimoto, Katsumi Imada, Atsushi Komatsu, Kazuo Eda
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Patent number: 6098460Abstract: A small accelaration sensor which is highly sensitive over a large frequency region and which varies little in characteristics such as sensitivity. A piezoelectric element is formed by connecting two main faces of retangular LiNbO.sub.3 piezoelectric substrates, in which the polarization axes are directed oppositely. Supporters comprising LiNbO.sub.3 directly connected to one end of the piezoelectric element. Eletrodes of chromium-gold being 0.2 .mu.m are thick are successively connected to the two main faces of the piozoelectric element and to the supporters, thus to produce a cantilever structure bimorph electromechanical transducer.Type: GrantFiled: October 8, 1996Date of Patent: August 8, 2000Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Tetsuro Otsuchi, Masato Sugimoto, Tetsuyoshi Ogura, Yoshihiro Tomita, Osamu Kawasaki
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Patent number: 5982010Abstract: A piezoelectric device is manufactured by: (1) mirror finishing surfaces of a first substrate and a second substrate made of a piezoelectric element; (2) forming grooves on at least one of the two surfaces of the first and second substrates; (3) joining the mirror-finished surfaces of the first substrate and the second substrate; (4) applying heat to the joined substrates and bonding them; (5) forming an opening on the first substrate so that a part of the exposed areas of the second substrate is exposed through the opening; (6) forming piezoelectric devices by forming electrodes on at least one of the second substrate through the opening and a corresponding area to the exposed area on the rear side of the second substrate; and (7) dividing the bonded substrates into portions each having one of the piezoelectric devices. Through this manufacturing method, piezoelectric devices with high yield ratios and high reliability can be obtained.Type: GrantFiled: November 25, 1997Date of Patent: November 9, 1999Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Akihiko Namba, Tetsuyoshi Ogura, Yoshihiro Tomita, Kazuo Eda