Patents by Inventor Theodore Kamins

Theodore Kamins has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20050133476
    Abstract: A semiconductor nanowire is grown laterally. A method of growing the nanowire forms a vertical surface on a substrate, and activates the vertical surface with a nanoparticle catalyst. A method of laterally bridging the nanowire grows the nanowire from the activated vertical surface to connect to an opposite vertical surface on the substrate. A method of connecting electrodes of a semiconductor device grows the nanowire from an activated device electrode to an opposing device electrode. A method of bridging semiconductor nanowires grows nanowires between an electrode pair in opposing lateral directions. A method of self-assembling the nanowire bridges the nanowire between an activated electrode pair. A method of controlling nanowire growth forms a surface irregularity in the vertical surface. An electronic device includes a laterally grown nano-scale interconnection.
    Type: Application
    Filed: December 17, 2003
    Publication date: June 23, 2005
    Inventors: M. Islam, Theodore Kamins, Shashank Sharma
  • Publication number: 20050056867
    Abstract: Surface photovoltage is used for molecule sensing. The sensing is performed by exposing a surface of a semiconductor to molecules, and sensing a change in surface photovoltage of the semiconductor. Chemical and biological sensors may be based on such sensing.
    Type: Application
    Filed: September 16, 2003
    Publication date: March 17, 2005
    Inventors: Krzysztof Nauka, Zhiyong Li, Theodore Kamins
  • Publication number: 20050032297
    Abstract: A field effect transistor having a narrow channel and a method for forming such a device. An upstanding nanopillar is formed from a substrate by directional etching of the substrate preferentially masked by a nanoparticle. A stack of planar layers of material is formed adjacent and around the nanopillar. The bottom layer, adjacent the substantially planar top substrate surface, comprises insulating material. A conductive gate layer overlies the bottom layer while a second insulating layer overlies the gate layer. The pillar material is etched to leave a nanopore into which semiconductor material is deposited, forming an upstanding channel, after insulating material has been deposited on the interior of the nanopore. The source or drain may be a conductive substrate or a doped region of the substrate formed immediately beneath the nanopillar with the other electrode formed by doping the region adjacent the top of the channel.
    Type: Application
    Filed: September 9, 2004
    Publication date: February 10, 2005
    Inventor: Theodore Kamins