Patents by Inventor Theodore M. Taylor

Theodore M. Taylor has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9614153
    Abstract: Methods of selectively forming a metal-doped chalcogenide material comprise exposing a chalcogenide material to a transition metal solution, and incorporating transition metal of the transition solution into the chalcogenide material without substantially incorporating the transition metal into an adjacent material. The chalcogenide material is not silver selenide. Another method comprises forming a chalcogenide material adjacent to and in contact with an insulative material, exposing the chalcogenide material and the insulative material to a transition metal solution, and diffusing transition metal of the transition metal solution into the chalcogenide material while substantially no transition metal diffuses into the insulative material.
    Type: Grant
    Filed: January 28, 2015
    Date of Patent: April 4, 2017
    Assignee: Micron Technology, Inc.
    Inventors: Jerome A. Imonigie, Prashant Raghu, Theodore M. Taylor, Scott E. Sills
  • Publication number: 20150140777
    Abstract: Methods of selectively forming a metal-doped chalcogenide material comprise exposing a chalcogenide material to a transition metal solution, and incorporating transition metal of the transition solution into the chalcogenide material without substantially incorporating the transition metal into an adjacent material. The chalcogenide material is not silver selenide. Another method comprises forming a chalcogenide material adjacent to and in contact with an insulative material, exposing the chalcogenide material and the insulative material to a transition metal solution, and diffusing transition metal of the transition metal solution into the chalcogenide material while substantially no transition metal diffuses into the insulative material.
    Type: Application
    Filed: January 28, 2015
    Publication date: May 21, 2015
    Inventors: Jerome A. Imonigie, Prashant Raghu, Theodore M. Taylor, Scott E. Sills
  • Patent number: 8962460
    Abstract: Methods of selectively forming a metal-doped chalcogenide material comprise exposing a chalcogenide material to a transition metal solution, and incorporating transition metal of the transition solution into the chalcogenide material without substantially incorporating the transition metal into an adjacent material. The chalcogenide material is not silver selenide. Another method comprises forming a chalcogenide material adjacent to and in contact with an insulative material, exposing the chalcogenide material and the insulative material to a transition metal solution, and diffusing transition metal of the transition metal solution into the chalcogenide material while substantially no transition metal diffuses into the insulative material.
    Type: Grant
    Filed: April 26, 2011
    Date of Patent: February 24, 2015
    Assignee: Micron Technology, Inc.
    Inventors: Jerome A. Imonigie, Prashant Raghu, Theodore M. Taylor, Scott E. Sills
  • Publication number: 20140077126
    Abstract: Methods and an etch gas composition for etching a contact opening in a dielectric layer are provided. Embodiments of the method use a plasma generated from an etch gas composed of C4F8 and/or C4F6, an oxygen source, and a carrier gas in combination with tetrafluoroethane (C2F4) or a halofluorocarbon analogue of C2F4.
    Type: Application
    Filed: November 20, 2013
    Publication date: March 20, 2014
    Applicant: Micron Technology, Inc.
    Inventors: Russell A. Benson, Theodore M. Taylor, Mark W. Kiehlbauch
  • Patent number: 8524610
    Abstract: Processes for enhancing solubility and the reaction rates in supercritical fluids are provided. In preferred embodiments, such processes provide for the uniform and precise deposition of metal-containing films on semiconductor substrates as well as the uniform and precise removal of materials from such substrates. In one embodiment, the process includes, providing a supercritical fluid containing at least one reactant, the supercritical fluid being maintained at above its critical point, exposing at least a portion of the surface of the semiconductor substrate to the supercritical fluid, applying acoustic energy, and reacting the at least one reactant to cause a change in at least a portion of the surface of the semiconductor substrate.
    Type: Grant
    Filed: September 11, 2012
    Date of Patent: September 3, 2013
    Assignee: Micron Technology, Inc.
    Inventors: Theodore M. Taylor, Stephen J. Kramer
  • Publication number: 20130005153
    Abstract: Processes for enhancing solubility and the reaction rates in supercritical fluids are provided. In preferred embodiments, such processes provide for the uniform and precise deposition of metal-containing films on semiconductor substrates as well as the uniform and precise removal of materials from such substrates. In one embodiment, the process includes, providing a supercritical fluid containing at least one reactant, the supercritical fluid being maintained at above its critical point, exposing at least a portion of the surface of the semiconductor substrate to the supercritical fluid, applying acoustic energy, and reacting the at least one reactant to cause a change in at least a portion of the surface of the semiconductor substrate.
    Type: Application
    Filed: September 11, 2012
    Publication date: January 3, 2013
    Applicant: MICRON TECHNOLOGY, INC.
    Inventors: Theodore M. Taylor, Stephen J. Kramer
  • Patent number: 8329595
    Abstract: Processes for enhancing solubility and the reaction rates in supercritical fluids are provided. In preferred embodiments, such processes provide for the uniform and precise deposition of metal-containing films on semiconductor substrates as well as the uniform and precise removal of materials from such substrates. In one embodiment, the process includes, providing a supercritical fluid containing at least one reactant, the supercritical fluid being maintained at above its critical point, exposing at least a portion of the surface of the semiconductor substrate to the supercritical fluid, applying acoustic energy, and reacting the at least one reactant to cause a change in at least a portion of the surface of the semiconductor substrate.
    Type: Grant
    Filed: September 28, 2011
    Date of Patent: December 11, 2012
    Assignee: Micron Technology, Inc.
    Inventors: Theodore M. Taylor, Stephen J. Kramer
  • Publication number: 20120276725
    Abstract: Methods of selectively forming a metal-doped chalcogenide material comprise exposing a chalcogenide material to a transition metal solution, and incorporating transition metal of the transition solution into the chalcogenide material without substantially incorporating the transition metal into an adjacent material. The chalcogenide material is not silver selenide. Another method comprises forming a chalcogenide material adjacent to and in contact with an insulative material, exposing the chalcogenide material and the insulative material to a transition metal solution, and diffusing transition metal of the transition metal solution into the chalcogenide material while substantially no transition metal diffuses into the insulative material.
    Type: Application
    Filed: April 26, 2011
    Publication date: November 1, 2012
    Applicant: MICRON TECHNOLOGY, INC.
    Inventors: Jerome A. Imonigie, Prashant Raghu, Theodore M. Taylor, Scott E. Sills
  • Publication number: 20120015524
    Abstract: Processes for enhancing solubility and the reaction rates in supercritical fluids are provided. In preferred embodiments, such processes provide for the uniform and precise deposition of metal-containing films on semiconductor substrates as well as the uniform and precise removal of materials from such substrates. In one embodiment, the process includes, providing a supercritical fluid containing at least one reactant, the supercritical fluid being maintained at above its critical point, exposing at least a portion of the surface of the semiconductor substrate to the supercritical fluid, applying acoustic energy, and reacting the at least one reactant to cause a change in at least a portion of the surface of the semiconductor substrate.
    Type: Application
    Filed: September 28, 2011
    Publication date: January 19, 2012
    Applicant: MICRON TECHNOLOGY, INC.
    Inventors: Theodore M. Taylor, Stephen J. Kramer
  • Patent number: 8043944
    Abstract: Processes for enhancing solubility and the reaction rates in supercritical fluids are provided. In preferred embodiments, such processes provide for the uniform and precise deposition of metal-containing films on semiconductor substrates as well as the uniform and precise removal of materials from such substrates. In one embodiment, the process includes, providing a supercritical fluid containing at least one reactant, the supercritical fluid being maintained at above its critical point, exposing at least a portion of the surface of the semiconductor substrate to the supercritical fluid, applying acoustic energy, and reacting the at least one reactant to cause a change in at least a portion of the surface of the semiconductor substrate.
    Type: Grant
    Filed: August 6, 2009
    Date of Patent: October 25, 2011
    Assignee: Micron Technology, Inc.
    Inventors: Theodore M. Taylor, Stephen J. Kramer
  • Patent number: 7967661
    Abstract: Planarizing systems and methods of planarizing microelectronic workpieces using mechanical and/or chemical-mechanical planarization are disclosed herein. In one embodiment, a planarizing system includes a platen having a support surface carrying a planarizing pad. The planarizing pad includes an optically transmissive window extending through the planarizing pad that forms a continuous segment of the planarizing pad. The system also includes a workpiece carrier configured to move the workpiece relative to the planarizing pad and an optical monitor positioned proximate to the platen. The optical monitor emits light through the window and detects reflected light from the workpiece through the window.
    Type: Grant
    Filed: June 19, 2008
    Date of Patent: June 28, 2011
    Assignee: Micron Technology, Inc.
    Inventors: Theodore M. Taylor, Andrew Carswell
  • Publication number: 20090318061
    Abstract: Planarizing systems and methods of planarizing microelectronic workpieces using mechanical and/or chemical-mechanical planarization are disclosed herein. In one embodiment, a planarizing system includes a platen having a support surface carrying a planarizing pad. The planarizing pad includes an optically transmissive window extending through the planarizing pad that forms a continuous segment of the planarizing pad. The system also includes a workpiece carrier configured to move the workpiece relative to the planarizing pad and an optical monitor positioned proximate to the platen. The optical monitor emits light through the window and detects reflected light from the workpiece through the window.
    Type: Application
    Filed: June 19, 2008
    Publication date: December 24, 2009
    Applicant: MICRON TECHNOLOGY, INC.
    Inventors: Theodore M. Taylor, Andrew Carswell
  • Publication number: 20090291545
    Abstract: Processes for enhancing solubility and the reaction rates in supercritical fluids are provided. In preferred embodiments, such processes provide for the uniform and precise deposition of metal-containing films on semiconductor substrates as well as the uniform and precise removal of materials from such substrates. In one embodiment, the process includes, providing a supercritical fluid containing at least one reactant, the supercritical fluid being maintained at above its critical point, exposing at least a portion of the surface of the semiconductor substrate to the supercritical fluid, applying acoustic energy, and reacting the at least one reactant to cause a change in at least a portion of the surface of the semiconductor substrate.
    Type: Application
    Filed: August 6, 2009
    Publication date: November 26, 2009
    Applicant: Micron Technology, Inc.
    Inventors: Theodore M. Taylor, Stephen J. Kramer
  • Patent number: 7598181
    Abstract: Processes for enhancing solubility and the reaction rates in supercritical fluids are provided. In preferred embodiments, such processes provide for the uniform and precise deposition of metal-containing films on semiconductor substrates as well as the uniform and precise removal of materials from such substrates. In one embodiment, the process includes, providing a supercritical fluid containing at least one reactant, the supercritical fluid being maintained at above its critical point, exposing at least a portion of the surface of the semiconductor substrate to the supercritical fluid, applying acoustic energy, and reacting the at least one reactant to cause a change in at least a portion of the surface of the semiconductor substrate.
    Type: Grant
    Filed: July 19, 2005
    Date of Patent: October 6, 2009
    Assignee: Micron Technology, Inc.
    Inventors: Theodore M. Taylor, Stephen J. Kramer
  • Patent number: 7591061
    Abstract: A subpad support for use in a web format or belt format polishing apparatus for polishing one or more layers of semiconductor device structures. The subpad support includes a subpad retention element for nonadhesively securing the subpad thereto. The subpad support may also include one or more lips protruding therefrom so as to at least substantially inhibit lateral movement of the subpad relative to the subpad support. Polishing apparatus including the subpad support are also disclosed. The polishing pads of such polishing apparatus may be at least partially moved away from the subpad or subpad support so as to facilitate assembly of a subpad with the subpad support or removal of the subpad from the subpad support without damaging the polishing pad. Methods of removably securing a subpad to the subpad support, removing the subpad from the subpad support, and replacing another subpad on the subpad support, as well as polishing methods, are also disclosed.
    Type: Grant
    Filed: December 4, 2002
    Date of Patent: September 22, 2009
    Assignee: Micron Technology, Inc.
    Inventor: Theodore M. Taylor
  • Patent number: 7381647
    Abstract: Microelectronic devices including a layer of germanium and selenium, optionally including up to 10 atomic percent silver, show promise for select applications. Manufacturing microelectronic devices containing such layers using conventional CMP processes presents some significant challenges. Embodiments of the invention provide methods of planarizing workpieces with Ge—Se layers, many of which can be carried out using conventional CMP equipment. Other embodiments of the invention provide chemical-mechanical polishing systems adapted to produce planarized workpieces with Ge—Se layers or, in at least one embodiment, other alternative layers. Various approaches suggested herein facilitate production of such microelectronic devices by appropriate control of the down force of the Ge—Se layer against the planarizing medium and/or one or more aspects of the planarizing medium, which aspects include pH, abrasive particle size, abrasive particle hardness, weight percent of abrasive.
    Type: Grant
    Filed: April 21, 2005
    Date of Patent: June 3, 2008
    Assignee: Micron Technology, Inc.
    Inventors: Nagasubramaniyan Chandrasekaran, Theodore M. Taylor
  • Patent number: 7377018
    Abstract: A subpad support for use in a web format or belt format polishing apparatus for polishing one or more layers of semiconductor device structures. The subpad support includes a subpad retention element for nonadhesively securing the subpad thereto. The subpad support may also include one or more lips protruding therefrom so as to at least substantially inhibit lateral movement of the subpad relative to the subpad support. Polishing apparatus including the subpad support are also disclosed. The polishing pads of such polishing apparatus may be at least partially moved away from the subpad or subpad support so as to facilitate assembly of a subpad with the subpad support or removal of the subpad from the subpad support without damaging the polishing pad. Methods of removably securing a subpad to the subpad support, removing the subpad from the subpad support, and replacing another subpad on the subpad support, as well as polishing methods, are also disclosed.
    Type: Grant
    Filed: December 4, 2002
    Date of Patent: May 27, 2008
    Assignee: Micron Technology, Inc.
    Inventor: Theodore M. Taylor
  • Patent number: 7361078
    Abstract: A subpad support for use in a web format or belt format polishing apparatus for polishing one or more layers of semiconductor device structures. The subpad support includes a subpad retention element for non-adhesively securing the subpad thereto. The subpad support may also include one or more lips protruding therefrom so as to at least substantially inhibit lateral movement of the subpad relative to the subpad support. Polishing apparatus including the subpad support are also disclosed. The polishing pads of such polishing apparatus may be at least partially moved away from the subpad or subpad support so as to facilitate assembly of a subpad with the subpad support or removal of the subpad from the subpad support without damaging the polishing pad. Methods of removably securing a subpad to the subpad support, removing the subpad from the subpad support, and replacing another subpad on the subpad support, as well as polishing methods, are also disclosed.
    Type: Grant
    Filed: April 6, 2006
    Date of Patent: April 22, 2008
    Assignee: Micron Technology, Inc.
    Inventor: Theodore M. Taylor
  • Patent number: 7276765
    Abstract: A buried transistor particularly suitable for SOI technology, where the transistor is fabricated within a trench in a substrate and the resulting transistor incorporates completely isolated active areas. The resulting substrate has a decreased topography and there is no need for polysilicon (or other) plugs to connect to the transistor, unless desired. With this invention, better control is achieved in processing, particularly of gate length. The substrate having the buried transistor can be silicon oxide bonded to another substrate to form an SOI structure.
    Type: Grant
    Filed: March 21, 2005
    Date of Patent: October 2, 2007
    Assignee: Micron Technology, Inc.
    Inventors: Theodore M. Taylor, Won-Joo Kim, John K. Skrovan
  • Patent number: 7223297
    Abstract: A planarizing slurry for mechanical and/or chemical-mechanical polishing of microfeature workpieces. In one embodiment, the planarizing slurry comprises a liquid solution and a plurality of abrasive elements mixed in the liquid solution. The abrasive elements comprise a matrix material having a first hardness and a plurality of abrasive particles at least partially surrounded by the matrix material. The abrasive particles can have a second hardness independent of the first hardness of the matrix material. The second hardness, for example, can be greater than the first hardness. The matrix material can be formed into a core having an exterior surface and an interior. Because the abrasive particles are at least partially surrounded by the matrix material, the abrasive particles are at least partially embedded into the interior of the core.
    Type: Grant
    Filed: June 28, 2005
    Date of Patent: May 29, 2007
    Assignee: Micron Technology, Inc.
    Inventors: Theodore M. Taylor, Nagasubramaniyan Chandrasekaran