Patents by Inventor Thierry Baron
Thierry Baron has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Publication number: 20130189609Abstract: A material (M) includes a substrate one of the surfaces of which is covered with a layer based on a block copolymer having a block (B) consisting of a polysaccharide and to its uses for electronics, in order to prepare organic electroluminescent diodes (OLEDs) or organic photovoltaic cells (OPV) or for designing detection devices (nanobiosensors, biochips).Type: ApplicationFiled: July 29, 2011Publication date: July 25, 2013Inventors: Karim Aissou, Sami Halila, Sébastien Fort, Redouane Borsali, Thierry Baron
-
Publication number: 20120217565Abstract: A process for obtaining an array of nanodots (212) for microelectronic devices, characterized in that it comprises the following steps: deposition of a silicon layer (210) on a substrate (100, 132), formation, above the silicon layer (210), of a layer (240) of a material capable of self-organizing, in which at least one polymer substantially forms cylinders (242) organized into an array within a matrix (244), formation of patterns (243) in the layer (240) of a material capable of self-organizing by elimination of the said cylinders (242), formation of a hard mask (312) by transfer of the said patterns (243), production of silicon dots (212) in the silicon layer (210) by engraving through the hard mask (312), silicidation of the silicon dots (212), comprising deposition of a metal layer (510).Type: ApplicationFiled: February 10, 2012Publication date: August 30, 2012Applicants: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENE ALT, UNIVERSITE JOSEPH FOURIER, CNRS - Centre National de la Recherche Scientifiq.Inventors: Guillaume GAY, Thierry Baron, Eric Jalaguier
-
Patent number: 8252702Abstract: A method for making a micro-electronic non-volatile memory device provided with transistors having gates placed side by side, the method comprising the steps of: a) forming in a layer based on at least one first gate material lying on a support, at least one first transistor gate block and at least one sacrificial block, said first block and said sacrificial block being separated by a given space, b) forming in said given space a stack comprising at least one insulating layer and at least one second gate material, said gate material located in said space being intended to form a second gate block separated from the first block by said insulating layer, c) suppressing said sacrificial block.Type: GrantFiled: April 21, 2011Date of Patent: August 28, 2012Assignees: Commissariat à l'énergie atomique et aux énergies alternatives, Centre National de la Recherche ScientifiqueInventors: Gabriel Molas, Thierry Baron
-
METHOD FOR THE REALIZATION OF A CROSSBAR ARRAY OF CROSSED CONDUCTIVE OR SEMI-CONDUCTIVE ACCESS LINES
Publication number: 20120052598Abstract: A method for making a crossbar array of crossed conductive or semi-conductive access lines on a substrate, the crossbar array including on a crossbar array insulator, in a plane parallel to the substrate, a first level of lines including a plurality of first lines parallel with each other made of a conductive or semi-conductive material; on the first level of lines, a second level of lines including a plurality of second lines parallel with each other made of a conductive or semi-conductive material, the second lines being substantially perpendicular to the first lines. The method includes forming, on the substrate, a first cavity of substantially rectangular shape; forming a second cavity of substantially rectangular shape superimposed to the first cavity, the first and second cavities intersecting each other perpendicularly so as to form a resultant cavity.Type: ApplicationFiled: June 7, 2011Publication date: March 1, 2012Applicants: Commissariat à l'énergie atomique et aux énergies alternatives, Université Joseph Fourier, Centre national de la recherche scientifiqueInventors: Julien Buckley, Karim Aissou, Thierry Baron, Gabriel Molas -
Patent number: 8088674Abstract: Electrodes made from metallic material are formed on a layer of dielectric material. A bottom layer of at least one of the electrodes constitutes a catalyst material in direct contact with the layer of dielectric material. Nanowires are grown by means of the catalyst, between the electrodes, parallel to the layer of dielectric material. The nanowires connecting the two electrodes are then made from single-crystal semi-conductor material and in contact with the layer of dielectric material.Type: GrantFiled: November 27, 2008Date of Patent: January 3, 2012Assignees: Commissariat a l'Energie Atomique, Centre National de al Recherche ScientifiqueInventors: Thomas Ernst, Thierry Baron, Pierre Ferret, Pascal Gentile, Bassem Salem
-
Publication number: 20110300699Abstract: A method for making a micro-electronic non-volatile memory device provided with transistors having gates placed side by side, the method comprising the steps of: a) forming in a layer based on at least one first gate material lying on a support, at least one first transistor gate block and at least one sacrificial block, said first block and said sacrificial block being separated by a given space, b) forming in said given space a stack comprising at least one insulating layer and at least one second gate material, said gate material located in said space being intended to form a second gate block separated from the first block by said insulating layer, c) suppressing said sacrificial block.Type: ApplicationFiled: April 21, 2011Publication date: December 8, 2011Applicants: CENTRE NATIONAL DE LA RECHERCHE SCIENTIFIQUE, Comm. a l' ener. atom. et aux energies alter.Inventors: Gabriel MOLAS, Thierry Baron
-
Patent number: 7968398Abstract: A diblock copolymer layer comprising at least two polymers and having a lamellar structure perpendicularly to a substrate is deposited on a first gate insulator formed on the substrate. One of the polymers of the diblock copolymer layer is then eliminated to form parallel grooves in the copolymer layer. The grooves are filled by a first metallic or semi-conductor material and the rest of the copolymer layer is eliminated. A second dielectric material is deposited to form a second gate insulator. The second gate insulator of the floating gate then comprises an alternation of parallel first and second lines respectively of the first and second materials, the second material encapsulating the lines of the first material.Type: GrantFiled: January 22, 2009Date of Patent: June 28, 2011Assignees: Commissariat a l'Energie Atomique, Centre National de la Recherche Scientifique, Universite Joseph FourierInventors: Gabriel Molas, Karim Aissou, Thierry Baron
-
Publication number: 20100273317Abstract: Electrodes made from metallic material are formed on a layer of dielectric material. A bottom layer of at least one of the electrodes constitutes a catalyst material in direct contact with the layer of dielectric material. Nanowires are grown by means of the catalyst, between the electrodes, parallel to the layer of dielectric material. The nanowires connecting the two electrodes are then made from single-crystal semi-conductor material and in contact with the layer of dielectric material.Type: ApplicationFiled: November 27, 2008Publication date: October 28, 2010Applicants: Commissariat A L'energie Atomique et Aux Energies Alternatives, Centre National de la Recherche ScientifiqueInventors: Thomas Ernst, Thierry Baron, Pierre Ferret, Pascal Gentile, Bassem Salem
-
Publication number: 20090246901Abstract: A process of making a microelectronic light-emitting device, including: a) growth on a metallic support of multiple wires based on one or more semi-conducting materials designed to emit radiant light, and b) formation of at least one electrical conducting zone of contact on at least one of the wires.Type: ApplicationFiled: June 8, 2007Publication date: October 1, 2009Applicant: COMMISSARIAT A L'ENERGIE ATOMIQUEInventors: Philippe Gilet, Pierre Ferret, Pascal Gentile, Alexei Tchelnokov, Thierry Baron
-
Publication number: 20090203205Abstract: A diblock copolymer layer comprising at least two polymers and having a lamellar structure perpendicularly to a substrate is deposited on a first gate insulator formed on the substrate. One of the polymers of the diblock copolymer layer is then eliminated to form parallel grooves in the copolymer layer. The grooves are filled by a first metallic or semi-conductor material and the rest of the copolymer layer is eliminated. A second dielectric material is deposited to form a second gate insulator. The second gate insulator of the floating gate then comprises an alternation of parallel first and second lines respectively of the first and second materials, the second material encapsulating the lines of the first material.Type: ApplicationFiled: January 22, 2009Publication date: August 13, 2009Applicants: COMMISSARIAT A L'ENERGIE ATOMIQUE, CENTRE NATIONAL DE LA RECHERCHE SCIENTIFIQUE, UNIVERSITE JOSEPH FOURIERInventors: Gabriel Molas, Karim Aissou, Thierry Baron
-
Publication number: 20080209052Abstract: A method and system for delivering value added service (VAS) applications offered by a service provider to a subscribing end user is presented. The method includes collecting, by a user service module, end user device information, forwarding, by the service provider, end user information, to a server, creating, by the service provider, target end user profiles, VAS application campaigns, and campaign schedules, and storing the same in the server. The method further comprises communicating, between the server and the user service module, to display an offer in the end user device for at least one of the VAS applications, in accordance with the target profiles, the application campaigns, and schedules, wherein, upon selecting by the user, the at least one of the VAS applications is loaded, installed, and activated in the end user device without further end user actions.Type: ApplicationFiled: February 22, 2007Publication date: August 28, 2008Applicant: RADIALPOINT INC.Inventors: Corey Velan, Erik Wright, Marty Algire, Luc Boulianne, Mario Contestabile, Craig Frisch, Thierry Baron, Carlos Saldanha, Benjamin Skowronski, Frank Kouretas
-
Publication number: 20070104888Abstract: The invention concerns a process for the formation of nanostructures including: the formation of nucleation sites (4) by the irradiation of a substrate using a beam of silicon or germanium ions, the growth of nanostructures (8) on the nucleation sites thus formed.Type: ApplicationFiled: December 21, 2004Publication date: May 10, 2007Applicant: Comminssariat A L"energie AtomiqueInventors: Frederic Mazen, Thierry Baron, Sebastien Decossas, Abdelkader Souifi
-
Patent number: 6946369Abstract: The invention concerns a method for forming nanostructures of semi-conductor material on a substrate of dielectric material by chemical vapour deposition (CVD). Said method comprises the following steps: a step of forming on the substrate (12) stable nuclei (14) of a first semi-conductor material in the form of islands, by CVD from a precursor (11) of the first semi-conductor material chosen so that the dielectric material (12) accepts the formation of said nuclei (14), a step of forming nanostructures (16A, 16B) of a second semi-conductor material from the stable nuclei (14) of the first semi-conductor material, by CVD from a precursor (21) chosen to generate a selective deposition of the second semi-conductor material only on said nuclei (14). The invention further concerns nanostructures formed according to one of said methods as well as devices comprising said nanostructures.Type: GrantFiled: November 19, 2003Date of Patent: September 20, 2005Assignee: Commissariat a l'Energie AtomiqueInventors: Frédéric Mazen, Thierry Baron, Jean-Michel Hartmann, Marie-Noelle Semeria
-
Publication number: 20040147098Abstract: The invention concerns a method for forming nanostructures of semi-conductor material on a substrate of dielectric material by chemical vapour deposition (CVD).Type: ApplicationFiled: November 19, 2003Publication date: July 29, 2004Inventors: Frederic Mazen, Thierry Baron, Jean-Michel Hartmann, Marie-Noelle Semeria
-
Patent number: 6724017Abstract: The invention relates to a device comprising microstructures or nanostructures on a support, characterized in that the support comprises: a) a substrate (1) comprising at least one part composed of a crystalline material, this part having a surface (2) with a stress field or a topology associated with a stress field, the stress field being associated with dislocations, b) an intermediate layer (3) bonded to the surface (2), and having a thickness and/or composition and/or a surface state enabling transmission of said stress field through this layer as far as its free face that supports microstructures or nanostructures (4).Type: GrantFiled: March 28, 2003Date of Patent: April 20, 2004Assignees: Commissariat a l'Energie Atomique, Centre National de la Recherche ScientificInventors: Marie-Noëlle Semeria, Pierre Mur, Franck Fournel, Hubert Moriceau, Hubert Eymery, Noël Magnea, Thierry Baron, François Martin
-
Publication number: 20030186512Abstract: The invention relates to a device comprising microstructures or nanostructures on a support, characterized in that the support comprises:Type: ApplicationFiled: March 28, 2003Publication date: October 2, 2003Inventors: Marie-No?euml;lle Semeria, Pierre Mur, Franck Fournel, Hubert Moriceau, J?ouml;el Eymery, N?ouml;el Magnea, Thierry Baron, Francois Martin
-
Patent number: 6372536Abstract: The invention relates to a II-VI semiconductor component in which, within a series of layers, there is provided at least one junction between a semiconductor layer containing BeTe and a semiconductor layer containing Se. A boundary layer between the semiconductor layer containing BeTe and the semiconductor layer containing Se is prepared in such a way that it forms a Be—Se configuration.Type: GrantFiled: January 10, 2000Date of Patent: April 16, 2002Assignee: Osram Opto Semiconductors & Co. OHGInventors: Frank Fischer, Andreas Waag, Thierry Baron, Gottfried Landwehr, Thomas Litz, Günter Reuscher, Markus Keim, Ulrich Zehnder, Hans-Peter Steinbrück, Mario Nagelstrasser, Hans-Jürgen Lugauer
-
Patent number: 6285697Abstract: A semiconductor laser component includes a semiconductor body with an SCH configuration which is suitable for generating an electromagnetic radiation and in which an active layer sequence with a quantum well structure is provided between a first outer cover layer of a first conductivity type and a second outer cover layer of the first conductivity type. A first denatured transition layer of a second conductivity type and a second denatured transition layer the first conductivity type are provided between the active layer sequence and the second outer cover layer.Type: GrantFiled: August 2, 1999Date of Patent: September 4, 2001Assignee: Infineon Technologies AGInventors: Gottfried Landwehr, Markus Keim, Günter Reuscher, Thomas Litz, Thierry Baron, Frank Fischer, Hans-Jürgen Lugauer
-
Patent number: 6147365Abstract: An optoelectronic semiconductor component has a radiation-emitting active layer sequence which is associated with at least one poorly dopable semiconductor layer of a first conductivity type. A heavily doped first degenerated junction layer of a first conductivity type and a heavily doped second degenerated junction layer of a second conductivity type opposite to the first conductivity type are provided between the poorly dopable semiconductor layer and a contact layer of the semiconductor body, the contact layer being associated with the poorly dopable semiconductor layer.Type: GrantFiled: August 2, 1999Date of Patent: November 14, 2000Assignee: Infineon Technologies AGInventors: Frank Fischer, Thomas Litz, Hans-Jurgen Lugauer, Markus Keim, Thierry Baron, Gunter Reuscher, Gottfried Landwehr
-
Patent number: 4635022Abstract: A fuse cartridge for example of the cylindrical type comprising an insulating cylindrical body ending in two conducting end pieces and a fuse element connected electrically to the end pieces, further comprising two pistons housed in the body which are movable in translation in opposite directions to each other and collect the gases released by the electric arc at the time of its appearance, so that the pressure of the gases exerts on each piston a force which causes it to move towards a position in which the arc is totally sheared.Type: GrantFiled: January 21, 1986Date of Patent: January 6, 1987Assignee: La Telemecanique ElectriqueInventors: Elie Belbel, Thierry Baron, Christian Blanchard, Andre Haury, Michel Lauraire