Abstract: According to an embodiment, generating an adjustable bandgap reference voltage includes generating a current proportional to absolute temperature (PTAT). Generating the PTAT current includes equalizing voltages across the terminals of a core that is designed to be traversed by the PTAT current. Generating the adjustable bandgap reference also includes generating a current inversely proportional to absolute temperature (CTAT), summing the PTAT and the CTAT currents and generating the bandgap reference voltage based on the sum of the currents. Equalizing includes connecting-across the terminals of the core a first fed-back amplifier with at least one first stage arranged as a folded setup and including first PMOS transistors arranged according to a common-gate setup. Equalizing also includes biasing the first stage based on the CTAT current. The summation of the PTAT and CTAT currents is performed in the feedback stage of the first amplifier.

Abstract: An integrated circuit including: a semiconductor substrate of a first conductivity type having at least one well of a second conductivity type laterally delimited, on two opposite walls, by regions of the first conductivity type, defined at its surface; at least one region of the second conductivity type which extends in the semiconductor substrate under the well; and a system for detecting a variation of the substrate resistance between each association of two adjacent regions of the first conductivity type.

Abstract: A system for detecting a laser attack on an integrated circuit chip formed in a semiconductor substrate, including a detection device capable of detecting voltage variations of the substrate.

Abstract: The device for generating a reference current proportional to absolute temperature comprises processing means connected to the terminals of a core and designed to equalize the voltages across the terminals of the core, the core being designed to then be traversed by an internal current proportional to absolute temperature, and an output module designed to deliver to an output terminal the said reference current on the basis of the said internal current; the processing means comprise a self-biased amplifier possessing at least one first stage arranged according to a folded setup and comprising first PMOS transistors arranged in a setup of the common-gate type, and a feedback stage whose input is connected to the output of the amplifier and whose output is connected to the input of the first stage as well as to at least one terminal of the core.

Abstract: Some embodiments include apparatus and methods having a sense amplifier unit, a supply node to receive a supply voltage, and a line coupled to a memory cell of a device. The sense amplifier unit includes a circuit path coupled between the supply node and the line to carry a current having a value based on a value of information stored in the memory cell. Additional embodiments are disclosed.

Abstract: The regulator with low dropout voltage comprises an error amplifier and an output stage comprising an output transistor and a buffer circuit comprising an input connected to the output node of the error amplifier, an output connected to the output transistor, a follower amplifier connected between the input and the output of the buffer circuit. The buffer circuit furthermore comprises a transistor active load connected to the output of the follower amplifier and a negative feedback amplifier arranged in common gate configuration and connected between the output of the follower amplifier and the gate of the transistor of the active load.

Abstract: The regulator with a low dropout voltage comprises an error amplifier comprising a differential pair of input transistors and a circuit with folded cascode structure connected to the output of the said differential pair, an output stage connected to the output node of the error amplifier, and a Miller compensation capacitor connected between the output stage and the cascode node on the output side (XP) of the cascode circuit; the error amplifier furthermore comprises at least one inverting amplifier module in a feedback loop between the said cascode node and the gate of the cascode transistor of the cascode circuit connected between the said cascode node and the said output node.

Abstract: A bias current is generated for an unbalanced differential pair that is proportional to the transconductance gain of the differential pair. When the transconductance gain varies (e.g., due to temperature variations), the bias current varies in proportion thereby maintaining a constant offset voltage. In some implementations, a voltage to current converter circuit generates the bias current from a constant reference voltage that is independent of temperature and voltage supply variations (e.g., a bandgap reference voltage).

Abstract: Some embodiments include apparatus and methods having a sense amplifier unit, a supply node to receive a supply voltage, and a line coupled to a memory cell of a device. The sense amplifier unit includes a circuit path coupled between the supply node and the line to carry a current having a value based on a value of information stored in the memory cell. Additional embodiments are disclosed.

Abstract: The device for generating a reference current proportional to absolute temperature comprises processing means connected to the terminals of a core and designed to equalize the voltages across the terminals of the core, the core being designed to then be traversed by an internal current proportional to absolute temperature, and an output module designed to deliver to an output terminal the said reference current on the basis of the said internal current; the processing means comprise a self-biased amplifier possessing at least one first stage arranged according to a folded setup and comprising first PMOS transistors arranged in a setup of the common-gate type, and a feedback stage whose input is connected to the output of the amplifier and whose output is connected to the input of the first stage as well as to at least one terminal of the core.

Abstract: An adjustable bandgap reference voltage comprises means for generating current proportional to absolute temperature comprising first means connected to terminals of a core and designed to equalize voltages across the terminals, means for generating a current inversely proportional to absolute temperature connected to the core, and an output module designed to generate the reference voltage; the first processing means comprise a first amplifier possessing a stage, biased by the current inversely proportional to absolute temperature, arranged according to a folded setup and comprising first PMOS transistors arranged according to a common-gate setup, and a stage whose input is connected to the amplifier output and whose output is connected to the first stage input and to a terminal of the core, the second generating means comprise a follower amplifier setup connected to a terminal of the core and separated from the first amplifier, the output module is connected to the feedback stage.

Abstract: Generating an adjustable bandgap reference voltage comprises generating a current proportional to absolute temperature comprising an equalization of the voltages across the terminals of a core designed to then be traversed by the said current proportional to absolute temperature, generating a current inversely proportional to absolute temperature, summing these two currents and generating said bandgap reference voltage on the basis of the said sum of currents; the said equalization comprises a connection across the terminals of the core of a first fed-back amplifier possessing at least one first stage arranged as a folded setup and comprising first PMOS transistors arranged according to a common-gate setup, and a biasing of the said first stage on the basis of the said current inversely proportional to absolute temperature, the said summation of the two currents being performed in the feedback stage of the first amplifier.

Abstract: Some embodiments include apparatus and methods having a sense amplifier unit, a supply node to receive a supply voltage, and a line coupled to a memory cell of a device. The sense amplifier unit includes a circuit path coupled between the supply node and the line to carry a current having a value based on a value of information stored in the memory cell. Additional embodiments are disclosed.

Abstract: A bias current is generated for an unbalanced differential pair that is proportional to the transconductance gain of the differential pair. When the transconductance gain varies (e.g., due to temperature variations), the bias current varies in proportion thereby maintaining a constant offset voltage. In some implementations, a voltage to current converter circuit generates the bias current from a constant reference voltage that is independent of temperature and voltage supply variations (e.g., a bandgap reference voltage).

Abstract: A bias current is generated for an unbalanced differential pair that is proportional to the transconductance gain of the differential pair. When the transconductance gain varies (e.g., due to temperature variations), the bias current varies in proportion thereby maintaining a constant offset voltage. In some implementations, a voltage to current converter circuit generates the bias current from a constant reference voltage that is independent of temperature and voltage supply variations (e.g., a bandgap reference voltage).

Abstract: A differential sense amplifier can perform data sensing using a very low supply voltage.

Abstract: A bias current is generated for an unbalanced differential pair that is proportional to the transconductance gain of the differential pair. When the transconductance gain varies (e.g., due to temperature variations), the bias current varies in proportion thereby maintaining a constant offset voltage. In some implementations, a voltage to current converter circuit generates the bias current from a constant reference voltage that is independent of temperature and voltage supply variations (e.g., a bandgap reference voltage).

Abstract: A differential sense amplifier can perform data sensing using a very low supply voltage.

Abstract: Some embodiments include apparatus and methods having a sense amplifier unit, a supply node to receive a supply voltage, and a line coupled to a memory cell of a device. The sense amplifier unit includes a circuit path coupled between the supply node and the line to carry a current having a value based on a value of information stored in the memory cell. Additional embodiments are disclosed.

Abstract: A differential sense amplifier can perform data sensing using a very low supply voltage.