Abstract: There is provided herein a compound of formula (I), or a pharmaceutically acceptable salt thereof, wherein R1, R2, X1, X2, Y1 to Y4, Z1 to Z3 and n have meanings provided in the description.

Abstract: A state of health of cell groups of a battery may be determined based on direct current impedance values of the cell groups. A computing apparatus may be configured to determine a direct current internal resistance (DCIR) value of each of the cell groups of the battery pack to provide a plurality of DCIR values. Each cell group may include a plurality of battery cells. The computing apparatus may be configured to determine an average DCIR value based on the plurality of DCIR values and determine a relative DCIR threshold for at least one of the plurality of cell groups based on the average DCIR value. The computing apparatus may further be configured to provide an alert to a user in response to the DCIR value of the at least one of the plurality of cell groups exceeding the relative DCIR threshold.

Abstract: A state of health of cell groups of a battery may be determined based on direct current impedance values of the cell groups. A computing apparatus may be configured to determine a direct current internal resistance (DCIR) value of each of the cell groups of the battery pack to provide a plurality of DCIR values. Each cell group may include a plurality of battery cells. The computing apparatus may be configured to determine an average DCIR value based on the plurality of DCIR values and determine a relative DCIR threshold for at least one of the plurality of cell groups based on the average DCIR value. The computing apparatus may further be configured to provide an alert to a user in response to the DCIR value of the at least one of the plurality of cell groups exceeding the relative DCIR threshold.

Abstract: A processor-implemented method in a digital media player includes receiving data defining a user's viewport in relation to spherical video frames displayed by the digital media player; and where a forced perspective event is to be triggered at the time of display of a spherical frame, triggering the forced perspective event conditionally based at least on the orientation of the user's viewport in relation to the spherical video frames. A digital media player includes processing structure for receiving data defining a user's viewport in relation to spherical video frames displayed by the digital media player; and processing structure for, where a forced perspective event is to be triggered at the time of display of a spherical frame, triggering the forced perspective event conditionally based at least on the orientation of the user's viewport in relation to the spherical video frames. A processor-readable medium embodying a computer program for a digital media player is provided.

Abstract: A processor-implemented method in a digital media player includes receiving data defining a user's viewport in relation to spherical video frames displayed by the digital media player; and where a forced perspective event is to be triggered at the time of display of a spherical frame, triggering the forced perspective event conditionally based at least on the orientation of the user's viewport in relation to the spherical video frames. A digital media player includes processing structure for receiving data defining a user's viewport in relation to spherical video frames displayed by the digital media player; and processing structure for, where a forced perspective event is to be triggered at the time of display of a spherical frame, triggering the forced perspective event conditionally based at least on the orientation of the user's viewport in relation to the spherical video frames. A processor-readable medium embodying a computer program for a digital media player is provided.

Abstract: A processor-implemented method in a digital media player includes receiving data defining a user's viewport in relation to spherical video frames displayed by the digital media player; and where a forced perspective event is to be triggered at the time of display of a spherical frame, triggering the forced perspective event conditionally based at least on the orientation of the user's viewport in relation to the spherical video frames. A digital media player includes processing structure for receiving data defining a user's viewport in relation to spherical video frames displayed by the digital media player; and processing structure for, where a forced perspective event is to be triggered at the time of display of a spherical frame, triggering the forced perspective event conditionally based at least on the orientation of the user's viewport in relation to the spherical video frames. A processor-readable medium embodying a computer program for a digital media player is provided.

Abstract: A computer-implemented method of processing digital video includes, for each of a plurality of selected frames of the digital video: subjecting image data in the frame to scaling to occupy an image region that is smaller than the frame thereby to form at least one non-image region between the image region and the frame boundary; and inserting non-image data into at least one non-image region. A computer-implemented method of processing digital video includes, for each of a plurality of selected frames of the digital video: processing contents occupying one or more predetermined non-image regions of the frame to extract non-image data therefrom; and subjecting an image region of the frame to mapping to expand the image region to a displayable size. Systems and computer-readable media are also disclosed.

Abstract: A computer-implemented method of processing digital video is provided. The method includes determining at least one frame region the contents of which would be rendered substantially invisible, were frames of the digital video to be subjected to a predetermined texture-mapping onto a predetermined geometry; and inserting non-image data into at least one selected frame by modifying contents within at least one determined frame region of the selected frame. Another computer-implemented method of processing digital video is provided. The method includes, for each of a plurality of frames of the digital video: processing contents in one or more predetermined regions of the frame to extract non-image data therefrom; subjecting the frame to a predetermined texture-mapping onto a predetermined geometry, wherein after the texture-mapping the contents of the one or more predetermined regions are rendered substantially invisible; and causing the texture-mapped frame to be displayed.

Abstract: A computer-implemented method of displaying frames of digital video is provided. The method includes processing contents in one or more predetermined regions of the frames to detect predetermined non-image data. In the event that the predetermined non-image data is undetected within the one or more predetermined regions of a particular frame being processed, subjecting the particular frame to a predetermined texture-mapping onto a predetermined geometry and displaying the texture-mapped frame; and otherwise subjecting the particular frame to cropping to remove the non-image data, flat-projecting the cropped frame and displaying the flat-projected cropped frame. A computer-implemented method of processing digital video is also provided.

Abstract: A computer-implemented method of displaying frames of digital video is provided. The method includes processing contents in one or more predetermined regions of the frames to detect predetermined non-image data. In the event that the predetermined non-image data is undetected within the one or more predetermined regions of a particular frame being processed, subjecting the particular frame to a predetermined texture-mapping onto a predetermined geometry and displaying the texture-mapped frame; and otherwise subjecting the particular frame to cropping to remove the non-image data, flat-projecting the cropped frame and displaying the flat-projected cropped frame. A computer-implemented method of processing digital video is also provided.

Abstract: A computer-implemented method of processing digital video is provided. The method includes determining at least one frame region the contents of which would be rendered substantially invisible, were frames of the digital video to be subjected to a predetermined texture-mapping onto a predetermined geometry; and inserting non-image data into at least one selected frame by modifying contents within at least one determined frame region of the selected frame. Another computer-implemented method of processing digital video is provided. The method includes, for each of a plurality of frames of the digital video: processing contents in one or more predetermined regions of the frame to extract non-image data therefrom; subjecting the frame to a predetermined texture-mapping onto a predetermined geometry, wherein after the texture-mapping the contents of the one or more predetermined regions are rendered substantially invisible; and causing the texture-mapped frame to be displayed.

Abstract: A method of manufacturing a semiconductor device with an embedded layer, by anisotropically etching a substrate adjacent to an already formed gate structure. A dummy layer is deposited in the previously etched region, and a second spacer is formed next to the first spacer. The dummy layer is removed, and a second anisotropic etch is performed. A semiconductor substrate is then epitaxially grown in the etched out region to form the embedded layer.

Abstract: This disclosure describes methods and apparatus for indicating battery cell status on a battery pack assembly used during mechanical ventilation. Embodiments described herein seek to provide methods for indicating battery cell status on the exposed exterior of a battery assembly pack both when the battery is in use and when the battery is not in use during mechanical ventilation. Embodiments utilize power from the ventilator as well as power from the battery pack itself to light the indicators during periods of battery use and non-use, respectively. Embodiments described herein further seek to provide an apparatus indicating battery cell status on the exposed exterior of the battery pack assembly during mechanical ventilation. Embodiments described herein further seek to provide an apparatus for a battery pack assembly used during mechanical ventilation. Embodiments described herein seek to provide a system for a ventilation system with an inserted battery pack assembly.

Abstract: Device structures and design structures for passive devices that may be used as electrostatic discharge protection devices in fin-type field-effect transistor integrated circuit technologies. A device region is formed in a trench and is coupled with a handle wafer of a semiconductor-on-insulator substrate. The device region extends through a buried insulator layer of the semiconductor-on-insulator substrate toward a top surface of a device layer of the semiconductor-on-insulator substrate. The device region is comprised of lightly-doped semiconductor material. The device structure further includes a doped region formed in the device region and that defines a junction. A portion of the device region is laterally positioned between the doped region and the buried insulator layer of the semiconductor-on-insulator substrate. Another region of the device layer may be patterned to form fins for fin-type field-effect transistors.

Abstract: A method of manufacturing a semiconductor device with an embedded layer, by anisotropically etching a substrate adjacent to an already formed gate structure. A dummy layer is deposited in the previously etched region, and a second spacer is formed next to the first spacer. The dummy layer is removed, and a second anisotropic etch is performed. A semiconductor substrate is then epitaxially grown in the etched out region to form the embedded layer.

Abstract: A FinFET semiconductor device fabrication process includes forming a plurality of FinFET fins upon a semiconductor substrate, forming a first dielectric layer upon the semiconductor substrate so that an upper surface of the first dielectric layer is coplanar with upper surfaces of the FinFET fins, forming a plurality of dummy gates upon the FinFET fins and the first dielectric layer orthogonal to the FinFET fins, revealing the FinFET fins by removing first portions of the first dielectric layer from source-drain regions, removing the dummy gates, and subsequent to the removal of the dummy gates, revealing the FinFET fins by removing second portions of the first dielectric layer from channel regions.

Abstract: A FinFET semiconductor device fabrication process includes forming a plurality of FinFET fins upon a semiconductor substrate, forming a first dielectric layer upon the semiconductor substrate so that an upper surface of the first dielectric layer is coplanar with upper surfaces of the FinFET fins, forming a plurality of dummy gates upon the FinFET fins and the first dielectric layer orthogonal to the FinFET fins, revealing the FinFET fins by removing first portions of the first dielectric layer from source-drain regions, removing the dummy gates, and subsequent to the removal of the dummy gates, revealing the FinFET fins by removing second portions of the first dielectric layer from channel regions.

Abstract: Device structures and design structures for passive devices that may be used as electrostatic discharge protection devices in fin-type field-effect transistor integrated circuit technologies. A device region is formed in a trench and is coupled with a handle wafer of a semiconductor-on-insulator substrate. The device region extends through a buried insulator layer of the semiconductor-on-insulator substrate toward a top surface of a device layer of the semiconductor-on-insulator substrate. The device region is comprised of lightly-doped semiconductor material. The device structure further includes a doped region formed in the device region and that defines a junction. A portion of the device region is laterally positioned between the doped region and the buried insulator layer of the semiconductor-on-insulator substrate. Another region of the device layer may be patterned to form fins for fin-type field-effect transistors.

Abstract: A method of forming a semiconductor device that includes providing a substrate including a semiconductor layer on a germanium-containing silicon layer and forming a gate structure on a surface of a channel portion of the semiconductor layer. Well trenches are etched into the semiconductor layer on opposing sides of the gate structure. The etch process for forming the well trenches forms an undercut region extending under the gate structure and is selective to the germanium-containing silicon layer. Stress inducing semiconductor material is epitaxially grown to fill at least a portion of the well trench to provide at least one of a stress inducing source region and a stress inducing drain region having a planar base.

Abstract: Device structures, design structures, and fabrication methods for passive devices that may be used as electrostatic discharge protection devices in fin-type field-effect transistor integrated circuit technologies. A device region is formed in a trench and is coupled with a handle wafer of a semiconductor-on-insulator substrate. The device region extends through a buried insulator layer of the semiconductor-on-insulator substrate toward a top surface of a device layer of the semiconductor-on-insulator substrate. The device region is comprised of lightly-doped semiconductor material. The device structure further includes a doped region formed in the device region and that defines a junction. A portion of the device region is laterally positioned between the doped region and the buried insulator layer of the semiconductor-on-insulator substrate. Another region of the device layer may be patterned to form fins for fin-type field-effect transistors.