Patents by Inventor Thomas A. Wassick

Thomas A. Wassick has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8298929
    Abstract: Semiconductor structures, methods of manufacture and design structures are provided. The structure includes at least one offset crescent shaped solder via formed in contact with an underlying metal pad of a chip. The at least one offset crescent shaped via is offset with respect to at least one of the underlying metal pad and an underlying metal layer in direct electrical contact with an interconnect of the chip which is in electrical contact with the underlying metal layer.
    Type: Grant
    Filed: December 3, 2010
    Date of Patent: October 30, 2012
    Assignee: International Business Machines Corporation
    Inventors: Timothy H. Daubenspeck, Gary Lafontant, Ekta Misra, David L. Questad, George J. Scott, Krystyna W. Semkow, Timothy D. Sullivan, Thomas A. Wassick, Steven L. Wright
  • Publication number: 20120139123
    Abstract: Semiconductor structures, methods of manufacture and design structures are provided. The structure includes at least one offset crescent shaped solder via formed in contact with an underlying metal pad of a chip. The at least one offset crescent shaped via is offset with respect to at least one of the underlying metal pad and an underlying metal layer in direct electrical contact with an interconnect of the chip which is in electrical contact with the underlying metal layer.
    Type: Application
    Filed: December 3, 2010
    Publication date: June 7, 2012
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Timothy H. Daubenspeck, Gary Lafontant, Ekta Misra, David L. Questad, George J. Scott, Krystyna W. Semkow, Timothy D. Sullivan, Thomas A. Wassick, Steven L. Wright
  • Publication number: 20110147922
    Abstract: Structures and methods to reduce maximum current density in a solder ball are disclosed. A method includes forming a contact pad in a last wiring level and forming a plurality of wires of the contact pad extending from side edges of the contact pad to respective ones of a plurality of vias. Each one of the plurality of wires has substantially the same electrical resistance.
    Type: Application
    Filed: December 17, 2009
    Publication date: June 23, 2011
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Raschid J. BEZAMA, Timothy H. DAUBENSPECK, Gary LaFONTANT, Ian D. MELVILLE, Ekta MISRA, George J. SCOTT, Krystyna W. SEMKOW, Timothy D. SULLIVAN, Robin A. SUSKO, Thomas A. WASSICK, Xiaojin WEI, Steven L. WRIGHT
  • Patent number: 7716992
    Abstract: The invention generally relates to a design structure of a circuit design, and more particularly to a design structure of a delamination sensor for use with low-k materials. A delamination sensor includes at least one first sensor formed in a layered semiconductor structure and a second sensor formed in the layered semiconductor structure. The at least one first sensor is structured and arranged to detect a defect, and the second sensor is structured and arranged to identify an interface where the defect exists.
    Type: Grant
    Filed: March 27, 2008
    Date of Patent: May 18, 2010
    Assignee: International Business Machines Corporation
    Inventors: John J. Maloney, Wolfgang Sauter, Thomas A. Wassick, Jeffrey S. Zimmerman
  • Publication number: 20090246892
    Abstract: The invention generally relates to a design structure of a circuit design, and more particularly to a design structure of a delamination sensor for use with low-k materials. A delamination sensor includes at least one first sensor formed in a layered semiconductor structure and a second sensor formed in the layered semiconductor structure. The at least one first sensor is structured and arranged to detect a defect, and the second sensor is structured and arranged to identify an interface where the defect exists.
    Type: Application
    Filed: March 27, 2008
    Publication date: October 1, 2009
    Inventors: John J. Maloney, Wolfgang Sauter, Thomas A. Wassick, Jeffrey S. Zimmerman
  • Patent number: 7294909
    Abstract: A multilayer ceramic repair process which provides a new electrical repair path to connect top surface vias. The repair path is established between a defective net and a redundant repair net contained within the multilayer ceramic substrate. The defective net and the repair net each terminate at surface vias of the substrate. A laser is used to form post fired circuitry on and in the substrate. This is followed by the electrical isolation of the defective net from the electrical repair structure and passivation of the electrical repair line.
    Type: Grant
    Filed: April 5, 2005
    Date of Patent: November 13, 2007
    Assignee: International Business Machines Corporation
    Inventors: Jon A. Casey, James G. Balz, Michael Berger, Jerome Cohen, Charles Hendricks, Richard Indyk, Mark LaPlante, David C. Long, Lori A. Maiorino, Arthur G. Merryman, Glenn A. Pomerantz, Robert A. Rita, Krystyna W. Semkow, Patrick E. Spencer, Brian R. Sundlof, Richard P. Surprenant, Donald R. Wall, Thomas A. Wassick, Kathleen M. Wiley
  • Publication number: 20050176255
    Abstract: A multilayer ceramic repair process which provides a new electrical repair path to connect top surface vias. The repair path is established between a defective net and a redundant repair net contained within the multilayer ceramic substrate. The defective net and the repair net each terminate at surface vias of the substrate. A laser is used to form post fired circuitry on and in the substrate. This is followed by the electrical isolation of the defective net from the electrical repair structure and passivation of the electrical repair line.
    Type: Application
    Filed: April 5, 2005
    Publication date: August 11, 2005
    Inventors: Jon Casey, James Balz, Michael Berger, Jerome Cohen, Charles Hendricks, Richard Indyk, Mark LaPlante, David Long, Lori Maiorino, Arthur Merryman, Glenn Pomerantz, Robert Rita, Krystyna Semkow, Patrick Spencer, Brian Sundlof, Richard Surprenant, Donald Wall, Thomas Wassick, Kathleen Wiley
  • Patent number: 6916670
    Abstract: A multilayer ceramic repair process which provides a new electrical repair path to connect top surface vias. The repair path is established between a defective net and a redundant repair net contained within the multilayer ceramic substrate. The defective net and the repair net each terminate at surface vias of the substrate. A laser is used to form post fired circuitry on and in the substrate. This is followed by the electrical isolation of the defective net from the electrical repair structure and passivation of the electrical repair line.
    Type: Grant
    Filed: February 4, 2003
    Date of Patent: July 12, 2005
    Assignee: International Business Machines Corporation
    Inventors: Jon A. Casey, James G. Balz, Michael Berger, Jerome Cohen, Charles Hendricks, Richard Indyk, Mark LaPlante, David C. Long, Lori A. Maiorino, Arthur G. Merryman, Glenn A. Pomerantz, Robert A. Rita, Krystyna W. Semkow, Patrick E. Spencer, Brian R. Sundlof, Richard P. Surprenant, Donald R. Wall, Thomas A. Wassick, Kathleen M. Wiley
  • Publication number: 20050082676
    Abstract: This disclosure teaches a method of filling deep vias or capping deep conducting paste filled vias in silicon or glass substrate using laser assisted chemical vapor deposition of metals. This method uses a continuous wave or pulsed laser to heat the via bottom and the growing metal fill selectively by selecting the laser wavelength such that silicon and/or glass do not absorb the energy of the laser in any appreciable manner to cause deposition in the field. Alternatively holographic mask or an array of micro lenses may be used to focus the laser beams to the vias to fill them with metal. The substrate is moved in a controlled manner in the z-direction away from the laser at about the rate of deposition thus causing the laser heating to be focused on the surface region of the growing metal fill.
    Type: Application
    Filed: October 17, 2003
    Publication date: April 21, 2005
    Applicant: International Business Machines Corporation
    Inventors: Paul Andry, Leena Buchwalter, Russell Budd, Thomas Wassick
  • Patent number: 6823585
    Abstract: A method and structure to form surface plating metallization on a substrate. Two layers of tape are applied to the surface of the substrate. A first path is cut through both layers of tape exposing the substrate surface. The first path connects at least one conductive via on the top surface of the substrate. A second path is cut through the second layer of tape exposing the first layer of tape. The second path is routed from the first path to an edge of the substrate A seed layer is deposited over the surface of the second layer of tape thereby creating a seeded plating path in the first path and a sacrificial seeded conduction path in the second path. Connecting the sacrificial seeded conduction path to a plating potential at the edge of the substrate creates a plated path on the surface of the substrate. The sacrificial path is removed when the tape is removed.
    Type: Grant
    Filed: March 28, 2003
    Date of Patent: November 30, 2004
    Assignee: International Business Machines Corporation
    Inventors: Mark J. LaPlante, Jon A. Casey, Thomas A. Wassick, David C. Long, Krystyna W. Semkow, Patrick E. Spencer, Robert A. Rita, Richard F. Indyk, Kathleen M. Wiley, Brian R. Sundlof, James Balz, Lori A. Maiorino, Donald R. Wall, Glenn A. Pomerantz
  • Publication number: 20040187303
    Abstract: A method and structure to form surface plating metallization on a substrate. Two layers of tape are applied to the surface of the substrate. A first path is cut through both layers of tape exposing the substrate surface. The first path connects at least one conductive via on the top surface of the substrate. A second path is cut through the second layer of tape exposing the first layer of tape. The second path is routed from the first path to an edge of the substrate A seed layer is deposited over the surface of the second layer of tape thereby creating a seeded plating path in the first path and a sacrificial seeded conduction path in the second path. Connecting the sacrificial seeded conduction path to a plating potential at the edge of the substrate creates a plated path on the surface of the substrate. The sacrificial path is removed when the tape is removed.
    Type: Application
    Filed: March 28, 2003
    Publication date: September 30, 2004
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Mark J. LaPlante, Jon A. Casey, Thomas A. Wassick, David C. Long, Krystyna W. Semkow, Patrick E. Spencer, Robert A. Rita, Richard F. Indyk, Kathleen M. Wiley, Brian R. Sundlof, James Balz, Lori A. Maiorino, Donald R. Wall, Glenn A. Pomerantz
  • Publication number: 20040148765
    Abstract: A multilayer ceramic repair process which provides a new electrical repair path to connect top surface vias. The repair path is established between a defective net and a redundant repair net contained within the multilayer ceramic substrate. The defective net and the repair net each terminate at surface vias of the substrate. A laser is used to form post fired circuitry on and in the substrate. This is followed by the electrical isolation of the defective net from the electrical repair structure and passivation of the electrical repair line.
    Type: Application
    Filed: February 4, 2003
    Publication date: August 5, 2004
    Applicant: International Business Machines Corporation
    Inventors: Jon A. Casey, James G. Balz, Michael Berger, Jerome Cohen, Charles Hendricks, Richard Indyk, Mark LaPlante, David C. Long, Lori A. Maiorino, Arthur G. Merryman, Glenn A. Pomerantz, Robert A. Rita, Krystyna W. Semkow, Patrick E. Spencer, Brian R. Sundlof, Richard P. Surprenant, Donald R. Wall, Thomas A. Wassick, Kathleen M. Wiley
  • Patent number: 6682872
    Abstract: Radiation-curable compositions are provided for use in the fabrication of electronic components as passivation coatings; for defect repair in ceramic and thin film products by micropassivation in high circuit density electronic modules to allow product recovery; as a solder mask in electronic assembly processes; for use as protective coatings on printed circuit board (PCB) circuitry and electronic devices against mechanical damage and corrosion from exposure to the environment. The compositions are solvent-free, radiation-curable, preferably uv-curable, containing a polymer binder, which is a pre-formed thermoplastic or elastomeric polymer/oligomer, a monofunctional and/or bifunctional acrylic monomer, a multifunctional (more than 2 reactive groups) acrylated/methacrylated monomer, and a photoinitiator, where all the constituents are mutually miscible forming a homogeneous viscous blend without the addition of an organic solvent. The compositions may also contain inorganic fillers and/or nanoparticle fillers.
    Type: Grant
    Filed: January 22, 2002
    Date of Patent: January 27, 2004
    Assignee: International Business Machines Corporation
    Inventors: Krishna G. Sachdev, Michael Berger, Rebecca Y. Gorrell, Gregg B. Monjeau, Bernadette H. Perry, Thomas A. Wassick
  • Publication number: 20030138733
    Abstract: Radiation-curable compositions are provided for use in the fabrication of electronic components as passivation coatings; for defect repair in ceramic and thin film products by micropassivation in high circuit density electronic modules to allow product recovery; as a solder mask in electronic assembly processes; for use as protective coatings on printed circuit board (PCB) circuitry and electronic devices against mechanical damage and corrosion from exposure to the environment. The compositions are solvent-free, radiation-curable, preferably uv-curable, containing a polymer binder, which is a pre-formed thermoplastic or elastomeric polymer/oligomer, a monofunctional and/or bifunctional acrylic monomer, a multifunctional (more than 2 reactive groups) acrylated/methacrylated monomer, and a photoinitiator, where all the constituents are mutually miscible forming a homogeneous viscous blend without the addition of an organic solvent. The compositions may also contain inorganic fillers and/or nanoparticle fillers.
    Type: Application
    Filed: January 22, 2002
    Publication date: July 24, 2003
    Applicant: International Business Machines Corporation
    Inventors: Krishna G. Sachdev, Michael Berger, Rebecca Y. Gorrell, Gregg B. Monjeau, Bernadette H. Perry, Thomas A. Wassick
  • Patent number: 6541709
    Abstract: A multilayer thin film structure having defined strap repair lines thereon and a method for repairing interconnections in the multilayer thin film structure (MLTF) and/or making engineering changes (EC) are provided. The method determines interconnection defects in the MLTF at a thin film layer adjacent the top metal layer of the structure, defines the top surface metallization including a series of orthogonal X conductor lines and Y conductor lines using photoresist and lithography and additive or subtractive metallization techniques and then uses a phototool to selectively expose the photoresist to define top surface strap connections needed to repair the interconnections and/or make EC's, and forms the top surface metallization.
    Type: Grant
    Filed: November 1, 1996
    Date of Patent: April 1, 2003
    Assignee: International Business Machines Corporation
    Inventors: Peter A. Franklin, Arthur G. Merryman, Rajesh S. Patel, Thomas A. Wassick
  • Patent number: 6455331
    Abstract: A device repair process that includes removing a passivation polyimide layer. The passivation polyimide layer is removed using a first-half ash followed by a second-half ash. The device is rotated during the second-half ash. The device is then cleaned using sodium hydroxide (NaOH) and a subsequent light ash step is implemented. After the passivation polyimide layer is removed, a seed layer is deposited on the device. A photoresist is formed on the seed layer and bond sites are formed in the photoresist. Repair metallurgy is plated through the bond sites. The bond sites are plated by coupling the device to a fixture and applying the current for plating to the fixture. The contact between the device and the fixture is made though bottom surface metallurgy. After plating, the residual seed layer is removed and a laser delete process is implemented to disconnect and isolate the nets of the device.
    Type: Grant
    Filed: May 29, 2001
    Date of Patent: September 24, 2002
    Assignee: International Business Machines Corporation
    Inventors: Roy Yu, Kamalesh S. Desai, Peter A. Franklin, Suryanarayana Kaja, Kimberley A. Kelly, Yeeling L. Lee, Arthur G. Merryman, Frank R. Morelli, Thomas A. Wassick
  • Patent number: 6427324
    Abstract: A multilayer thin film structure having defined strap repair lines thereon and a method for repairing interconnections in the multilayer thin film structure (MLTF) and/or making engineering changes (EC) are provided. The method comprises determining interconnection defects in the MLTF at a thin film layer adjacent the top metal layer of the structure, defining the top surface metallization including a series of orthogonal X conductor lines and Y conductor lines using photoresist and lithography and additive or phototool to selectively expose the photoresist to define top surface strap connections needed to repair the interconnections and/or make EC's, and forming the top surface metallization.
    Type: Grant
    Filed: July 13, 1998
    Date of Patent: August 6, 2002
    Assignee: International Business Machines Corporation
    Inventors: Peter A. Franklin, Arthur G. Merryman, Rajesh S. Patel, Thomas A. Wassick
  • Patent number: 6323045
    Abstract: A method and structure for providing top-to-bottom repair of a defective I/O net in a thin film transfer and join process. At least one C4 location and at least one capture pad are provided on a thin film substrate. The substrate is preferably ceramic. The C4 location of the defective net is severed by removal of a delete strap. The corresponding solder connection of the associated capture pad is also removed. A spare C4 location and capture pad are connected to provide a Z-repair line imbedded in the TF wiring structure. The Z-repair line is wired to the defective net.
    Type: Grant
    Filed: December 8, 1999
    Date of Patent: November 27, 2001
    Assignee: International Business Machines Corporation
    Inventors: Christopher Cline, Nancy W. Hannon, Chandrika Prasad, Thomas A. Wassick, Roy Yu
  • Publication number: 20010023081
    Abstract: A device repair process that includes removing a passivation polyimide layer. The passivation polyimide layer is removed using a first-half ash followed by a second-half ash. The device is rotated during the second-half ash. The device is then cleaned using sodium hydroxide (NaOH) and a subsequent light ash step is implemented. After the passivation polyimide layer is removed, a seed layer is deposited on the device. A photoresist is formed on the seed layer and bond sites are formed in the photoresist. Repair metallurgy is plated through the bond sites. The bond sites are plated by coupling the device to a fixture and applying the current for plating to the fixture. The contact between the device and the fixture is made though bottom surface metallurgy. After plating, the residual seed layer is removed and a laser delete process is implemented to disconnect and isolate the nets of the device.
    Type: Application
    Filed: May 29, 2001
    Publication date: September 20, 2001
    Inventors: Roy Yu, Kamalesh S. Desal, Peter A. Franklin, Suryanatayana Kala, Kimberley A. Kelly, Yeeling L. Lee, Arthur G. Merryman, Frank R. Morelll, Thomas A. Wassick
  • Patent number: 6248599
    Abstract: A device repair process that includes removing a passivation polyimide layer. The passivation polyimide layer is removed using a first-half ash followed by a second-half ash. The device is then cleaned using sodium hydroxide (NaOH) and a subsequent light ash step is implemented. After the passivation polyimide layer is removed, a seed layer is deposited on the device. A photoresist is formed on the seed layer and bond sites are formed in the photoresist. Repair metallurgy is plated through the bond sites. The bond sites are plated by coupling the device to a fixture and applying the current for plating to the fixture. The contact between the device and the fixture is made though bottom surface metallurgy. After plating, the residual seed layer is removed and a laser delete process is implemented to disconnect and isolate the nets of the device.
    Type: Grant
    Filed: December 2, 1999
    Date of Patent: June 19, 2001
    Assignee: International Business Machines Corporation
    Inventors: Roy Yu, Kamalesh S. Desai, Peter A. Franklin, Suryanarayana Kaja, Kimberley A. Kelly, Yeeling L. Lee, Arthur G. Merryman, Frank R. Morelli, Thomas A. Wassick