Abstract: A method and apparatus for performing atomic layer deposition in which a surface of a substrate is pretreated to make the surface of the substrate reactive for performing atomic layer deposition.

Abstract: Improvements to chemical vapor deposition processes are taught for depositing tungsten nitride in semiconductor manufacturing processes. In one irmproved process NF3 is used as a source of nitrogen, and a plasma is introduced under controlled conditions to control particle formation and lower the temperature at which acceptable films may be produced. In another set of processes substantially pure tungsten is produced by rapid thermal annealing of substantially amorphous tungsten nitride at temperatures lower than achieved in the art, by using hydrogen in the ambient atmosphere. In yet another set of new processes particle formation and step coverage enhancement when using NH3 as a nitrogen source is controlled by limiting the pressure at which source gases mix, by unique wall coating technique, and by controlling chamber wall temperature.

Abstract: A method and apparatus for the use of individual vertically stacked ALD or CVD reactors. Individual reactors are independently operable and maintainable. The gas inlet and output are vertically configured with respect to the reactor chamber for generally axi-symmetric process control. The chamber design is modular in which cover and base plates forming the reactor have improved flow design.

Abstract: A method and apparatus for fabricating a metal-insulator-metal capacitor by performing atomic layer deposition (ALD). A fully integrated process flow prevents electrode-dielectric contamination during an essential ex situ bottom electrode patterning step.

Abstract: A method and apparatus for performing atomic layer deposition in which a surface of a substrate is pretreated to make the surface of the substrate reactive for performing atomic layer deposition.

Abstract: A method and apparatus for performing atomic layer deposition in which a surface of a substrate is pretreated to make the surface of the substrate reactive for performing atomic layer deposition.

Abstract: A processing station adaptable to standard cluster tools has a vertically-translatable pedestal having an upper wafer-support surface including a heater plate adapted to be plugged into a unique feedthrough in the pedestal. At a lower position for the pedestal wafers may be transferred to and from the processing station, and at an upper position for the pedestal the pedestal forms an annular pumping passage with a lower circular opening in a processing chamber. A removable, replaceable ring at the lower opening of the processing chamber allows process pumping speed to be tailored for different processes by replacing the ring. In some embodiments the pedestal also has a surrounding shroud defining an annular pumping passage around the pedestal. A unique two-zone heater plate is adapted to the top of the pedestal, and connects to a unique feedthrough allowing heater plates to be quickly and simply replaced.

Abstract: A processing station adaptable to standard cluster tools has a vertically-translatable pedestal having an upper wafer-support surface including a heater plate adapted to be plugged into a unique feedthrough in the pedestal. At a lower position for the pedestal wafers may be transferred to and from the processing station, and at an upper position for the pedestal the pedestal forms an annular pumping passage with a lower circular opening in a processing chamber. A removable, replaceable ring at the lower opening of the processing chamber allows process pumping speed to be tailored for different processes by replacing the ring. In some embodiments the pedestal also has a surrounding shroud defining an annular pumping passage around the pedestal. A unique two-zone heater plate is adapted to the top of the pedestal, and connects to a unique feedthrough allowing heater plates to be quickly and simply replaced.

Abstract: A processing station adaptable to standard cluster tools has a vertically-translatable pedestal having an upper wafer-support surface including a heater plate adapted to be plugged into a unique feedthrough in the pedestal. At a lower position for the pedestal wafers may be transferred to and from the processing station, and at an upper position for the pedestal the pedestal forms an annular pumping passage with a lower circular opening in a processing chamber. A removable, replaceable ring at the lower opening of the processing chamber allows process pumping speed to be tailored for different processes by replacing the ring. In some embodiments the pedestal also has a surrounding shroud defining an annular pumping passage around the pedestal. A unique two-zone heater plate is adapted to the top of the pedestal, and connects to a unique feedthrough allowing heater plates to be quickly and simply replaced.

Abstract: A technique for fabricating a dual damascene interconnect structure using a low dielectric constant material as a dielectric layer or layers. A low dielectric constant (low-.di-elect cons.) dielectric material is used to form an inter-level dielectric (ILD) layer between metallization layers and in which via and trench openings are formed in the low-.di-elect cons. ILD. The dual damascene technique allows for both the via and trench openings to be filled at the same time.

Abstract: A technique for fabricating a dual damascene interconnect structure using a low dielectric constant material as a dielectric layer or layers. A low dielectric constant (low-.epsilon.) dielectric material is used to form an inter-level dielectric (ILD) layer between metallization layers and in which via and trench openings are formed in the low-.epsilon. ILD. The dual damascene technique allows for both the via and trench openings to be filled at the same time.

Abstract: A low profile, compact atomic layer deposition reactor (LP-CAR) has a low-profile body with a substrate processing region adapted to serve a single substrate or a planar array of substrates, and a valved load and unload port for substrate loading and unloading to and from the LP-CAR. The body has an inlet adapted for injecting a gas or vapor at the first end, and an exhaust exit adapted for evacuating gas and vapor at the second end. The LP-CAR has an external height no greater than any horizontal dimension, and more preferably no more than two-thirds any horizontal dimension, facilitating a unique system architecture. An internal processing region is distinguished by having a vertical extent no greater than one fourth the horizontal extent, facilitating fast gas switching. In some embodiments one substrate at a time is processed, and in other embodiments there may be multiple substrates arranged in the processing region in a planar array.

Abstract: Selective etching of a conformal nitride layer overlying a conformal oxide layer and a subsequent etching of the oxide layer provide for a staircase shaped sidewall spacer which is used to align source and drain regions during implantation. Extent of the implanted n-/n+ and/or p-/p+ regions within the substrate can be tightly controlled due to the tight dimensional tolerances obtained by the footprint of the spacer. Further the source/drain profiles can be utilized with elevated polysilicon and elevated polysilicon having subsequent salicidation.

Abstract: It is known to utilize dielectric-filled trenches in a CMOS integrated-circuit device to achieve electrical isolation between adjacent n-channel and p-channel regions. In that way, latchup-free operation of the device is ensured. But inversion effects along the walls of the trenches can cause high leakage currents, undesirably high parasitic capacitances and even shorting together of source/drain regions. In accordance with the invention, a nonlithographic technique including selective anodic oxidation is employed to selectively mask the sidewalls of the trenches. Each sidewall can then be independently doped thereby effectively eliminating the possibility of inversion occurring therealong.

Abstract: Selective wet or plasma anodization is utilized for forming a relatively thick dielectric layer only at the bottoms of trenches included in DRAM and/or CMOS devices. In that way, the electrical characteristics of trenches that include bottoms having surface roughness and/or sharp or irregular corners are significantly improved. Additionally, electrically isolated capacitor structures in elongated trenches formed in DRAM devices are thereby made feasible.

Abstract: A method of making solid state devices having multilayer dopant distributions, including p-p+ and n-n+ junctions, etc. A semiconductor body is rapidly melted, typically by a laser, electron beam, or ion beam. Present in the melt is a first dopant having a low segregation coefficient and a second dopant having a high segregation coefficient. During rapid resolidification of the melt, the first dopant segregates toward the surface, while the second dopant remains substantially in place, producing a junction. The production of diodes, bipolar and field effect transistors, Schottky barriers, ohmic contacts, junction isolated surface regions, high conductivity paths, etc., is possible by this method.

Abstract: The sharp features that appear on metallization patterns defined by conventional etching processes can be eliminated by instantaneous melting with short laser pulses. Flow is minimized due to the brevity of the lifetime of the molten state but surface tension removes the sharp corners. With polysilicon metallization conductivity is also improved.