Patents by Inventor Thomas Evans

Thomas Evans has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6963129
    Abstract: A system and method are provided for forming a multi-chip package. The multi-chip package includes a multi-layer substrate and a heat spreader of single, unibody construction. At least two integrated circuits are coupled between the multi-layer substrate and the heat spreader. The integrated circuits are spaced from one another to allow airflow between those circuits and a portion of the underside surface of the heat spreader. Depending on the layout of the package, a passive device can also be placed in the space between integrated circuits. The passive device extends upward a spaced distance from the underneath surface of the heat spreader so as not to block the airflow therebetween. The multi-chip package can accommodate integrated circuits that are either all packaged, all unpackaged, or a combination of each.
    Type: Grant
    Filed: June 18, 2003
    Date of Patent: November 8, 2005
    Assignee: LSI Logic Corporation
    Inventors: Thomas Evans, Stan Mihelcic, Leah M. Miller, Kumar Nagarajan, Edwin M. Fulcher
  • Publication number: 20050202746
    Abstract: A toy mobile capable of being suspended in the air from an overhead support structure and having at least one relatively thin vane capable of capturing air currents includes a coating of photoluminescent material layered upon the relatively thin vane of the mobile so that the vane is capable of being seen in the dark.
    Type: Application
    Filed: March 8, 2005
    Publication date: September 15, 2005
    Inventor: Thomas Evans
  • Publication number: 20050178048
    Abstract: An aqueous fuel for generating hydrogen includes alkaline aqueous composition of about 17 to 37 mole percent of a sodium borohydride, and from about 0.001 to 1 mole percent of sodium hydroxide.
    Type: Application
    Filed: March 10, 2005
    Publication date: August 18, 2005
    Inventors: Charles Lumsden, Thomas Evans
  • Publication number: 20050112768
    Abstract: Disclosed is a method of authenticating that a test polymer is a tagged polymer comprising a substrate polymer, a compound comprising a forensic authentication marker, and a dynamic response authentication marker, said forensic authentication marker being present in the tagged polymer in an amount sufficient to be detected by a forensic analytical technique and said dynamic response authentication marker being present in the tagged polymer in an amount sufficient to be detected by a dynamic response analytical technique, said method of authenticating comprising testing the test polymer for the forensic authentication marker using a forensic analytical technique, testing the test polymer for the dynamic response authentication marker using a dynamic response analytical technique, and authenticating that a test polymer is a tagged polymer if the forensic authentication marker and dynamic authentication marker are detected.
    Type: Application
    Filed: November 26, 2003
    Publication date: May 26, 2005
    Inventors: Thomas Evans, Sriramakrishna Maruvada, Vandita Pai-Paranjape, Philippe Schottland
  • Publication number: 20050100987
    Abstract: A method for the ligation of expressed proteins which utilizes inteins, for example the RIR1 intein from Methanobacterium thermotrophicum , is provided. Constructs of the Mth RIR1 intein in which either the C-terminal asparagine or N-terminal cysteine of the intein are replaced with alanine enable the facile isolation of a protein with a specified N-terminal, for example, cysteine for use in the fusion of two or more expressed proteins. The method involves the steps of generating a C-terminal thioester-tagged target protein and a second target protein having a specified N-terminal via inteins, such as the modified Mth RIR1 intein, and ligating these proteins. A similar method for producing a cyclic or polymerized protein is provided. Modified inteins engineered to cleave at their C-terminus or N-terminus, respectively, and DNA and plasmids encoding these modified inteins are also provided.
    Type: Application
    Filed: October 7, 2004
    Publication date: May 12, 2005
    Inventors: Thomas Evans, Ming Xu, Shaorong Chong
  • Patent number: 6854275
    Abstract: An automated storage library including: an enclosure having a cartridge storage area in an interior of the enclosure; a plurality of media cartridges disposed in the cartridge storage area; and a cooling unit operatively connected to the enclosure for cooling at least the cartridge storage area of the enclosure. Preferably, the enclosure has an exterior wall and the cooling unit is at least partially disposed in the exterior wall. More preferably, the cooling unit is a thermoelectric cooler having a hot side disposed on an exterior of the enclosure and a cold side disposed in the interior of the enclosure.
    Type: Grant
    Filed: August 8, 2002
    Date of Patent: February 15, 2005
    Assignee: International Business Machines Corporation
    Inventor: Jeremy Thomas Evans
  • Publication number: 20040033630
    Abstract: A charge storage capacitor includes a bottom electrode, a dielectric layer formed on the bottom electrode, and a local interconnect electrode formed on the dielectric layer, wherein the dielectric layer is an encapsulation layer, and a ferroelectric memory cell includes the charge storage capacitor.
    Type: Application
    Filed: July 15, 2003
    Publication date: February 19, 2004
    Inventors: Glen Fox, Thomas Evans
  • Publication number: 20040025515
    Abstract: An automated storage library including: an enclosure having a cartridge storage area in an interior of the enclosure; a plurality of media cartridges disposed in the cartridge storage area; and a cooling unit operatively connected to the enclosure for cooling at least the cartridge storage area of the enclosure. Preferably, the enclosure has an exterior wall and the cooling unit is at least partially disposed in the exterior wall. More preferably, the cooling unit is a thermoelectric cooler having a hot side disposed on an exterior of the enclosure and a cold side disposed in the interior of the enclosure.
    Type: Application
    Filed: August 8, 2002
    Publication date: February 12, 2004
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventor: Jeremy Thomas Evans
  • Patent number: 6597028
    Abstract: A ferroelectric memory cell includes a ferroelectric capacitor including a bottom electrode, a ferroelectric layer formed on the bottom electrode and a top electrode formed on the ferroelectric layer, a high permittivity dielectric layer formed over the ferroelectric capacitor, wherein the high permittivity dielectric layer includes an encapsulation layer and completely covers the top electrode, and a local interconnect electrode formed on the encapsulation layer.
    Type: Grant
    Filed: June 4, 2001
    Date of Patent: July 22, 2003
    Assignee: Ramtron International Corporation
    Inventors: Glen Fox, Thomas Evans
  • Publication number: 20030067027
    Abstract: A charge storage capacitor includes a bottom electrode, a dielectric layer formed on the bottom electrode, and a local interconnect electrode formed on the dielectric layer, wherein the dielectric layer is an encapsulation layer, and a ferroelectric memory cell includes the charge storage capacitor.
    Type: Application
    Filed: November 4, 2002
    Publication date: April 10, 2003
    Inventors: Glen Fox, Thomas Evans
  • Publication number: 20030069926
    Abstract: A system and method for reducing the impact of high latency links for interactive applications is described. In one embodiment, a list identifying locally stored data, which correspond to a data page, is received. Additionally, an index page corresponding to the data page is received. This index page can include a list of data objects included in the web page. Next, a determination is made as to which data objects included in the index page are subject to a prefetch, and a corresponding prefetch request is generated.
    Type: Application
    Filed: October 9, 2001
    Publication date: April 10, 2003
    Inventors: Jeffrey Charles Weaver, Andrew Wilson Sundelin, Thomas Evans Moore
  • Publication number: 20030069925
    Abstract: A system and method for reducing the impact of high latency links for interactive applications is described. In one embodiment, a user, connected to the Internet by a satellite network, requests a web page from an origin server. The origin server generates an index page associated with the requested web page and passes that index page to an gateway PEP (performance enhancing proxy), which parses the index page to identify the objects identified therein. Next, the gateway PEP generates the requests to prefetch those identified objects and passes those requests to the origin server. These objects are then retrieved and pushed to the user. To avoid repetitive requests, the fetch requests normally generated by a web browser are blocked by a client PEP.
    Type: Application
    Filed: October 9, 2001
    Publication date: April 10, 2003
    Inventors: Jeffrey Charles Weaver, Andrew Wilson Sundelin, Thomas Evans Moore
  • Patent number: 6500591
    Abstract: A method to achieve good stepper focus and exposure over an entire wafer for a particular mask level before the start of a product run is described. This method can also be used to produce a characterization of lens field curvature (i.e., a surface of optimum focus across the lens) and to characterize lens astigmatism, defocus sensitivity, relative resolution, and other characteristics, and to check the stepper for optical column tilt. The process prevents the complexities of resist development from affecting determination of focus. The process involves forming an array of latent images in a resist and examining the scattered light from the edges of the latent images. Analysis of the scattered light quickly provides information on correct exposure and focus together with lens characteristics over the printing field.
    Type: Grant
    Filed: February 9, 1999
    Date of Patent: December 31, 2002
    Assignee: Lucent Technologies Inc.
    Inventor: Thomas Evans Adams
  • Patent number: 6499971
    Abstract: A compressor system includes a housing with a low pressure first chamber and a high pressure second chamber. A motor in the first chamber has a shaft that passes into the second chamber. A compressor in the housing is operably connected to the motor by the shaft. The second chamber contains an oil sump storing lubricating oil for the compressor. A fluid path through the compressor system includes a first orifice in the housing communicating a suction tube with the first chamber, a first fluid passage communicating the first chamber with the compressor suction port, a second fluid passage communicating the compressor discharge port with the second chamber, and a second orifice in the housing communicating the second chamber with a discharge tube. By the action of the compressor, the fluid in the first chamber is maintained at compressor suction pressure and the fluid in the second chamber is maintained at compressor discharge pressure.
    Type: Grant
    Filed: December 1, 2000
    Date of Patent: December 31, 2002
    Assignee: Bristol Compressors, Inc.
    Inventors: John Kenneth Narney, II, David Turner Monk, Thomas Evans Goodnight
  • Patent number: 6492673
    Abstract: A charge storage capacitor includes a bottom electrode, a dielectric layer formed on the bottom electrode, and a local interconnect electrode formed on the dielectric layer, wherein the dielectric layer is an encapsulation layer, and a ferroelectric memory cell includes the charge storage capacitor.
    Type: Grant
    Filed: May 22, 2001
    Date of Patent: December 10, 2002
    Assignee: Ramtron International Corporation
    Inventors: Glen Fox, Thomas Evans
  • Publication number: 20020175361
    Abstract: A charge storage capacitor includes a bottom electrode, a dielectric layer formed on the bottom electrode, and a local interconnect electrode formed on the dielectric layer, wherein the dielectric layer is an encapsulation layer, and a ferroelectric memory cell includes the charge storage capacitor.
    Type: Application
    Filed: May 22, 2001
    Publication date: November 28, 2002
    Inventors: Glen Fox, Thomas Evans
  • Publication number: 20020072473
    Abstract: The invention concerns a method of removing soil from a surface, comprises the steps of:
    Type: Application
    Filed: August 28, 2001
    Publication date: June 13, 2002
    Applicant: Unilever Home & Personal Care USA, Division of Conopco, Inc.
    Inventors: Alexander Thomas Ashcroft, Melvin Carvell, Clare Thomas Evans, Peter Graham, Matthew James Leach, Colina Mackay, Antonius Maria Neplenbroek, Steven Rannard, Bouke Suk, David William Thornthwaite
  • Publication number: 20020067998
    Abstract: A compressor system includes a housing with a low pressure first chamber and a high pressure second chamber. A motor in the first chamber has a shaft that passes into the second chamber. A compressor in the housing is operably connected to the motor by the shaft. The second chamber contains an oil sump storing lubricating oil for the compressor. A fluid path through the compressor system includes a first orifice in the housing communicating a suction tube with the first chamber, a first fluid passage communicating the first chamber with the compressor suction port, a second fluid passage communicating the compressor discharge port with the second chamber, and a second orifice in the housing communicating the second chamber with a discharge tube. By the action of the compressor, the fluid in the first chamber is maintained at compressor suction pressure and the fluid in the second chamber is maintained at compressor discharge pressure.
    Type: Application
    Filed: December 1, 2000
    Publication date: June 6, 2002
    Inventors: John Kenneth Narney, David Turner Monk, Thomas Evans Goodnight
  • Patent number: 6358755
    Abstract: A ferroelectric capacitor stack for use with an integrated circuit transistor in a ferroelectric memory cell is fabricated by: forming a first dielectric layer over the integrated circuit transistor; forming a bottom electrode over the first dielectric layer, the bottom electrode having a hole located over a first source/drain of the integrated circuit transistor; forming a second dielectric layer over the first dielectric layer and bottom electrode; forming a hole in the second dielectric layer to provide access to the bottom electrode; forming a ferroelectric plug in the hole in the second dielectric layer; forming a top electrode over the second dielectric layer and ferroelectric plug; forming a third dielectric layer over the second dielectric layer and top electrode; forming a first via through the first, second, and third dielectric layers, and through the hole in the bottom electrode, the via having sufficient width to provide access to a lateral edge of the bottom electrode hole; forming a second via
    Type: Grant
    Filed: August 17, 2000
    Date of Patent: March 19, 2002
    Assignee: Ramtron International Corporation
    Inventor: Thomas A. Evans
  • Patent number: D495285
    Type: Grant
    Filed: January 13, 2004
    Date of Patent: August 31, 2004
    Assignee: SJCA Wheels, Incorporated
    Inventor: Thomas Evan Phillips