Patents by Inventor Thomas Langdo

Thomas Langdo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Methods for Forming Semiconductor Device Structures
    Publication number: 20150243788
    Abstract: The benefits of strained semiconductors are combined with silicon-on-insulator approaches to substrate and device fabrication.
    Type: Application
    Filed: May 8, 2015
    Publication date: August 27, 2015
    Inventors: Anthony J. Lochtefeld, Thomas A. Langdo, Richard Hammond, Matthew T. Currie, Eugene A. Fitzgerald
  • Lattice-Mismatched Semiconductor Structures with Reduced Dislocation Defect Densities and Related Methods for Device Fabrication
    Publication number: 20150200246
    Abstract: Fabrication of monolithic lattice-mismatched semiconductor heterostructures with limited area regions having upper portions substantially exhausted of threading dislocations, as well as fabrication of semiconductor devices based on such lattice-mismatched heterostructures.
    Type: Application
    Filed: March 2, 2015
    Publication date: July 16, 2015
    Inventors: Anthony J. Lochtefeld, Matthew T. Currie, Zhiyuan Cheng, James Fiorenza, Glyn Braithwaite, Thomas A. Langdo
  • Methods for forming semiconductor device structures
    Patent number: 9064930
    Abstract: The benefits of strained semiconductors are combined with silicon-on-insulator approaches to substrate and device fabrication.
    Type: Grant
    Filed: October 15, 2013
    Date of Patent: June 23, 2015
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Thomas A. Langdo, Anthony J. Lochtefeld, Richard Hammond, Matthew T. Currie, Eugene A. Fitzgerald
  • WATER PURIFICATION AND ENHANCEMENT SYSTEMS
    Publication number: 20150166382
    Abstract: Water purification system comprising filtration media sized with respect to each other to allow a first contaminant in the water to saturate the first medium with a delay prior to saturation of the second medium with a second contaminant.
    Type: Application
    Filed: July 18, 2014
    Publication date: June 18, 2015
    Applicant: The Water Initiative, LLC
    Inventors: Eugene A. Fitzgerald, Ya-Hong Xie, Thomas Langdo, Richard Renjilian, Carl V. Thompson
  • CONTROLLED RELEASE APPARATUS AND USES THEREOF
    Publication number: 20150125528
    Abstract: An apparatus is provided comprising one or more matrices contained within a shell, wherein the one or more matrices comprise between 1-99 wt % of a water-insoluble host material and between 1-99 wt % of a guest substrate, wherein the guest substrate comprises between 1-100 wt % of one or more disinfectant compounds or one or more beneficial compounds; and wherein the shell comprises a water-insoluble shell polymer, and one or more apertures. The host material may be a polymer. The apparatus is used for treating an aqueous medium with one or more disinfectant compounds or one or more beneficial compounds.
    Type: Application
    Filed: January 4, 2013
    Publication date: May 7, 2015
    Inventors: Thomas A. Langdo, Eugene A. Fitzgerald, Richard Renjilian, Larry R. Brown, Robert S. Langer
  • Lattice-mismatched semiconductor structures with reduced dislocation defect densities and related methods for device fabrication
    Patent number: 8987028
    Abstract: Fabrication of monolithic lattice-mismatched semiconductor heterostructures with limited area regions having upper portions substantially exhausted of threading dislocations, as well as fabrication of semiconductor devices based on such lattice-mismatched heterostructures.
    Type: Grant
    Filed: June 24, 2014
    Date of Patent: March 24, 2015
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Anthony J. Lochtefeld, Matthew T. Currie, Zhiyuan Cheng, James Fiorenza, Glyn Braithwaite, Thomas A. Langdo
  • Lattice-Mismatched Semiconductor Structures with Reduced Dislocation Defect Densities and Related Methods for Device Fabrication
    Publication number: 20140374798
    Abstract: Fabrication of monolithic lattice-mismatched semiconductor heterostructures with limited area regions having upper portions substantially exhausted of threading dislocations, as well as fabrication of semiconductor devices based on such lattice-mismatched heterostructures.
    Type: Application
    Filed: June 24, 2014
    Publication date: December 25, 2014
    Inventors: Anthony J. Lochtefeld, Matthew T. Currie, Zhiyuan Cheng, James Fiorenza, Glyn Braithwaite, Thomas A. Langdo
  • METHOD AND APPARATUS FOR POINT OF USE WATER FILTRATION
    Publication number: 20140374327
    Abstract: An apparatus for water filtration includes a base a filtration receptacle coupled to the base and a carafe removably coupled to the base. The filtration receptacle includes a water inlet and a water outlet. The filtration receptacle includes a pleated filter positioned between the water inlet and the water outlet. The pleated filter has a pleat face characterized by a surface having a plurality of peaks and a plurality of valleys, such that the surface is disposed in a plurality of planes. The filtration receptacle is structurally configured to maintain the pleated filter in an orientation wherein the pleat face of the pleated filter transverses a water-flow path extending from the water inlet to the water outlet. The filtration receptacle is further configured to induce water-flow along the water-flow path by at least one of a receptacle orientation and a receptacle geometry. The carafe includes an inlet coupled to the water outlet in the filtration receptacle.
    Type: Application
    Filed: December 14, 2012
    Publication date: December 25, 2014
    Inventors: Thomas A. Langdo, Eugene A. Fitzgerald, Richard Renjilian, Larry R. Brown
  • Methods of Forming Strained-Semiconductor-on-Insulator Device Structures
    Publication number: 20140242778
    Abstract: The benefits of strained semiconductors are combined with silicon-on-insulator approaches to substrate and device fabrication.
    Type: Application
    Filed: May 5, 2014
    Publication date: August 28, 2014
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Thomas A. Langdo, Matthew T. Currie, Richard Hammond, Anthony J. Lochtefeld, Eugene A. Fitzgerald
  • Lattice-mismatched semiconductor structures with reduced dislocation defect densities and related methods for device fabrication
    Patent number: 8796734
    Abstract: Fabrication of monolithic lattice-mismatched semiconductor heterostructures with limited area regions having upper portions substantially exhausted of threading dislocations, as well as fabrication of semiconductor devices based on such lattice-mismatched heterostructures.
    Type: Grant
    Filed: December 12, 2013
    Date of Patent: August 5, 2014
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Anthony J. Lochtefeld, Matthew T. Currie, Zhiyuan Cheng, James Fiorenza, Glyn Braithwaite, Thomas A. Langdo
  • Methods of forming strained-semiconductor-on-insulator device structures
    Patent number: 8748292
    Abstract: The benefits of strained semiconductors are combined with silicon-on-insulator approaches to substrate and device fabrication.
    Type: Grant
    Filed: March 7, 2005
    Date of Patent: June 10, 2014
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Thomas A. Langdo, Matthew T. Currie, Richard Hammond, Anthony J. Lochtefeld, Eugene A. Fitzgerald
  • Lattice-Mismatched Semiconductor Structures with Reduced Dislocation Defect Densities and Related Methods for Device Fabrication
    Publication number: 20140106546
    Abstract: Fabrication of monolithic lattice-mismatched semiconductor heterostructures with limited area regions having upper portions substantially exhausted of threading dislocations, as well as fabrication of semiconductor devices based on such lattice-mismatched heterostructures.
    Type: Application
    Filed: December 12, 2013
    Publication date: April 17, 2014
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Anthony J. Lochtefeld, Matthew T. Currie, Zhiyuan Cheng, James Fiorenza, Glyn Braithwaite, Thomas A. Langdo
  • Methods for Forming Semiconductor Device Structures
    Publication number: 20140051230
    Abstract: The benefits of strained semiconductors are combined with silicon-on-insulator approaches to substrate and device fabrication.
    Type: Application
    Filed: October 15, 2013
    Publication date: February 20, 2014
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Thomas A. Langdo, Anthony J. Lochtefeld, Richard Hammond, Matthew T. Currie, Eugene A. Fitzgerald
  • Devices, systems, and methods for controlling the temperature of resonant elements
    Patent number: 8653897
    Abstract: A thermoelectric device transfers heat away from or toward an object using the Peltier effect. In some embodiments, the length of at least one thermoelectric element is at least ten times greater than a combined average cross-sectional dimension, orthogonal to the length, of two thermoelectric elements.
    Type: Grant
    Filed: August 6, 2012
    Date of Patent: February 18, 2014
    Assignee: The Charles Stark Draper Laboratory, Inc.
    Inventors: Stanley R. Shanfield, Thomas A. Langdo, Marc S. Weinberg, Albert C. Imhoff
  • Lattice-mismatched semiconductor structures with reduced dislocation defect densities and related methods for device fabrication
    Patent number: 8629477
    Abstract: Fabrication of monolithic lattice-mismatched semiconductor heterostructures with limited area regions having upper portions substantially exhausted of threading dislocations, as well as fabrication of semiconductor devices based on such lattice-mismatched heterostructures.
    Type: Grant
    Filed: May 28, 2013
    Date of Patent: January 14, 2014
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Anthony J. Lochtefeld, Matthew T. Currie, Zhiyuan Cheng, James Fiorenza, Glyn Braithwaite, Thomas A. Langdo
  • ELECTRONIC MODULES
    Publication number: 20130329376
    Abstract: Electronic modules are formed by encapsulating microelectronic dies within cavities in a substrate.
    Type: Application
    Filed: August 15, 2013
    Publication date: December 12, 2013
    Applicant: THE CHARLES STARK DRAPER LABORATORY, INC.
    Inventors: Livia M. Racz, Gary B. Tepolt, Jeffrey C. Thompson, Thomas A. Langdo, Andrew J. Mueller
  • Methods for forming semiconductor device structures
    Patent number: 8586452
    Abstract: The benefits of strained semiconductors are combined with silicon-on-insulator approaches to substrate and device fabrication.
    Type: Grant
    Filed: September 7, 2011
    Date of Patent: November 19, 2013
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Anthony J. Lochtefeld, Thomas A. Langdo, Richard Hammond, Matthew T. Currie, Eugene A. Fitzgerald
  • Lattice-Mismatched Semiconductor Structures with Reduced Dislocation Defect Densities and Related Methods for Device Fabrication
    Publication number: 20130285116
    Abstract: Fabrication of monolithic lattice-mismatched semiconductor heterostructures with limited area regions having upper portions substantially exhausted of threading dislocations, as well as fabrication of semiconductor devices based on such lattice-mismatched heterostructures.
    Type: Application
    Filed: May 28, 2013
    Publication date: October 31, 2013
    Inventors: Anthony J. Lochtefeld, Matthew T. Currie, Zhiyuan Cheng, James Fiorenza, Glyn Braithwaite, Thomas A. Langdo Langdo
  • Electronic modules and methods for forming the same
    Patent number: 8535984
    Abstract: Electronic modules are formed by encapsulating microelectronic dies within cavities in a substrate.
    Type: Grant
    Filed: August 31, 2011
    Date of Patent: September 17, 2013
    Assignee: The Charles Stark Draper Laboratory, Inc.
    Inventors: Livia M. Racz, Gary B. Tepolt, Jeffrey C. Thompson, Thomas A. Langdo, Andrew J. Mueller
  • Lattice-mismatched semiconductor structures with reduced dislocation defect densities and related methods for device fabrication
    Patent number: 8519436
    Abstract: Fabrication of monolithic lattice-mismatched semiconductor heterostructures with limited area regions having upper portions substantially exhausted of threading dislocations, as well as fabrication of semiconductor devices based on such lattice-mismatched heterostructures.
    Type: Grant
    Filed: November 19, 2012
    Date of Patent: August 27, 2013
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Anthony J. Lochtefeld, Matthew T. Currie, Zhiyuan Cheng, James Fiorenza, Glyn Braithwaite, Thomas A. Langdo