Patents by Inventor Thomas P. Duffy

Thomas P. Duffy has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5395198
    Abstract: Disclosed is a system for handling large area, in-process, circuit panel layers. The circuit panel layers are thin and flimsy, and require rigid support for certain processing steps. The system includes a peripheral frame fixture for surrounding and supporting the in process circuit panel layer, and a a loading chuck for mounting the in-process circuit panel layer in the peripheral frame fixture. The peripheral frame fixture includes a bottom plate having a central opening to expose the circuit panel layer, a top frame having a corresponding central opening to expose the opposite surface of the circuit panel layer, and a compressive apparatus, as screws, bolts, or the like, for applying a z axis compressive force to the bottom plate, the top frame, and a panel layer therebetween. Optionally, the fixture may include alignment pins or fiducials for aligning the bottom plate, a panel layer, and the top frame, and a robotic interface for a robotic arm to grasp and transfer the peripheral frame fixture.
    Type: Grant
    Filed: June 19, 1992
    Date of Patent: March 7, 1995
    Assignee: International Business Machines Corporation
    Inventors: Thomas P. Duffy, Lewis C. Hecht, Merritt P. Sulger, deceased, Ernst E. Thiele, Mark V. Pierson, Lawrence E. Williams
  • Patent number: 5384690
    Abstract: Disclosed is a parallel processor packaging structure and a method for manufacturing the structure. The individual logic and memory elements are on printed circuit cards. These printed circuit boards and cards are, in turn, mounted on or connected to circuitized flexible substrates extending outwardly from a laminate of the circuitized, flexible substrates. Intercommunication is provided through a switch structure that is implemented in the laminate. The printed circuit cards are mounted on or connected to a plurality of circuitized flexible substrates, with one printed circuit card at each end of the circuitized flexible circuit. The circuitized flexible substrates connect the separate printed circuit boards and cards through the central laminate portion. This laminate portion provides XY plane and Z-axis interconnection for inter-processor, inter-memory, inter-processor/memory element, and processor to memory bussing interconnection, and communication.
    Type: Grant
    Filed: July 27, 1993
    Date of Patent: January 24, 1995
    Assignee: International Business Machines Corporation
    Inventors: Charles R. Davis, Thomas P. Duffy, Steven L. Hanakovic, Howard L. Heck, John T. Kolias, John S. Kresge, David N. Light, Ajit K. Trivedi
  • Patent number: 5055151
    Abstract: A porous, filamentary mat has a plurality of layers that are in intimate face-to-face relation and that have portions of the confronting faces thereof bonded together to enable those layers to constitute a unitary, porous, filamentary mat. Each of the layers has a plurality of elongated filaments of thermoplastic material; and each of those filaments is arranged in an essentially horizontal attitude and is longer than the mat. Each of those filaments has a number of bends therein which cause portions of each filament to cross and to engage other portions of that filament; and those bends also cause portions of each filament to cross and to engage portions of one or more adjacent filaments.
    Type: Grant
    Filed: August 9, 1989
    Date of Patent: October 8, 1991
    Assignee: Greenstreak Plastic Products Company
    Inventor: Thomas P. Duffy