Patents by Inventor Thomas W. Williams
Thomas W. Williams has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11969300Abstract: An implantable medical lead may include an electrode at a distal portion of the lead that is configured to monitor or provide therapy to a target site. The lead may include a visible indicator that is visible to the naked eye of a clinician at a medial portion of the lead that is configured to indicate when the electrodes of the lead are longitudinally and radially aligned properly to monitor or treat the target site. A clinician may insert the lead into the patient using an introducer sheath inserted to a predetermined depth into the patient and subsequently aligning the distal portion of the lead by orienting the indicator at an entry port of the introducer sheath.Type: GrantFiled: August 12, 2021Date of Patent: April 30, 2024Assignee: Medtronic, Inc.Inventors: George W. McFall, Thomas D. Brostrom, Mark T. Marshall, Dina L. Williams, Megan Harris, Keith D. Anderson, Maggie J. Pistella
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Patent number: 11960840Abstract: A method executed by a computing device includes determining a set of identigens for each query word of a query to produce sets of identigens, where a set of identigens represents different meanings of a word of the query. The method further includes obtaining a first identigen selection for a first query word from the first set of identigens. The method further includes interpreting, using identigen pairing rules and based on the first identigen selection, the sets of identigens to produce a query entigen group. The method further includes accessing a knowledge database utilizing the query entigen group to produce a response entigen group. The method further includes generating a response to the query using the response entigen group, where the response includes at least one response word.Type: GrantFiled: June 21, 2021Date of Patent: April 16, 2024Assignee: entigenlogic LLCInventors: Frank John Williams, Stephen Emerson Sundberg, Ameeta Vasant Reed, Dennis Arlen Roberson, Thomas James MacTavish, Karl Olaf Knutson, Jessy Thomas, Niklas Josiah MacTavish, David Michael Corns, II, Andrew Chu, Kyle Edward Alberth, Ali Fattahian, Zachary John McCord, Ahmad Abdelqader Abunaser, Gary W. Grube
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Patent number: 11954608Abstract: A method performed by a computing device includes generating a comparative query entigen group set based on a comparative query in accordance with identigen rules, where the comparative query entigen group set represents a most likely interpretation of the comparative query. The method further includes obtaining a first response entigen group from a knowledge database based on a first comparative query entigen group of the comparative query entigen group set, where the first response entigen group substantially includes the first comparative query entigen group. The method further includes obtaining a second response entigen group from the knowledge database based on a second comparative query entigen group of the comparative query entigen group set, where the second response entigen group substantially includes the second comparative query entigen group. The method further includes generating a comparative response based on the first response entigen group and the second response entigen group.Type: GrantFiled: January 31, 2023Date of Patent: April 9, 2024Assignee: entigenlogic LLCInventors: Frank John Williams, David Ralph Lazzara, Stephen Emerson Sundberg, Ameeta Vasant Reed, Dennis Arlen Roberson, Thomas James MacTavish, Karl Olaf Knutson, Jessy Thomas, Niklas Josiah MacTavish, David Michael Corns, II, Andrew Chu, Theodore Mazurkiewicz, Gary W. Grube
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Publication number: 20240070395Abstract: A method executed by a computing device includes determining a set of identigens for each phrase word of a phrase to produce sets of identigens. A set of identigens of the sets of identigens represents one or more different meanings of a phrase word of the phrase. The method further includes obtaining sensor information for one or more phrase words of the phrase. The method further includes selecting an identigen of a first set of identigens based on the sensor information to produce a first identigen selection for the first set of identigens having a selected meaning of one or more different meanings of the first phrase word. The method further includes interpreting remaining sets of identigens of the sets of identigens to produce an entigen group so that the entigen group represents a most likely meaning interpretation of the phrase.Type: ApplicationFiled: October 27, 2023Publication date: February 29, 2024Applicant: entigenlogic LLCInventors: Frank John Williams, Stephen Emerson Sundberg, Ameeta Vasant Reed, Dennis Arlen Roberson, Thomas James MacTavish, Karl Olaf Knutson, Jessy Thomas, Niklas Josiah MacTavish, David Michael Corns, II, Andrew Chu, Kyle Edward Alberth, Ali Fattahian, Zachary John McCord, Ahmad Abdelqader Abunaser, Gary W. Grube
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Publication number: 20230132918Abstract: A fluid storage system includes a container defining an interior space that lacks an internal valve. A product and a propellant are stored under pressure within the interior space. A container cap includes a membrane that encloses a space defined by a coupling element, which includes a releasable fastener that releasably couples a fluid dispensing apparatus to the container. The container cap also includes a dip tube comprising a proximate end that extends at least partially into the space defined by the coupling element, and a distal end that protrudes from the space in a direction generally away from the container cap, into the interior space defined by the container. The dip tube defines an interior passage extending between the proximate end and the distal end through which the product is to be expelled from the container by the propellant.Type: ApplicationFiled: April 30, 2021Publication date: May 4, 2023Inventors: Richard D. Hudson, James J. Johnson, Thomas W. Williams
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Patent number: 7900105Abstract: A low overhead dynamically reconfigurable shared scan-in test architecture is provided. This test architecture advantageously allows for changing scan inputs during the scan operation on a per shift basis. The flexibility of reconfiguring the scan input to scan chain mapping every shift cycle can advantageously reduce both test data volume and test application time.Type: GrantFiled: May 12, 2010Date of Patent: March 1, 2011Assignee: Synopsys, Inc.Inventors: Rohit Kapur, Nodari Sitchinava, Samitha Samaranayake, Emil Gizdarski, Frederic J. Neuveux, Suryanarayana Duggirala, Thomas W. Williams
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Patent number: 7836367Abstract: A low overhead dynamically reconfigurable shared scan-in test architecture is provided. This test architecture advantageously allows for changing scan inputs during the scan operation on a per shift basis. The flexibility of reconfiguring the scan input to scan chain mapping every shift cycle can advantageously reduce both test data volume and test application time.Type: GrantFiled: August 11, 2009Date of Patent: November 16, 2010Assignee: Synopsys, Inc.Inventors: Rohit Kapur, Nodari Sitchinava, Samitha Samaranayake, Emil Gizdarski, Frederic J. Neuveux, Suryanarayana Duggirala, Thomas W. Williams
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Patent number: 7836368Abstract: A low overhead dynamically reconfigurable shared scan-in test architecture is provided. This test architecture advantageously allows for changing scan inputs during the scan operation on a per shift basis. The flexibility of reconfiguring the scan input to scan chain mapping every shift cycle can advantageously reduce both test data volume and test application time.Type: GrantFiled: August 24, 2009Date of Patent: November 16, 2010Assignee: Synopsys, Inc.Inventors: Rohit Kapur, Nodari Sitchinava, Samitha Samaranayake, Emil Gizdarski, Frederic J. Neuveux, Suryanarayana Duggirala, Thomas W. Williams
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Patent number: 7814444Abstract: A scan-based circuit includes a selector that is implemented by multiple observation logics. Each observation logic is coupled to a scan chain to receive data to be supplied to a combinational compressor. Each observation logic is also coupled to a single input line in a corresponding group of input lines of the combinational compressor, to selectively supply data from the coupled scan chain. Each observation logic may be coupled to additional input lines (if present) in the corresponding group. The selector is operable on a per-shift basis in (a) transparent mode wherein data is supplied to all input lines and (b) several direct modes wherein data from only one scan chain is supplied at each compressor output without overlap.Type: GrantFiled: May 25, 2007Date of Patent: October 12, 2010Assignee: Synopsys, Inc.Inventors: Peter Wohl, John A. Waicukauski, Sanjay Ramnath, Rohit Kapur, Thomas W. Williams
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Publication number: 20100223516Abstract: A low overhead dynamically reconfigurable shared scan-in test architecture is provided. This test architecture advantageously allows for changing scan inputs during the scan operation on a per shift basis. The flexibility of reconfiguring the scan input to scan chain mapping every shift cycle can advantageously reduce both test data volume and test application time.Type: ApplicationFiled: May 12, 2010Publication date: September 2, 2010Applicant: Synopsys, Inc.Inventors: Rohit Kapur, Nodari Sitchinava, Samitha Samaranayake, Emil Gizdarski, Frederic Neuveux, Suryanarayana Duggirala, Thomas W. Williams
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Patent number: 7774663Abstract: A low overhead dynamically reconfigurable shared scan-in test architecture is provided. This test architecture advantageously allows for changing scan inputs during the scan operation on a per shift basis. The flexibility of reconfiguring the scan input to scan chain mapping every shift cycle can advantageously reduce both test data volume and test application time.Type: GrantFiled: July 9, 2009Date of Patent: August 10, 2010Assignee: Synopsys, Inc.Inventors: Rohit Kapur, Nodari Sitchinava, Samitha Samaranayake, Emil Gizdarski, Frederic J. Neuveux, Suryanarayana Duggirala, Thomas W. Williams
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Patent number: 7743299Abstract: A low overhead dynamically reconfigurable shared scan-in test architecture is provided. This test architecture advantageously allows for changing scan inputs during the scan operation on a per shift basis. The flexibility of reconfiguring the scan input to scan chain mapping every shift cycle can advantageously reduce both test data volume and test application time.Type: GrantFiled: July 23, 2008Date of Patent: June 22, 2010Assignee: Synopsys, Inc.Inventors: Rohit Kapur, Nodari Sitchinava, Samitha Samaranayake, Emil Gizdarski, Frederic J. Neuveux, Suryanarayana Duggirala, Thomas W. Williams
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Patent number: 7669098Abstract: An embodiment provides a system for testing a circuit. During operation, the system scans-in input values into a first set of flip-flops. The outputs of the first set of flip-flops are coupled with the inputs of a circuit under test, the outputs of the circuit are coupled with the inputs of a set of multiplexers, and the outputs of the set of multiplexers are coupled with the inputs of a second set of flip-flops. Next, the system configures the set of multiplexers using a segment-selection circuit, which causes the outputs of the circuit to be coupled with the inputs of the second set of flip-flops. The system then captures the circuit's output values using the second set of flip-flops. Next, the system scans-out the circuit's output values using the second set of flip-flops. Finally, the system determines whether the chip has a fault using the output values.Type: GrantFiled: December 7, 2006Date of Patent: February 23, 2010Assignee: Synopsys, Inc.Inventors: Rohit Kapur, Thomas W. Williams
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Publication number: 20100031101Abstract: A low overhead dynamically reconfigurable shared scan-in test architecture is provided. This test architecture advantageously allows for changing scan inputs during the scan operation on a per shift basis. The flexibility of reconfiguring the scan input to scan chain mapping every shift cycle can advantageously reduce both test data volume and test application time.Type: ApplicationFiled: August 11, 2009Publication date: February 4, 2010Applicant: Synopsys, Inc.Inventors: Rohit Kapur, Nodari Sitchinava, Samitha Samaranayake, Emil Gizdarski, Frederic Neuveux, Suryanarayana Duggirala, Thomas W. Williams
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Publication number: 20090313514Abstract: A low overhead dynamically reconfigurable shared scan-in test architecture is provided. This test architecture advantageously allows for changing scan inputs during the scan operation on a per shift basis. The flexibility of reconfiguring the scan input to scan chain mapping every shift cycle can advantageously reduce both test data volume and test application time.Type: ApplicationFiled: August 24, 2009Publication date: December 17, 2009Applicant: Synopsys, Inc.Inventors: Rohit Kapur, Nodari Sitchinava, Samitha Samaranayake, Emil Gizdarski, Frederic Neuveux, Suryanarayana Duggirala, Thomas W. Williams
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Publication number: 20090271673Abstract: A low overhead dynamically reconfigurable shared scan-in test architecture is provided. This test architecture advantageously allows for changing scan inputs during the scan operation on a per shift basis. The flexibility of reconfiguring the scan input to scan chain mapping every shift cycle can advantageously reduce both test data volume and test application time.Type: ApplicationFiled: July 9, 2009Publication date: October 29, 2009Applicant: Synopsys, Inc.Inventors: Rohit Kapur, Nodari Sitchinava, Samitha Samaranayake, Emil Gizdarski, Frederic J. Neuveux, Suryanarayana Duggirala, Thomas W. Williams
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Patent number: 7596733Abstract: A low overhead dynamically reconfigurable shared scan-in test architecture is provided. This test architecture advantageously allows for changing scan inputs during the scan operation on a per shift basis. The flexibility of reconfiguring the scan input to scan chain mapping every shift cycle can advantageously reduce both test data volume and test application time.Type: GrantFiled: July 23, 2008Date of Patent: September 29, 2009Assignee: Synopsys, Inc.Inventors: Rohit Kapur, Nodari Sitchinava, Samitha Samaranayake, Emil Gizdarski, Frederic J. Neuveux, Suryanarayana Duggirala, Thomas W. Williams
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Publication number: 20080301510Abstract: A low overhead dynamically reconfigurable shared scan-in test architecture is provided. This test architecture advantageously allows for changing scan inputs during the scan operation on a per shift basis. The flexibility of reconfiguring the scan input to scan chain mapping every shift cycle can advantageously reduce both test data volume and test application time.Type: ApplicationFiled: July 23, 2008Publication date: December 4, 2008Applicant: Synopsys, Inc.Inventors: Rohit Kapur, Nodari Sitchinava, Samitha Samaranayake, Emil Gizdarski, Frederic Neuveux, Suryanarayana Duggirala, Thomas W. Williams
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Publication number: 20080294955Abstract: A low overhead dynamically reconfigurable shared scan-in test architecture is provided. This test architecture advantageously allows for changing scan inputs during the scan operation on a per shift basis. The flexibility of reconfiguring the scan input to scan chain mapping every shift cycle can advantageously reduce both test data volume and test application time.Type: ApplicationFiled: July 23, 2008Publication date: November 27, 2008Applicant: Synopsys, Inc.Inventors: Rohit Kapur, Nodari Sitchinava, Samitha Samaranayake, Emil Gizdarski, Frederic Neuveux, Suryanarayana Duggirala, Thomas W. Williams
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Publication number: 20080256497Abstract: A scan-based circuit includes a selector that is implemented by multiple observation logics. Each observation logic is coupled to a scan chain to receive data to be supplied to a combinational compressor. Each observation logic is also coupled to a single input line in a corresponding group of input lines of the combinational compressor, to selectively supply data from the coupled scan chain. Each observation logic may be coupled to additional input lines (if present) in the corresponding group. The selector is operable on a per-shift basis in (a) transparent mode wherein data is supplied to all input lines and (b) several direct modes wherein data from only one scan chain is supplied at each compressor output without overlap.Type: ApplicationFiled: May 25, 2007Publication date: October 16, 2008Applicant: Synopsys, Inc.Inventors: Peter Wohl, John A. Waicukauski, Sanjay Ramnath, Rohit Kapur, Thomas W. Williams