Abstract: Post etch treatments (PETs) of low-k dielectric films are described. For example, a method of patterning a low-k dielectric film includes etching a low-k dielectric layer disposed above a substrate with a first plasma process. The etching involves forming a fluorocarbon polymer on the low-k dielectric layer. The low-k dielectric layer is surface-conditioned with a second plasma process. The surface-conditioning removes the fluorocarbon polymer and forms an Si—O-containing protecting layer on the low-k dielectric layer. The Si—O-containing protecting layer is removed with a third plasma process.

Abstract: A method and apparatus for vacuum processing of a workpiece, the apparatus including a flow equalizer disposed in a vacuum processing chamber between a workpiece support pedestal and a pump port located in a wall of the vacuum processing chamber. In an embodiment, the flow equalizer has a first annular surface concentric about the workpiece support pedestal to provide conductance symmetry about the workpiece support even when the pump port is asymmetrically positioned within the vacuum processing chamber. In an embodiment, the flow equalizer has a second annular surface facing a lower surface of the workpiece support pedestal to restrict conductance as the flow equalizer is moved is response to a chamber pressure control signal. In an embodiment, the apparatus for vacuum processing of a workpiece includes tandem vacuum processing chambers sharing a vacuum pump with each tandem chamber including a flow equalizer to reduce cross-talk between the tandem chambers.

Abstract: Methods of etching HAR features in a dielectric layer are described. In one embodiment, a substrate is provided into an etch chamber. The substrate has a patterned mask disposed on a dielectric layer formed thereon where the patterned mask has openings. A gas mixture is provided into the etch chamber, the gas mixture includes CO, O2, a fluorocarbon gas, and an optional inert gas. A plasma is formed from the gas mixture.

Abstract: Post etch treatments (PETs) of low-k dielectric films are described. For example, a method of patterning a low-k dielectric film includes etching a low-k dielectric layer disposed above a substrate with a first plasma process. The etching involves forming a fluorocarbon polymer on the low-k dielectric layer. The low-k dielectric layer is surface-conditioned with a second plasma process. The surface-conditioning removes the fluorocarbon polymer and forms an Si—O-containing protecting layer on the low-k dielectric layer. The Si—O-containing protecting layer is removed with a third plasma process.

Abstract: Radial distribution of etch rate is controlled by controlling the respective duty cycles of pulsed VHF source power applied to the ceiling and pulsed HF or MF bias power on the workpiece. Net average electrical charging of the workpiece is controlled by providing an electronegative process gas and controlling the voltage of a positive DC pulse on the workpiece applied during pulse off times of the pulsed VHF source power.

Abstract: A method and apparatus for in-situ metrology of a workpiece disposed in a vacuum processing chamber. The apparatus may include an optical assembly external to the processing chamber configured to focus a relatively large optical spot over a relatively large working distance to acquire a TE and TM spectra from a periodic array on the workpiece. The workpiece may be disposed in the processing chamber with an arbitrary orientation which is first determined via a reflectance measurement. TE and/or TM spectra may then be acquired by initiating a periodic triggering of a flash lamp based on the determined workpiece orientation to account for variation in placement of the workpiece within the processing chamber. The periodic array from which spectra are collected may be a memory array being fabricated in a semiconductor wafer.

Abstract: An apparatus for adaptive self-aligned dual patterning and method thereof. The method includes providing a substrate to a processing platform configured to perform an etch process and a deposition process and a metrology unit configured for in-vacuo critical dimension (CD) measurement. The in-vacuo CD measurement is utilized for feedforward adaptive control of the process sequence processing platform or for feedback and feedforward adaptive control of chamber process parameters. In one aspect, a first layer of a multi-layered masking stack is etched to form a template mask, an in-vacuo CD measurement of the template mask is made, and a spacer is formed, adjacent to the template mask, to a width that is dependent on the CD measurement of the template mask.

Abstract: Methods for fabricating a semiconductor device having a lanthanum-family-based oxide layer are described. A gate stack having a lanthanum-family-based oxide layer is provided above a substrate. At least a portion of the lanthanum-family-based oxide layer is modified to form a lanthanum-family-based halide portion. The lanthanum-family-based halide portion is removed with a water vapor treatment.

Abstract: A method for determining the flow rate of a gas includes measuring a first concentration of a calibration gas provided to the process chamber at a first pressure and temperature by directing infrared radiation into the process chamber and monitoring a first amount of infrared radiation absorbed by the calibration gas. A mixture of a second gas and the calibration gas is provided to the process chamber while maintaining the first pressure and temperature. A second concentration of the calibration gas in the mixture is measured by directing infrared radiation into the process chamber and monitoring a second amount of infrared radiation absorbed by the calibration gas. A flow rate of the second gas is calculated by comparing the first and second concentrations of the calibration gas. In one embodiment, the calibration gas and the second gas may not absorb the infrared radiation at the same wavelength.

Abstract: A method, a system and a computer readable medium for integrated in-vacuo repair of low-k dielectric thin films damaged by etch and/or strip processing. A repair chamber is integrated onto a same platform as a plasma etch and/or strip chamber to repair a low-k dielectric thin film without breaking vacuum between the damage event and the repair event. UV radiation may be provided on the integrated etch/repair platform in any combination of before, after, or during the low-k repair treatment to increase efficacy of the repair treatment and/or stability of repair.

Abstract: A method and apparatus for vacuum processing of a workpiece, the apparatus including a flow equalizer disposed in a vacuum processing chamber between a workpiece support pedestal and a pump port located in a wall of the vacuum processing chamber. In an embodiment, the flow equalizer has a first annular surface concentric about the workpiece support pedestal to provide conductance symmetry about the workpiece support even when the pump port is asymmetrically positioned within the vacuum processing chamber. In an embodiment, the flow equalizer has a second annular surface facing a lower surface of the workpiece support pedestal to restrict conductance as the flow equalizer is moved is response to a chamber pressure control signal. In an embodiment, the apparatus for vacuum processing of a workpiece includes tandem vacuum processing chambers sharing a vacuum pump with each tandem chamber including a flow equalizer to reduce cross-talk between the tandem chambers.

Abstract: A method and apparatus for in-situ metrology of a workpiece disposed in a vacuum processing chamber. The apparatus may include an optical assembly external to the processing chamber configured to focus a relatively large optical spot over a relatively large working distance to acquire a TE and TM spectra from a periodic array on the workpiece. The workpiece may be disposed in the processing chamber with an arbitrary orientation which is first determined via a reflectance measurement. TE and/or TM spectra may then be acquired by initiating a periodic triggering of a flash lamp based on the determined workpiece orientation to account for variation in placement of the workpiece within the processing chamber. The periodic array from which spectra are collected may be a memory array being fabricated in a semiconductor wafer.

Abstract: Radial distribution of etch rate is controlled by controlling the respective duty cycles of pulsed VHF source power applied to the ceiling and pulsed HF or MF bias power on the workpiece. Net average electrical charging of the workpiece is controlled by providing an electronegative process gas and controlling the voltage of a positive DC pulse on the workpiece applied during pulse off times of the pulsed VHF source power.

Abstract: Methods for fabricating a semiconductor device having a lanthanum-family-based oxide layer are described. A gate stack having a lanthanum-family-based oxide layer is provided above a substrate. At least a portion of the lanthanum-family-based oxide layer is modified to form a lanthanum-family-based halide portion. The lanthanum-family-based halide portion is removed with a water vapor treatment.

Abstract: A method of plasma etching tungsten silicide over polysilicon particularly useful in fabricating flash memory having both a densely packed area and an open (iso) area requiring a long over etch due to microloading. Wafer biasing is decreased in the over etch. The principal etchant include NF3 and Cl2. Argon is added to prevent undercutting at the dense/iso interface. Oxygen and nitrogen oxidize any exposed silicon to increase etch selectivity and straightens the etch profile. SiCl4 may be added for additional selectivity.

Abstract: A method for determining the flow rate of a gas includes measuring a first concentration of a calibration gas provided to the process chamber at a first pressure and temperature by directing infrared radiation into the process chamber and monitoring a first amount of infrared radiation absorbed by the calibration gas. A mixture of a second gas and the calibration gas is provided to the process chamber while maintaining the first pressure and temperature. A second concentration of the calibration gas in the mixture is measured by directing infrared radiation into the process chamber and monitoring a second amount of infrared radiation absorbed by the calibration gas. A flow rate of the second gas is calculated by comparing the first and second concentrations of the calibration gas. In one embodiment, the calibration gas and the second gas may not absorb the infrared radiation at the same wavelength.

Abstract: In an electrostatic chuck, RF bias power is separately applied to a workpiece and to a process kit collar surrounding the workpiece. At least one variable impedance element governed by a system controller adjusts the apportionment of RF bias power between the workpiece and the process kit collar, allowing dynamic adjustment of the plasma sheath electric field at the extreme edge of the workpiece, for optimum electric field uniformity under varying plasma conditions, for example.

Abstract: An apparatus for adaptive self-aligned dual patterning and method thereof. The method includes providing a substrate to a processing platform configured to perform an etch process and a deposition process and a metrology unit configured for in-vacuo critical dimension (CD) measurement. The in-vacuo CD measurement is utilized for feedforward adaptive control of the process sequence processing platform or for feedback and feedforward adaptive control of chamber process parameters. In one aspect, a first layer of a multi-layered masking stack is etched to form a template mask, an in-vacuo CD measurement of the template mask is made, and a spacer is formed, adjacent to the template mask, to a width that is dependent on the CD measurement of the template mask.

Abstract: Methods for forming an ultra thin structure using a method that includes trimming a mask layer during an etching process are provided. The embodiments described herein may be advantageously utilized to fabricate a submicron structure on a substrate having a critical dimension less than 55 nm and beyond. In one embodiment, a method of forming a submicron structure on a substrate may include providing a substrate having a patterned photoresist layer disposed on a film stack into an etch chamber, wherein the film stack includes at least a hardmask layer disposed on an underlying layer, trimming the photoresist layer to a first predetermined critical dimension, etching the hardmask layer through openings defined by the trimmed photoresist layer, trimming the hardmask layer to a second predetermined critical dimension, and etching the underlying layer through openings defined by the trimmed hardmask layer.

Abstract: A method of plasma etching tungsten silicide over polysilicon particularly useful in fabricating flash memory having both a densely packed area and an open (iso) area requiring a long over etch due to microloading. Wafer biasing is decreased in the over etch. The principal etchant include NF3 and Cl2. Argon is added to prevent undercutting at the dense/iso interface. Oxygen and nitrogen oxidize any exposed silicon to increase etch selectivity and straightens the etch profile. SiCl4 as an example of a silicon and chlorine containing passivating gas may be added for additional selectivity.