Patents by Inventor Tian Xiao

Tian Xiao has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9773918
    Abstract: A thin film circuit includes a thin film transistor with a metal oxide semiconductor channel having a conduction band minimum (CBM) with a first energy level. The transistor further includes a layer of passivation material covering at least a portion of the metal oxide semiconductor channel. The passivation material has a conduction band minimum (CBM) with a second energy level. The second energy level being lower than, equal to, or no more than 0.5 eV above the first energy level. The circuit is used for an electronic device including any one of an AMLCD, AMOLED, AMLED, AMEPD.
    Type: Grant
    Filed: June 29, 2015
    Date of Patent: September 26, 2017
    Assignee: CBRITE INC.
    Inventors: Gang Yu, Chan-Long Shieh, Juergen Musolf, Fatt Foong, Tian Xiao
  • Patent number: 9768322
    Abstract: A method including providing a substrate with a gate, a layer of gate insulator material adjacent the gate, and a layer of metal oxide semiconductor material positioned on the gate insulator opposite the gate, forming a selectively patterned etch stop passivation layer and heating at elevated temperature in an oxygen-containing or nitrogen-containing or inert ambience to selectively increase the carrier concentration in regions of the metal oxide semiconductor not covered by the etch stop layer, on which overlying and spaced apart source/drain metals are formed. Subsequently heating the transistor in an oxygen-containing or nitrogen-containing or inert ambience to further improve the source/drain contacts and adjust the threshold voltage to a desired level. Providing additional passivation layer(s) on top of the transistor with electric insulation and barrier property to moisture and chemicals in the surrounding environment.
    Type: Grant
    Filed: August 1, 2016
    Date of Patent: September 19, 2017
    Assignee: CBRITE INC.
    Inventors: Gang Yu, Chan-Long Shieh, Tian Xiao, Fatt Foong
  • Publication number: 20170069662
    Abstract: A method of fabricating a high mobility semiconductor metal oxide thin film transistor including the steps of depositing a layer of semiconductor metal oxide material, depositing a blanket layer of etch-stop material on the layer of MO material, and patterning a layer of source/drain metal on the blanket layer of etch-stop material including etching the layer of source/drain metal into source/drain terminals positioned to define a channel area in the semiconductor metal oxide layer. The etch-stop material being electrically conductive in a direction perpendicular to the plane of the blanket layer at least under the source/drain terminals to provide electrical contact between each of the source/drain terminals and the layer of semiconductor metal oxide material. The etch-stop material is also chemical robust to protect the layer of semiconductor metal oxide channel material during the etching process.
    Type: Application
    Filed: June 3, 2016
    Publication date: March 9, 2017
    Inventors: Gang Yu, Chan-Long Shieh, Juergen Musolf, Fatt Foong, Tian Xiao
  • Publication number: 20170033227
    Abstract: A method including providing a substrate with a gate, a layer of gate insulator material adjacent the gate, and a layer of metal oxide semiconductor material positioned on the gate insulator opposite the gate, forming a selectively patterned etch stop passivation layer and heating at elevated temperature in an oxygen-containing or nitrogen-containing or inert ambience to selectively increase the carrier concentration in regions of the metal oxide semiconductor not covered by the etch stop layer, on which overlying and spaced apart source/drain metals are formed. Subsequently heating the transistor in an oxygen-containing or nitrogen-containing or inert ambience to further improve the source/drain contacts and adjust the threshold voltage to a desired level. Providing additional passivation layer(s) on top of the transistor with electric insulation and barrier property to moisture and chemicals in the surrounding environment.
    Type: Application
    Filed: August 1, 2016
    Publication date: February 2, 2017
    Inventors: Gang Yu, Chan-Long Shieh, Tian Xiao, Fatt Foong
  • Publication number: 20160293769
    Abstract: A method of fabricating a stable, high mobility metal oxide thin film transistor includes the steps of providing a substrate, positioning a gate on the substrate, and depositing a gate dielectric layer on the gate and portions of the substrate not covered by the gate. A multiple film active layer including a metal oxide semiconductor film and a metal oxide passivation film is deposited on the gate dielectric with the passivation film positioned in overlying relationship to the semiconductor film. An etch-stop layer is positioned on a surface of the passivation film and defines a channel area in the active layer. A portion of the multiple film active layer on opposite sides of the etch-stop layer is modified to form an ohmic contact and metal source/drain contacts are positioned on the modified portion of the multiple film active layer.
    Type: Application
    Filed: June 20, 2016
    Publication date: October 6, 2016
    Inventors: Chan-Long Shieh, Gang Yu, Fatt Foong, Tian Xiao, Juergen Musolf
  • Patent number: 9412623
    Abstract: A method including providing a substrate with a gate, a layer of gate insulator material adjacent the gate, and a layer of metal oxide semiconductor material positioned on the gate insulator opposite the gate, forming a selectively patterned etch stop passivation layer and heating at elevated temperature in an oxygen-containing or nitrogen-containing or inert ambience to selectively increase the carrier concentration in regions of the metal oxide semiconductor not covered by the etch stop layer, on which overlying and spaced apart source/drain metals are formed. Subsequently heating the transistor in an oxygen-containing or nitrogen-containing or inert ambience to further improve the source/drain contacts and adjust the threshold voltage to a desired level. Providing additional passivation layer(s) on top of the transistor with electric insulation and barrier property to moisture and chemicals in the surrounding environment.
    Type: Grant
    Filed: August 24, 2015
    Date of Patent: August 9, 2016
    Assignee: CBRITE INC.
    Inventors: Gang Yu, Chan-Long Shieh, Tian Xiao, Fatt Foong
  • Patent number: 9379247
    Abstract: A method of fabricating a stable, high mobility metal oxide thin film transistor includes the steps of providing a substrate, positioning a gate on the substrate, and depositing a gate dielectric layer on the gate and portions of the substrate not covered by the gate. A multiple film active layer including a metal oxide semiconductor film and a metal oxide passivation film is deposited on the gate dielectric with the passivation film positioned in overlying relationship to the semiconductor film. An etch-stop layer is positioned on a surface of the passivation film and defines a channel area in the active layer. A portion of the multiple film active layer on opposite sides of the etch-stop layer is modified to form an ohmic contact and metal source/drain contacts are positioned on the modified portion of the multiple film active layer.
    Type: Grant
    Filed: June 28, 2012
    Date of Patent: June 28, 2016
    Assignee: CBRITE INC.
    Inventors: Chan-Long Shieh, Gang Yu, Fatt Foong, Tian Xiao, Juergen Musolf
  • Patent number: 9362413
    Abstract: A method of fabricating a high mobility semiconductor metal oxide thin film transistor including the steps of depositing a layer of semiconductor metal oxide material, depositing a blanket layer of etch-stop material on the layer of MO material, and patterning a layer of source/drain metal on the blanket layer of etch-stop material including etching the layer of source/drain metal into source/drain terminals positioned to define a channel area in the semiconductor metal oxide layer. The etch-stop material being electrically conductive in a direction perpendicular to the plane of the blanket layer at least under the source/drain terminals to provide electrical contact between each of the source/drain terminals and the layer of semiconductor metal oxide material. The etch-stop material is also chemical robust to protect the layer of semiconductor metal oxide channel material during the etching process.
    Type: Grant
    Filed: November 15, 2013
    Date of Patent: June 7, 2016
    Assignee: CBRITE INC.
    Inventors: Gang Yu, Chan-Long Shieh, Juergen Musolf, Fatt Foong, Tian Xiao
  • Publication number: 20160056297
    Abstract: A method including providing a substrate with a gate, a layer of gate insulator material adjacent the gate, and a layer of metal oxide semiconductor material positioned on the gate insulator opposite the gate, forming a selectively patterned etch stop passivation layer and heating at elevated temperature in an oxygen-containing or nitrogen-containing or inert ambience to selectively increase the carrier concentration in regions of the metal oxide semiconductor not covered by the etch stop layer, on which overlying and spaced apart source/drain metals are formed. Subsequently heating the transistor in an oxygen-containing or nitrogen-containing or inert ambience to further improve the source/drain contacts and adjust the threshold voltage to a desired level. Providing additional passivation layer(s) on top of the transistor with electric insulation and barrier property to moisture and chemicals in the surrounding environment.
    Type: Application
    Filed: August 24, 2015
    Publication date: February 25, 2016
    Inventors: Gang Yu, Chan-Long Shieh, Tian Xiao, Fatt Foong
  • Publication number: 20150357480
    Abstract: A thin film semiconductor device has a semiconductor layer including a composite/blend/mixture of an amorphous/nanocrystalline semiconductor ionic metal oxide and an amorphous/nanocrystalline non-semiconducting covalent metal oxide. A pair of terminals is positioned in communication with the semiconductor layer and define a semiconductive channel, and agate terminal is positioned in communication with the semiconductive channel and further positioned to control conduction of the channel. The invention further includes a method of depositing the mixture including using nitrogen during the deposition process to control the carrier concentration in the resulting semiconductor layer.
    Type: Application
    Filed: August 19, 2015
    Publication date: December 10, 2015
    Inventors: Gang Yu, Chan-Long Shieh, Tian Xiao, Fatt Foong, Juergen Musulf, Karl Birger Kristoffer Ottosson
  • Patent number: 9209416
    Abstract: Disclosed are an electroluminescent element, a display device and a method for preparing the electroluminescent element. The electroluminescent element comprises a substrate (101) and an anode layer (102), a light-emitting layer (103) and a cathode layer (104) that are disposed in sequence on the substrate (101). At least one insertion layer (105) for adjusting electron mobility is disposed within the light-emitting layer (103). By disposing an insertion layer (105) in the light-emitting layer (103), the effect of a voltage on the recombination of electrons and holes in the light-emitting layer (103) can be reduced, the level of the recombination of carriers such as electrons and holes in the light-emitting layer (103) can be increased, and the ratio of electrons and holes that are combined can be increased.
    Type: Grant
    Filed: November 23, 2012
    Date of Patent: December 8, 2015
    Assignee: BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Dongfang Yang, Pil Seok Kim, Tian Xiao
  • Publication number: 20150303311
    Abstract: A thin film circuit includes a thin film transistor with a metal oxide semiconductor channel having a conduction band minimum (CBM) with a first energy level. The transistor further includes a layer of passivation material covering at least a portion of the metal oxide semiconductor channel. The passivation material has a conduction band minimum (CBM) with a second energy level. The second energy level being lower than, equal to, or no more than 0.5 eV above the first energy level. The circuit is used for an electronic device including any one of an AMLCD, AMOLED, AMLED, AMEPD.
    Type: Application
    Filed: June 29, 2015
    Publication date: October 22, 2015
    Inventors: Gang Yu, Chan-Long Shieh, Juergen Musolf, Fatt Foong, Tian Xiao
  • Patent number: 9166184
    Abstract: Disclosed is an organic light-emitting device comprising a substrate (1), an anode layer (2), a cathode layer (10) and an organic functional layer comprising a light-emitting layer (6); the light-emitting layer (6) comprises three successive light-emitting sub-layers, i.e., a first light-emitting sub-layer (61) close to the anode layer, a second light-emitting sub-layer (62), and a third light-emitting sub-layer (63) close to the cathode layer. This organic light-emitting device can effectively improve the carrier utilization ratio and thereby improving the light-emitting efficiency of the organic light-emitting device.
    Type: Grant
    Filed: October 31, 2012
    Date of Patent: October 20, 2015
    Assignee: BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Dongfang Yang, Tian Xiao
  • Publication number: 20150137113
    Abstract: A method of fabricating a high mobility semiconductor metal oxide thin film transistor including the steps of depositing a layer of semiconductor metal oxide material, depositing a blanket layer of etch-stop material on the layer of MO material, and patterning a layer of source/drain metal on the blanket layer of etch-stop material including etching the layer of source/drain metal into source/drain terminals positioned to define a channel area in the semiconductor metal oxide layer. The etch-stop material being electrically conductive in a direction perpendicular to the plane of the blanket layer at least under the source/drain terminals to provide electrical contact between each of the source/drain terminals and the layer of semiconductor metal oxide material. The etch-stop material is also chemical robust to protect the layer of semiconductor metal oxide channel material during the etching process.
    Type: Application
    Filed: November 15, 2013
    Publication date: May 21, 2015
    Inventors: Gang Yu, Chan-Long Shieh, Juergen Musolf, Fatt Foong, Tian Xiao
  • Patent number: 8917224
    Abstract: The present disclosure discloses a pixel unit circuit and an OLED display apparatus. The pixel unit circuit comprises a first sub-circuit module, a second sub-circuit module, a first capacitor and OLED. An input of the first sub-circuit module is connected to a data line; another input of the first sub-circuit module is connected to an output of the second sub-circuit module and a first terminal of the OLED; an output of the first sub-circuit module is connected to an input/output of the second sub-circuit module via the first capacitor; a voltage difference between positive power supply and negative power supply of a backboard is applied between an input of the second sub-circuit module and a second terminal of the OLED. The pixel unit circuit can compensate the aging of OLED devices, the non-uniformity of threshold voltage of TFT driving transistors, and IR Drop of the power supply of the backboard.
    Type: Grant
    Filed: May 17, 2012
    Date of Patent: December 23, 2014
    Assignee: Boe Technology Group Co., Ltd.
    Inventors: Zhongyuan Wu, Liye Duan, Gang Wang, Tian Xiao
  • Publication number: 20140054570
    Abstract: Disclosed is an organic light-emitting device comprising a substrate (1), an anode layer (2), a cathode layer (10) and an organic functional layer comprising a light-emitting layer (6); the light-emitting layer (6) comprises three successive light-emitting sub-layers, i.e., a first light-emitting sub-layer (61) close to the anode layer, a second light-emitting sub-layer (62), and a third light-emitting sub-layer (63) close to the cathode layer. This organic light-emitting device can effectively improve the carrier utilization ratio and thereby improving the light-emitting efficiency of the organic light-emitting device.
    Type: Application
    Filed: October 31, 2012
    Publication date: February 27, 2014
    Applicant: BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Dongfang Yang, Tian Xiao
  • Publication number: 20140054571
    Abstract: Disclosed are an electroluminescent element, a display device and a method for preparing the electroluminescent element. The electroluminescent element comprises a substrate (101) and an anode layer (102), a light-emitting layer (103) and a cathode layer (104) that are disposed in sequence on the substrate (101). At least one insertion layer (105) for adjusting electron mobility is disposed within the light-emitting layer (103). By disposing an insertion layer (105) in the light-emitting layer (103), the effect of a voltage on the recombination of electrons and holes in the light-emitting layer (103) can be reduced, the level of the recombination of carriers such as electrons and holes in the light-emitting layer (103) can be increased, and the ratio of electrons and holes that are combined can be increased.
    Type: Application
    Filed: November 23, 2012
    Publication date: February 27, 2014
    Applicant: BOE Technology Group Co., Ltd.
    Inventors: Dongfang Yang, Pil Seok Kim, Tian Xiao
  • Publication number: 20140001462
    Abstract: A method of fabricating a stable, high mobility metal oxide thin film transistor includes the steps of providing a substrate, positioning a gate on the substrate, and depositing a gate dielectric layer on the gate and portions of the substrate not covered by the gate. A multiple film active layer including a metal oxide semiconductor film and a metal oxide passivation film is deposited on the gate dielectric with the passivation film positioned in overlying relationship to the semiconductor film. An etch-stop layer is positioned on a surface of the passivation film and defines a channel area in the active layer. A portion of the multiple film active layer on opposite sides of the etch-stop layer is modified to form an ohmic contact and metal source/drain contacts are positioned on the modified portion of the multiple film active layer.
    Type: Application
    Filed: June 28, 2012
    Publication date: January 2, 2014
    Inventors: Chan-Long Shieh, Gang Yu, Fatt Foong, Tian Xiao, Juergen Musolf
  • Publication number: 20130215092
    Abstract: The present invention discloses an OLED panel for improving the hysteresis effect of TFT without increasing the area of the pixel circuit and at the same time ensuring the opening ratio. Said OLED panel includes a substrate and a pixel unit array formed thereon, the pixel unit array comprises a plurality of pixel units defined by the intersections of scanning lines and data lines, and each unit includes a driving TFT and an OLED, and the driving TFT has a source connected to a high voltage signal terminal in a backboard, a drain connected to an anode of the OLED; a plurality of resetting TFTs is arranged in the peripheral area of the pixel unit array on the substrate, and the resetting TFT has a gate connected a pre-controlling signal terminal, a source connected to a resetting signal terminal, and each resetting TFT corresponds to a data line one-to-one.
    Type: Application
    Filed: August 23, 2012
    Publication date: August 22, 2013
    Applicant: BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Zhongyuan Wu, Tian Xiao, Gang Wang
  • Publication number: 20120293482
    Abstract: The present disclosure discloses a pixel unit circuit and an OLED display apparatus. The pixel unit circuit comprises a first sub-circuit module, a second sub-circuit module, a first capacitor and OLED. An input of the first sub-circuit module is connected to a data line; another input of the first sub-circuit module is connected to an output of the second sub-circuit module and a first terminal of the OLED; an output of the first sub-circuit module is connected to an input/output of the second sub-circuit module via the first capacitor; a voltage difference between positive power supply and negative power supply of a backboard is applied between an input of the second sub-circuit module and a second terminal of the OLED. The pixel unit circuit can compensate the aging of OLED devices, the non-uniformity of threshold voltage of TFT driving transistors, and IR Drop of the power supply of the backboard.
    Type: Application
    Filed: May 17, 2012
    Publication date: November 22, 2012
    Applicant: BOE Technology Group Co., Ltd.
    Inventors: Zhongyuan WU, Liye DUAN, Gang WANG, Tian XIAO