Abstract: A semiconductor device and a manufacturing method thereof are disclosed. In the device, the isolation layer is used to prevent the first metal layer and the second metal layer which are over-etched and back-splashed from diffusing to a first substrate; and the isolation layer serves as a barrier layer to prevent an interconnection layer from diffusing into the first substrate. Further, the isolation layer includes a silicon nitride layer, which is advantageous for preventing the metal layers from back-splashing and diffusing to the sidewall of the first substrate. The isolation layer further includes a first silicon oxide layer and a second silicon oxide layer, wherein the second silicon oxide layer is used to protect the silicon nitride layer from being etched and consumed and the first silicon oxide layer is used to improve the adhesion between the silicon nitride layer and the first substrate.

Abstract: A multi-wafer stack structure and fabricating method thereof are disclosed. In the multi-wafer stack structure, the first interconnection layer is electrically connected to the second metal layer and the first metal layer via the first opening, the second interconnection layer is electrically connected to the first interconnection layer via the second openings, the third interconnection layer is electrically connected to the third metal layer via the third openings, and the second interconnection layer is in contact with the third interconnection layer, so that there is no need to reserve the wire pressure welding space between the wafers and a silicon substrate is eliminated, the overall device thickness of the multi-wafer stack package is reduced. Moreover, the design processing of the silicon substrate and a plurality of common pads on the silicon substrate is eliminated, thereby reducing the parasitic capacitance and power loss, and increasing the transmission speed.

Abstract: A semiconductor device and a manufacturing method thereof are disclosed. In which a first opening and a second opening are vertically separated, and are no longer restricted by the condition that a deep upper opening needs to be filled with a thick photoresist when a TSV nested hole in vertical communication forms a middle opening and lower opening, thereby satisfying devices with different thicknesses requirements. The design is no longer restricted by the lateral process of the TSV nested hole, thereby enhancing the flexibility of the design. In the photolithography process, the deep hole does not need to be filled with the photoresist, the photoresist does not need to be thick, thereby reducing the complexity of the photolithography process and improving the exposure effect. The first metal layer and the second metal layer are directly led out via a first trench, thereby simplifying the process and reducing the production cost.