Abstract: A display substrate and a display device are provided, the display substrate includes: a base substrate; a pixel circuit on the base substrate, the pixel circuit includes a storage capacitor including a first electrode plate and a second electrode plate which are opposite to each other; the display substrate further includes a conductive film layer, the conductive film layer includes a first conductive part; the first conductive part includes a main part and a bridge part, the main part corresponds to two second electrode plates, and the bridge part connects the two second electrode plates, and the first conductive part includes a notch between the two second electrode plates, the arrangement of the notch can improve pixel transmittance.

Abstract: A pixel driving circuit, including: a driving circuit, connected to a first node, a second node and a third node, and configured to input a driving current to the third node through the second node according to a signal of the first node; a compensation circuit, connected to the first node, the third node and a first gate driving signal end, and configured to turn on the first node and the third node in response to a signal of the first gate driving signal end; a first light-emitting control circuit, connected to the third node, a fourth node and a first enabling signal end, and configured to communicate with the third node and the fourth node in response to a signal of the first enabling signal end; a first reset circuit, connected to the fourth node, a first initial signal end and a first reset signal end, and configured to transmit a signal of the first initial signal end to the fourth node in response to a signal of the first reset signal end; and a second reset circuit, connected to the second node, a se

Abstract: The present disclosure provides a driving circuitry, a driving method, a driving module, and a display device. The driving circuitry includes a driving signal generation circuitry, a gating circuitry, an output control circuitry and an output circuitry. The driving signal generation circuitry is configured to perform a shifting operation on an (N?1)th-level driving signal to obtain an Nth-level driving signal. The gating circuitry is configured to write a gating input signal into a first node under the control of a gating control signal. The output control circuitry is configured to perform an NAND operation on the Nth-level driving signal and a potential at a second end of the output control circuitry to obtain a first output signal. The output circuitry is configured to perform phase inversion on the first output signal to obtain and provide an output driving signal through an output driving end, where N is a positive integer.

Abstract: A driving circuit includes a driving signal generation circuit, a gating circuit, an output control circuit, a voltage control circuit and an output circuit; the driving signal generation circuit generates the Nth stage of driving signal; the gating circuit writes a gating input signal into the first node under the control of a gating control signal; the output control circuit connects the first control node and the second node under the control of a potential of the first node; the voltage control circuit controls a potential of the second node according to the potential of the first node; the output circuit connects the output driving terminal and the first voltage terminal under the control of the potential of the second node, and connects the output driving terminal and the second voltage terminal under the control of the potential of the second control node; N is a positive integer.

Abstract: A display substrate and a display device are provided, which includes: a pixel circuit, on the base substrate and including a driving transistor and a storage capacitor; the display substrate includes a first conductive layer, a second conductive layer and a first semiconductor layer, the first conductive layer includes a first connection structure, the first connection structure includes a first end and a second end, the first end is connected with the first semiconductor layer, the second end is electrically connected with a gate electrode of the driving transistor and a first electrode plate of the storage capacitor; the first conductive layer is at a side of the first semiconductor layer away from the base substrate, the second conductive layer is at a side of the first conductive layer away from the base substrate.

Abstract: A pixel driving circuit is provided. The pixel driving circuit includes a driving transistor; a storage capacitor; a first reset transistor having a gate electrode connected to a first gate line in a present stage of a plurality of first gate lines, a source electrode connected to a respective first reset signal line of a plurality of first reset signal lines, and a drain electrode connected to an anode of a light emitting element; and a second reset transistor having a gate electrode connected to a first gate line in a previous stage of the plurality of first gate lines, a source electrode connected to a respective second reset signal line of a plurality of second reset signal lines, and a drain electrode connected to a drain electrode of the driving transistor.

Abstract: A pixel circuit, a driving method and a display device. The pixel circuit includes a light emitting element, a driving circuit, an energy storage circuit, an initialization circuit, and a compensation control circuit; the display period of the pixel circuit includes a refresh frame and a retention frame; the refresh frame and the retention frame respectively include a set phase and a light emitting phase set successively; the initialization circuit is configured to control provide the initial voltage to the first terminal and/or the second terminal of the driving circuit under the control of the initial control signal provided by the initial control terminal, in the refresh frame and the retention frame, at least in the set phase. The present disclose improves hysteresis and improves the display effect.

Abstract: Provided is a display substrate, including a first transparent display region, a second transparent display region and a non-transparent display region. The display substrate includes a plurality of first pixels disposed in an array in the first transparent display region and a plurality of second pixels. The first pixel includes a first light-emitting element and a first pixel circuit. The first pixel circuits in a same row are electrically connected to a same first gate line. The first pixel circuits in a same column are electrically connected to a same first data line. The second pixel includes a second light-emitting element disposed in the second transparent display region and a second pixel circuit disposed outside the first transparent display region and the second transparent display region. The second light-emitting element and the second pixel circuit are electrically connected by a transparent wire.

Abstract: Provided are a pixel circuit, display apparatus and driving method. The pixel circuit includes: a light-emitting device, a driving transistor configured to generate a driving current that drives the light-emitting device to emit light according to a data voltage, a light-emitting control circuit coupled with the driving transistor and configured to, in response to an effective level of a light-emitting control signal terminal, provide a driving current generated by the driving transistor to the light-emitting device, and drive the light-emitting device to emit light; a data-writing circuit coupled with a first electrode of the driving transistor and configured to operate in response to a plurality of effective levels that occur at intervals between first scanning signal terminals; and a threshold compensation circuit coupled with the driving transistor.

Abstract: A display panel includes a substrate and a light-emitting structure layer, wherein the light-emitting structure layer includes an anode layer, a light-emitting layer, and a cathode layer that are sequentially stacked on the substrate; the cathode layer has a patterned area which is disposed in a light-transmitting display area of the display panel; the patterned area includes a plurality of cathode structures which are spaced apart from each other; an orthographic projection of each of the cathode structures onto the substrate covers an orthographic projection of the light-emitting structure of at least one OLED device onto the substrate.

Abstract: A display substrate, a manufacturing method therefor, and a display apparatus are provided. The display substrate includes a display area (100) and a bezel area (300), the bezel area (300) includes a circuit area (310) and a partition area (320), the circuit area (310) includes a third gate driving circuit, a second gate driving circuit (GOA-2) and a first gate driving circuit (GOA-1) arranged in sequence along a direction away from the display area (100), the partition area (320) includes a power supply line, the power supply line includes a first branch (VSS-1) and a second branch (VSS-2); orthographic projections of the second branch (VSS-2) and the first branch (VSS-1) of the power supply line on the base substrate have an overlapped area.

Abstract: A display substrate and a display apparatus are disclosed. The display substrate includes a base substrate including a display region and a peripheral region located on at least one side of the display region, and a first gate drive circuit, the first gate drive circuit includes a first clock signal line, a second clock signal line and N shift register units that are cascaded; each shift register unit of the N shift register units includes a first output circuit; the first output circuit includes the first output transistor, the orthographic projection of the second clock signal line on the base substrate is located between an orthographic projection of the first output transistor on the base substrate and the orthographic projection of the first clock signal line on the base substrate. The display substrate can reduce load of the first clock signal line and the second clock signal line.

Abstract: A pixel circuit includes a light-emitting element, a driving circuit, a first light-emitting control circuit, a compensation control circuit and a resetting circuit. The resetting circuit is configured to write an initial voltage into the first electrode of the light-emitting element under the control of a first light-emitting control signal, the first light-emitting control circuit is configured to control the first electrode of the light-emitting element to be electrically connected to the first terminal of the driving circuit under the control of a second light-emitting control signal, and the compensation control circuit is configured to control the control terminal of the driving circuit to be electrically connected to the first terminal of the driving circuit under the control of a first scanning signal.

Abstract: A driving circuit includes an output circuit, a first node reset circuit and a second node control capacitor; the output circuit controls a driving signal terminal to output a driving signal under the control of a potential of a first node; the first node reset circuit controls to reset the first node under the control of a potential of a second node; the second node control capacitor is electrically connected to the second node; a width-to-length ratio of an output transistor included in the output circuit is less than or equal to a first predetermined width-to-length ratio; and/or a width-to-length ratio of a first node reset transistor included in the first node reset circuit is greater than or equal to a second predetermined width-to-length ratio; and/or, a capacitance value of the second node control capacitor is greater than or equal to a predetermined capacitance value.

Abstract: A display substrate and a manufacturing method thereof, and a display device are provided. In the display substrate, each signal line includes a first conductive portion; for at least one signal line, the display substrate includes a multi-layer insulating pattern on a side of the first conductive portion away from the base substrate; a first insulating pattern in the multi-layer insulating pattern includes a hollow, and an orthographic projection of the hollow on the base substrate is at least partially in a region surrounded by an orthographic projection of the first conductive portion on the base substrate; and for at least one clock signal line included in the at least one signal line, a ratio between a size of the hollow in a first direction and a size of a shift register unit in the first direction ranges from ¾ to 1.

Abstract: A display device includes a blocking dam. The blocking dam includes an insulation layer group. A groove is provided at one side of the insulation layer group away from the substrate. After the liquid organic encapsulation material flows from the display area to the highest point of the blocking dam, the excess liquid organic encapsulation material may directly fall into the groove, avoiding the excess liquid organic encapsulation material from flowing across the blocking dam to the outside of the encapsulation area, causing that the orthographic projection of the edge of the organic encapsulation layer, away from the display area, on the substrate is located within the orthographic projection of the blocking dam on the substrate. The display panel includes only one blocking dam, and the width of the area, where the blocking dam is provided, of the non-display area decreases, thereby reducing the width of the entire non-display area.

Abstract: The present disclosure provides a pixel circuit, a driving method and a display device. The pixel circuit includes a first reset circuit and a driving circuit, the first reset circuit is respectively electrically connected to a first light emitting control line, a reset control line, a first reset voltage line and a first end of the driving circuit, and is configured to write a first reset voltage provided by the first reset voltage line into the first end of driving circuit under the control of a first light emitting control signal provided by the first light emitting control line and a reset control signal provided by the reset control line; the driving circuit is configured to connect the first end of the driving circuit and a second end of the driving circuit under the control of a potential of a control end of the driving circuit.

Abstract: An array substrate is provided. The array substrate includes a plurality of pixel driving circuits. A respective pixel driving circuit of the plurality of pixel driving circuit includes a driving transistor, a compensating transistor, and a first reset transistor. An active layer of the driving transistor is in a first semiconductor material layer. Active layers of the compensating transistor and the first reset transistor are in a second semiconductor material layer different from the first semiconductor material layer. The array substrate includes a third connecting line in a first signal line layer, and connected to a second electrode of the compensating transistor. The third connecting line crosses over at least two control signal lines.

Abstract: A display substrate and a display device are provided. The display substrate includes a base substrate and a plurality of reset signal lines. The base substrate includes a display region which includes sub-pixels arranged in array, each sub-pixels includes a pixel driving circuit and a light-emitting element. The plurality of reset signal lines extends in a first direction and include a plurality of first reset signal lines for providing a first reset signal and a plurality of second reset signal lines for providing a second reset signal, and one of the plurality of first reset signal lines and one of the plurality of second reset signal lines are respectively connected to pixel driving circuits of a plurality of sub-pixels located in a same row. A layer where the plurality of first reset signal lines are located is different from layers where the plurality of second reset signal lines are located.

Abstract: A scan circuit includes a plurality of stages. A respective stage of the scan circuit includes a second processing subcircuit, which includes a first capacitor, a sixth transistor, and a seventh transistor; and an input subcircuit including a first transistor, and an input signal line configured to provide an input signal to the first transistor. The respective stage of the scan circuit further includes a sixth connecting line connecting a first electrode of the seventh transistor, a second electrode of the sixth transistor, and a second capacitor electrode of the first capacitor together. The sixth connecting line crosses over both the first capacitor electrode and the second capacitor electrode of the first capacitor. A shortest distance between an active layer of the seventh transistor and the input signal line is less than a shortest distance between an active layer of the sixth transistor and the input signal line.