Abstract: The present disclosure provides a timing controller applied to a display device, where the display device includes a plurality of pixel circuits, a first driving circuit and a second driving circuit, each of the pixel circuits includes a driving transistor and a writing and compensation circuit; the first driving circuit is configured to sequentially output a first effective level signal to each of first control signal lines, according to a first driving start signal; the second driving circuit is configured to sequentially output a second effective level signal to each of second control signal lines, according to a second driving start signal; and the timing controller is configured to provide the first driving start signal and the second driving start signal during a refresh frame, where the number W of effective pulses in the first driving start signal is more than or equal to 2.

Abstract: Disclosed are an array substrate and a display panel, including: a base substrate; and a wiring layer, an anode layer, and a light-emitting layer which are stacked on the base substrate sequentially, wherein the wiring layer includes a signal wiring, a first wiring and a second wiring, a projection of the first wiring on the base substrate is separated from a projection of the second wiring on the base substrate, the first and second wirings are respectively disposed on two sides of the anode layer below the anode layer, the signal wiring is between the first and second wirings, the projections of the first and second wirings on the base substrate respectively overlap projections of two sides of the anode layer on the base substrate, and a length of the second wiring is less than that of the signal wiring in an extension direction of the signal wiring.

Abstract: A scan circuit is provided. The scan circuit includes a plurality of stages. A respective stage of the scan circuit includes a second processing subcircuit, which includes a first capacitor, a sixth transistor, and a seventh transistor. The respective stage of the scan circuit further includes a sixth connecting line connecting a first electrode of the seventh transistor, a second electrode of the sixth transistor, and a second capacitor electrode of the first capacitor together. The sixth connecting line crosses over both the first capacitor electrode and the second capacitor electrode of the first capacitor.

Abstract: A display substrate, a manufacturing method therefor, and a display apparatus are provided. The display substrate includes a display area (100) and a bezel area (300), the bezel area (300) includes a circuit area (310) and a partition area (320), the circuit area (310) includes a third gate driving circuit, a second gate driving circuit (GOA-2) and a first gate driving circuit (GOA-1) arranged in sequence along a direction away from the display area (100), the partition area (320) includes a power supply line, the power supply line includes a first branch (VSS-1) and a second branch (VSS-2); orthographic projections of the second branch (VSS-2) and the first branch (VSS-1) of the power supply line on the base substrate have an overlapped area.

Abstract: A display panel has a functional device setting region and a primary display region. The functional device setting region is provided therein with a mounting hole, and the functional device setting region includes a border region surrounding the mounting hole. The display panel includes a substrate, pixel circuits, enable signal lines, scan signal lines and reset signal lines. At least one enable signal line includes a second enable signal sub-line located in the border region. At least one scan signal line includes a second scan signal sub-line located in the border region. At least one reset signal line includes a second reset signal sub-line located in the border region. Among second enable signal sub-lines of the enable signal lines, second scan signal sub-lines of the scan signal lines, and second reset signal sub-lines of the reset signal lines, at least three signal lines are located in different three layers.

Abstract: Provided are a display substrate and a display device. The display substrate includes a base substrate, and a driving circuit layer and a light-emitting device layer on the base substrate. The display substrate includes a light-transmitting display area and a normal display area, the normal display area surrounds at least a portion of the light-transmitting display area. The normal display area includes multiple normal driving circuits and multiple dummy driving circuits; some dummy driving circuit are used for driving light-emitting devices located in the light-transmitting display area. The display substrate further includes multiple normal data lines coupled to the normal driving circuits; at least one normal data line is coupled to a data signal input terminal through a data lead; an orthographic projection of the data lead onto the base substrate at least partially overlaps an orthographic projection of the dummy driving circuit onto the base substrate.

Abstract: A display substrate is provided with a setup region including an acquisition region and a transition region adjacent to the acquisition region. The display substrate includes: a base substrate; light emitting devices on the base substrate, at least a part of the light emitting devices are provided in each of the acquisition region and the transition region; and driving circuits on the base substrate, each of the driving circuits being configured to provide a driving signal to a corresponding light emitting device. A driving circuit corresponding to a light emitting device in the transition region is a first local driving circuit which is in the transition region. A driving circuit corresponding to a light emitting device in the acquisition region is a peripheral driving circuit which is in the transition region and is connected to the corresponding light emitting device in the acquisition region through a connection line.

Abstract: Disclosed is a pixel circuit arranged in a display substrate, which comprises a first driving mode and a second driving mode. Content displayed in the display substrate comprises multiple display frames. In the first driving mode and the second driving mode, the display frames comprise refresh frames. A signal of a second scanning line is the same as that of a third scanning line. The time of which the signal of the second scanning line is an active level signal comprises a first refresh time period, a second refresh time period and a third refresh time period, which sequentially occur at intervals. During the second refresh time period, a signal of a first scanning line is an inactive level signal. The voltage of a signal at a reset voltage end is a positive voltage, and the voltage of a signal at a first initial voltage end is a negative voltage.

Abstract: A driving circuit, a driving method, a pixel circuit, a display panel and a display device are provided. The driving circuit includes a first switching circuit and a scanning signal generation circuit; the first switching circuit is electrically connected to a first gating control line, at least two data output terminals of a source driver and the scanning signal generation circuit, and is configured to write a data signal provided by the at least two data output terminals into the scanning signal generation circuit under the control of a first gating control signal provided by the first gating control line; the scanning signal generation circuit is configured to generate a scanning signal according to the data signal, and output the scanning signal through the scanning signal output terminal.

Abstract: Provided are a display panel and a display apparatus. The display panel includes a base substrate, a fifth conductive layer, an electrode layer and a pixel defining layer. The electrode layer includes a plurality of electrode portions, at least one of the electrode portions comprises a body portion and a supplemental portion which are connected with each other, and an orthographic projection of the supplemental portion on the base substrate at least partially overlaps with an orthographic projection of a corresponding power line on the base substrate.

Abstract: A pixel circuit, a driving method and a display device. The pixel circuit includes a light emitting element, a driving circuit, an energy storage circuit, an initialization circuit, and a compensation control circuit; the display period of the pixel circuit includes a refresh frame and a retention frame; the refresh frame and the retention frame respectively include a set phase and a light emitting phase set successively; the initialization circuit is configured to control provide the initial voltage to the first terminal and/or the second terminal of the driving circuit under the control of the initial control signal provided by the initial control terminal, in the refresh frame and the retention frame, at least in the set phase. The present disclose improves hysteresis and improves the display effect.

Abstract: A pixel circuit and a driving method thereof, and a display device are provided. The pixel circuit includes a driving sub-circuit, a data writing sub-circuit, a first light-emitting control sub-circuit, a second light-emitting control sub-circuit, a compensation sub-circuit, and a first reset sub-circuit, and is configured to generate a driving current to control a light-emitting element to emit light, the first reset sub-circuit comprises a first transistor, the compensation sub-circuit comprises a second transistor, the first transistor and the second transistor are both polysilicon oxide thin film transistors, and an active layer type of the first transistor and an active layer type of the second transistor are different from an active layer type of a transistor comprised in at least one selected from a group consisting of the driving sub-circuit, the data writing sub-circuit, the first light-emitting control sub-circuit, and the second light-emitting control sub-circuit.

Abstract: A display panel includes a pixel driving circuit including a first type transistor and a second type transistor, the display panel further includes a base substrate, a first active layer located on a side of the base substrate, a second active layer located on the side of the first active layer away from the base substrate, a first conductive layer located between the first active layer and the second active layer; at least partial structure of the first active layer is used to form a channel region of the first type transistor; at least partial structure of the second active layer is used to form the channel region of the second type transistor; partial structure of the first conductive layer is used to form the gate of the first type transistor, partial structure of the first conductive layer is used to form the bottom gate of the second type transistor.

Abstract: Disclosed are a display substrate and a preparation method therefor, and a display apparatus. The display substrate includes a display region and a bonding region, wherein the display region includes M pixel rows arranged sequentially, at least one pixel row includes a scan signal line and a plurality of sub-pixels arranged sequentially along an extension direction of the scan signal line, at least one sub-pixel includes a pixel drive circuit connected with the scan signal line, the pixel drive circuit at least includes a storage capacitor and a first transistor as a first initialization transistor, and the scan signal line at least includes a second scan signal line that controls the first transistor to be turned on or off, and in the at least one pixel row, the second scan signal line is arranged on a side of the storage capacitor close to a display region boundary.

Abstract: A pixel circuit includes a light-emitting element, a first resetting circuit, a control circuit and a driving circuit. The first resetting circuit writes a first initial voltage into a first node under the control of a first resetting control signal. The control circuit controls a control terminal of the driving circuit to be electrically connected to the first node under the control of a first control signal from the first control terminal, and controls the first node to be electrically connected to the first terminal of the driving circuit under the control of a second control signal from a second control terminal. A first terminal of the driving circuit is electrically connected to the light-emitting element, and the driving circuit is configured to drive the light-emitting element to emit light.

Abstract: A display panel, a manufacturing method thereof and a display device are provided. The display panel includes a base substrate, the base substrate includes a display region and a peripheral region surrounding the display region, the base substrate includes a first substrate layer, a third substrate layer and a second substrate layer which are sequentially stacked, a material of the second substrate layer includes amorphous silicon. The display region includes a transparent display region, the transparent display region includes a pixel region and a light transmission region, and a thickness of the second substrate layer located in the light transmission region is less than a thickness of at least part of the second substrate layer located outside the transparent display region.

Abstract: A display substrate and a display device are provided. The display substrate includes a base substrate and a plurality of reset signal lines. The base substrate includes a display region which includes sub-pixels arranged in array, each sub-pixels includes a pixel driving circuit and a light-emitting element. The plurality of reset signal lines extends in a first direction and include a plurality of first reset signal lines for providing a first reset signal and a plurality of second reset signal lines for providing a second reset signal, and one of the plurality of first reset signal lines and one of the plurality of second reset signal lines are respectively connected to pixel driving circuits of a plurality of sub-pixels located in a same row. A layer where the plurality of first reset signal lines are located is different from layers where the plurality of second reset signal lines are located.

Abstract: A driving circuit includes an output circuit, a first node reset circuit and a second node control capacitor; the output circuit controls a driving signal terminal to output a driving signal under the control of a potential of a first node; the first node reset circuit controls to reset the first node under the control of a potential of a second node; the second node control capacitor is electrically connected to the second node; a width-to-length ratio of an output transistor included in the output circuit is less than or equal to a first predetermined width-to-length ratio; and/or a width-to-length ratio of a first node reset transistor included in the first node reset circuit is greater than or equal to a second predetermined width-to-length ratio; and/or, a capacitance value of the second node control capacitor is greater than or equal to a predetermined capacitance value.

Abstract: A display panel includes a base substrate, a second conductive portion, and first, second and fourth conductive layers located at a side of the base substrate. The first conductive layer includes a first gate line of which orthographic projection extends along a first direction and a partial structure forms a fourth transistor's gate and a first conductive portion forming a driving transistor's gate. The second conductive layer includes a second gate line of which orthographic projection extends along the first direction and is located between orthographic projections of the first conductive portion and the first gate line, and a partial structure forms a second transistor's first gate. Orthographic projection of the second conductive portion at least partially overlaps with that of the first gate line. The fourth conductive layer includes a first connection portion connected to the first and second conductive portions through a via hole.

Abstract: An array substrate is provided. The array substrate includes a first adjacent data line and a second adjacent data line extending along a first direction. The first adjacent data line and the second adjacent data line extend from a same inter-column region between a first column of pixel driving circuit and a second column of pixel driving circuit in a display area into a boundary area between the first column of pixel driving circuit and a peripheral area. In the boundary area, the first adjacent data line and the second adjacent data line are in a same layer.