Abstract: A pixel structure includes a scan line, a data line, an active device, a first electrode layer, a second electrode layer, and an insulation layer. The active device is electrically connected to the scan line and the data line. The first electrode layer is electrically connected to the active device. The second electrode layer is electrically insulated from the first electrode layer. The insulation layer is located between the first electrode layer and the second electrode layer, and the first electrode layer or the second electrode layer includes an enclosed-frame-shaped portion, first V-shaped branch portions, and second V-shaped branch portions. The first V-shaped branch portions and the second V-shaped branch portions are arranged within the enclosed-frame-shaped portion in opposite directions, and end terminals of the first V-shaped branch portions and end terminals of the second V-shaped branch portions are connected to the enclosed-frame-shaped portion.

Abstract: A display panel includes a first substrate, plural pixel structures on the first substrate, a second substrate and a display medium between the two substrates. Each of the pixel structures includes a scan line, a data line, an active device, a pixel electrode, a common electrode, an insulating layer and a counter electrode. The active device is electrically connected to the scan line and the data line. The pixel electrode is electrically connected to the active device. The common electrode is electrically insulated from the pixel electrode. The insulating layer is between the pixel electrode and the common electrode. The counter electrode is electrically insulated from the pixel electrode and the common electrode, wherein the counter electrode is disposed symmetrically around the pixel electrode, and the voltage absolute value of the counter electrode is greater than the voltage absolute value of the pixel electrode.

Abstract: A pixel structure includes a patterned insulating layer and a patterned electrode layer. The patterned insulating layer includes a first area and a second area, and the patterned electrode layer includes a third layer and a fourth layer. The first area has a plurality of bar-shaped structures, the third area is a block electrode, and the fourth area is composed of a plurality of first bar-shaped electrodes. The third area is disposed opposite to the first area such that the third area is protruded according to the bar-shaped structures thereby forming a plurality of second bar-shaped electrodes. The fourth area is disposed opposite to the second area such that the first bar-shaped electrodes are formed on the second area.

Abstract: A pixel array includes a first color pixel unit, a second color pixel unit and a third pixel unit, and the first, second and third pixel units respectively include a scan line, a data line, an active device electrically connected to the scan line and the data line and a first pixel electrode electrically connected to the active device. The first pixel electrode has at least one first slit, and a first acute angle is formed between an extending direction of the first slit and an extending direction of the scan line. Any two of the first acute angle of the first color pixel unit, the first acute angle of the second color pixel unit, and the first acute angle of the third color pixel unit are different.

Abstract: A pixel structure having a first region and a second region adjacent to each other is provided. The pixel structure includes a first pixel electrode and a second pixel electrode. The first pixel electrode forms a plurality of first V-shaped electrode patterns. A tip of the first V-shaped electrode patterns is located at a boundary of the first region and the second region. The second pixel electrode includes a plurality of second V-shaped electrode patterns and a first protrusion electrode pattern. The first protrusion electrode pattern is connected to one of the second V-shaped electrode patterns and protrudes towards an adjacent first V-shaped electrode pattern from the tip of the second V-shaped electrode pattern.

Abstract: A pixel structure including a first and a second pixel electrode is provided. The first pixel electrode includes a first main portion and first branches. The second pixel electrode includes a second main portion and second branches. The first and second main portions are disposed at an edge of a pixel region. The first and second branches respectively extend from the first and second main portions. The second branches and the first branches are arranged in alternation, and the first branch is parallel to the adjacent second branch. A first opening is formed at neighboring ends of the first main portion and the second main portion. The end of the first main portion has a first bending part, the first bending part is disposed at the edge of the pixel region, and an end of the second branch close to the first opening is surrounded by the first bending part.

Abstract: A pixel structure of a display panel includes a gate line, a first data line, a second data line, a first active switching device, a second active switching device, a first pixel electrode and a second pixel electrode. The first pixel electrode is electrically connected to the first active switching device. The first pixel electrode includes a first main electrode disposed adjacent to one side of the first data line, and a second main electrode disposed adjacent to one side of the second data line. The second pixel electrode is electrically connected to the second active switching device. The second pixel electrode is disposed between the first main electrode and the second main electrode of the first pixel electrode.

Abstract: A LCD panel in which a pixel has a first sub-pixel area and a second sub-pixel area, each area having a storage capacitor. Each pixel has a first gate line for providing a first gate-line signal for charging the first and second storage capacitors, and a second gate line for providing a second gate-line signal for removing part of the charges in the second storage capacitor to a third capacitor after the first gate-line signal has passed. The width of the first and second gate-line signals and their timing can be varied so that the first gate-line signal provided to a row can be used as the second gate-line signal to one of the preceding rows. In some embodiments, a pixel in each row has a duplicate pixel arranged to similarly receive the first and second gate-line signals, but data signals are received from different data lines.

Abstract: A tri-state liquid crystal display panel includes a first substrate, a second substrate, a liquid crystal layer, a first electrode, a second electrode, a third electrode and a fourth electrode. The first substrate and the second substrate are disposed oppositely. The liquid crystal layer disposed between the first substrate and the second substrate includes a plurality of polymer network liquid crystals. The first electrode is disposed between the first substrate and the liquid crystal layer, the second electrode is disposed between the second substrate and the liquid crystal layer, and the first and second electrodes include planar electrodes. The third and fourth electrodes are disposed between the first substrate and the liquid crystal layer, and the third and fourth electrodes include patterned electrodes. The tri-state liquid crystal display panel has a transmission state display mode, a dark state display mode and a haze state display mode.

Abstract: A pixel driving circuit is electrically coupled between a first data line and a second data line and between a first scan line and a second scan line, and includes a first switch, a second switch, a third switch, a fourth switch, a liquid crystal capacitor electrically connected between the first switch and the second switch, a first capacitor electrically connected to the first switch, a second capacitor electrically connected to the second switch, a first storage capacitor, a second storage capacitor and at least one switching unit. The first storage capacitor is electrically connected to the third switch and supplied by a reference voltage. The second storage capacitor is electrically connected to the fourth switch and supplied by the reference voltage. The at least one switching unit is used for redistributing charges in the pixel driving circuit.

Abstract: An LCD panel with color washout improvement. In one embodiment, the LCD panel includes a plurality of pixels spatially arranged in a matrix form, each pixel defined between a respective pair of scanning lines (Gn, Gn—CS) and two neighboring data lines Dm and Dm+1, comprising a pixel electrode, a first transistor electrically coupled to the scanning lines Gn, the date line Dm and the pixel electrode, and a second transistor electrically coupled to the scanning lines Gn—CS and the pixel electrode such that when N pairs of scanning signals to the N pairs of scanning lines {Gn, Gn—CS} and a plurality of data signals to the data lines, the pixel electrode of each pixel has a first voltage at the first duration of a frame period, and a second voltage at the second duration of the frame period, respectively. The first and second voltages are substantially different from each other.

Abstract: An exemplary pixel circuit and a flat display panel using the same are provided. The pixel circuit includes three sub-electrode control circuits. The sub-electrode control circuits are controlled by two scan lines to receive data transmitted from two data lines. One of the three sub-electrode control circuits adjusts stored data by charge sharing. Accordingly, a display control of the pixel circuit is achieved by the three sub-electrode control circuits.

Abstract: A pixel array including first scan lines, second scan lines, data lines, and sub-pixels is provided. Each sub-pixel includes a first switch, a second switch, a first pixel electrode electrically connected to the first switch, a second pixel electrode electrically connected to the second switch, a third switch, and common lines connected with each other and disposed under the first and the second pixel electrode. The first and the second switch are electrically connected to the same first scan line and data line. The first scan line is located between the first and second pixel electrode. The third switch is electrically connected to the second scan line and the first pixel electrode and has a floating terminal. The floating terminal is capacitively coupled to the common line under the second pixel electrode to form a capacitor.

Abstract: A pixel structure of a display panel includes a gate line, a first data line, a second data line, a first active switching device, a second active switching device, a first pixel electrode and a second pixel electrode. The first pixel electrode is electrically connected to the first active switching device. The first pixel electrode includes a first main electrode disposed adjacent to one side of the first data line, and a second main electrode disposed adjacent to one side of the second data line. The second pixel electrode is electrically connected to the second active switching device. The second pixel electrode is disposed between the first main electrode and the second main electrode of the first pixel electrode.

Abstract: A pixel driving circuit is electrically coupled between a first data line and a second data line and between a first scan line and a second scan line, and includes a first switch, a second switch, a third switch, a fourth switch, a liquid crystal capacitor electrically connected between the first switch and the second switch, a first capacitor electrically connected to the first switch, a second capacitor electrically connected to the second switch, a first storage capacitor, a second storage capacitor and at least one switching unit. The first storage capacitor is electrically connected to the third switch and supplied by a reference voltage. The second storage capacitor is electrically connected to the fourth switch and supplied by the reference voltage. The at least one switching unit is used for redistributing charges in the pixel driving circuit.

Abstract: A driving circuit electrically coupled between a first data line and a second data line and between a first scan line and a second scan line. The driving circuit includes a first switch, a second switch, a third switch, a fourth switch, a first sub-capacitor, a second sub-capacitor, a fifth switch, a sixth switch, a first voltage dividing unit and a second voltage dividing unit. The first voltage dividing unit is coupled between a second end of the fifth switch and a reference voltage end. The second voltage dividing unit is coupled between a second end of the sixth switch and the reference voltage end, for redistributing stored electric charges.

Abstract: A liquid crystal display panel having pixel regions includes a light shielding layer having opening regions corresponding to the pixel regions, first pixel electrodes and second pixel electrodes. Each first pixel electrode includes strip first pixel electrode patterns. Each second pixel electrode includes strip second pixel electrode patterns. Each opening region includes sub regions. Each of the strip first pixel electrode patterns and its neighboring strip second pixel electrode pattern in each of the sub regions are separated by an electrode spacing. Electrode spacings in different sub regions are different. An area of all the sub regions with the electrode spacings less than or equal to 12 micrometers accounts for less than or equal to 35% area of each opening region. An area of the other sub regions with the electrode spacings greater than 12 micrometers accounts for more than or equal to 65% area of each opening region.

Abstract: A pixel array including a plurality of scan lines, a plurality of data lines, and a plurality of sub-pixel is provided. Each of the sub-pixel arranged in the nth row includes a first switch, a second switch, a first pixel electrode, a second pixel electrode, and a third switch, wherein the first switch and the second switch are electrically connected to the nth scan line and the mth data line, the first pixel electrode is electrically connected to the first switch, the second pixel electrode is electrically connected to a signal output terminal of the second switch. The first pixel electrode has a first aperture above the signal output terminal. The third switch is electrically connected to the (n+1)th scan line and the second pixel electrode, and the second pixel electrode has a second aperture above a floating terminal of the third switch.

Abstract: A display panel includes a pixel structure that has first, second, and third sub-pixels. In the first sub-pixel, a first pixel electrode having first branches and a second pixel electrode having second branches are alternately arranged. Gap dB is defined between adjacent first and second branches. In the second sub-pixel, a third pixel electrode having third branches and a fourth pixel electrode having fourth branches are alternately arranged. Gap dG is defined between adjacent third and fourth branches. In the third sub-pixel, a fifth pixel electrode having fifth branches and a sixth pixel electrode having sixth branches are alternately arranged. Gap dR is defined between adjacent fifth and sixth branches. The gaps dB, dG, and dR at least include minimum gaps dBmin, dGmin, and dRmin and gaps dBn, dGn, and dRn, respectively. Here, dGn is equal to dRn, and (1/dBn)?[(1/dRn)*1.1].

Abstract: A pixel array including a plurality of scan lines, data lines, and sub-pixels is provided. Each of the sub-pixels arranged in the nth row includes a first switch, a first pixel electrode, a second switch, a third switch, and a second pixel electrode. The first switch and the second switch are electrically connected to the nth scan line and the mth data line. The first switch and the first pixel electrode are electrically connected. The second switch has a first signal output terminal. The third switch is electrically connected to the (n+i)th scan line. The third switch has a signal input terminal electrically connected to the first signal output terminal and a second signal output terminal. The first signal output terminal is electrically insulated from the first pixel electrode and the second pixel electrode. The first signal output terminal extends to the underneath of the second pixel electrode.