Abstract: A programmable logic block provides programmable initialization values for carry chains traversing the logic block, without consuming user logic resources. An exemplary programmable logic block includes two or more carry multiplexers coupled together to form a carry chain for the programmable logic block. A carry initialization circuit has an output terminal coupled to a data input terminal of a first carry multiplexer in the carry chain. The carry initialization circuit is controlled by configuration memory cells of the programmable logic block to select one of a carry in signal, a power high signal, a ground signal, and (optionally) a signal from an interconnect structure of the logic block. Thus, an initialization value (e.g., power high or ground) can be provided to the carry chain without consuming other programmable resources within the logic block.

Abstract: A voltage switching apparatus and method are disclosed. At least one disclosed method includes providing, when a mode selection signal is in a first state, a first power rail voltage on a first power voltage line and a second, different power rail voltage on a second power voltage line. After the mode selection signal transitions to a second state, a second power rail voltage is provided on the first power voltage line and a switch between the first and second power voltage lines is closed.

Abstract: System are provided for blind echo cancellation in wireless signal processors, such as for wireless repeaters. A first embodiment of the echo cancellation system provides iterative echo cancellation for white signals, with channel identification. A second embodiment of the echo cancellation system provides iterative echo cancellation for band-limited signals, without channel identification, through the determination of a the second order statistics of a signal. The echo cancellation systems are fast, and can be implemented using modern DSP processors for CDMA and broadband wireless communication systems. Analyses and simulations show that the echo cancellation systems can achieve echo cancellation of 40 dB or more at a modest computational cost of several hundred MMACs.

Abstract: System are provided for blind echo cancellation in wireless signal processors, such as for wireless repeaters. A first embodiment of the echo cancellation system provides iterative echo cancellation for white signals, with channel identification. A second embodiment of the echo cancellation system provides iterative echo cancellation for band-limited signals, without channel identification, through the determination of a the second order statistics of a signal. The echo cancellation systems are fast, and can be implemented using modern DSP processors for CDMA and broadband wireless communication systems. Analyses and simulations show that the echo cancellation systems can achieve echo cancellation of 40 dB or more at a modest computational cost of several hundred MMACs.