Abstract: A manufacturing method of an LED package structure includes the steps of providing a base; disposing an LED chip on the base; electrically connecting the base and the LED chip by at least one metal wire, wherein the metal wire has an apex, and a height between the apex and a top surface of the LED chip is defined as a loop height; adhering a first phosphor sheet to the LED chip by a B-stage resin of the first phosphor sheet, wherein the first phosphor sheet covers the top surface, the side surface, and the electrode of the LED chip, the thickness of the first phosphor sheet is smaller than the loop height, and the apex of the metal wire is exposed from the first phosphor sheet; and disposing an encapsulation resin in the base to encapsulate the LED chip, the metal wire, and the first phosphor sheet.

Abstract: An apparatus includes a package substrate for a first SSIT product with a first top die configuration, wherein the package substrate is compatible with a second SSIT product with a second top die configuration, and wherein the first top die configuration is different from the second top die configuration.

Abstract: A LED device includes a base structure having a receiving space, a light-emitting chip, an encapsulating structure, and a phosphor layer. The receiving space is defined by an inner bottom surface of the base structure and an inner side wall surrounding the inner bottom surface. The light-emitting chip is mounted on the bottom of the receiving space. The encapsulating structure is filled into the receiving space to cover the light-emitting chip. The phosphor layer is formed on the encapsulating structure. The dimension of the phosphor layer is more than the dimension of the receiving space and less than 1.5 times that of the receiving space, so as to mount on the top surface of the base structure.

Abstract: A LED device includes a base structure having a receiving space, a light-emitting chip, an encapsulating structure, and a phosphor layer. The receiving space is defined by an inner bottom surface of the base structure and an inner side wall surrounding the inner bottom surface. The light-emitting chip is mounted on the bottom of the receiving space. The encapsulating structure is filled into the receiving space to cover the light-emitting chip. The phosphor layer is formed on the encapsulating structure. The dimension of the phosphor layer is more than the dimension of the receiving space and less than 1.5 times that of the receiving space, so as to mount on the top surface of the base structure.

Abstract: A LED device includes a base structure having a receiving space, a light-emitting chip, an encapsulating structure, and a phosphor layer. The receiving space is defined by an inner bottom surface of the base structure and an inner side wall surrounding the inner bottom surface. The light-emitting chip is mounted on the bottom of the receiving space. The encapsulating structure is filled into the receiving space to cover the light-emitting chip. The phosphor layer is formed on the encapsulating structure. The dimension of the phosphor layer is more than the dimension of the receiving space and less than 1.5 times that of the receiving space, so as to mount on the top surface of the base structure.

Abstract: A photoelectric semiconductor device has a metal wiring layer packed or embedded into a housing for enhancing package stability and electric connectivity. The housing has a cavity structure, and at least one LED chip and an encapsulating material are configured inside the cavity structure. The metal wiring layer locates inside the housing, or in other words, between the top surface and the bottom surface of the housing, and extends to the bottom of the cavity structure to electrically connect the LED chip. With fully wrapping around, the metal wiring layer has higher stability and more reliability from being harmed by outside changes in humidity and temperature.

Abstract: A light emitting diode includes a base, a light emitting chip, and a wavelength converting layer. The base is formed with a recessed portion that has a bottom wall surface, and a side wall surface extending upwardly from the bottom wall surface and cooperating with the bottom wall surface to define a receiving space. The light emitting chip is provided on the bottom wall surface of the receiving space, and has a top chip surface disposed below a top surface of the base, and a peripheral chip surface extending downwardly from the top chip surface and being substantially parallel to and forming a gap with the side wall surface of the recessed portion. The wavelength converting layer is filled in the receiving space in the recessed portion so as to cover the top chip surface and the peripheral chip surface of the light emitting chip.

Abstract: A light emitting diode includes a base, a light emitting chip, and a wavelength converting layer. The base is formed with a recessed portion that has a bottom wall surface, and a sidewall surface extending upwardly from the bottom wall surface and cooperating with the bottom wall surface to define a receiving space. The light emitting chip is provided on the bottom wall surface of the receiving space, and has a top chip surface disposed below a top surface of the base, and a peripheral chip surface extending downwardly from the top chip surface and being substantially parallel to and forming a gap with the side wall surface of the recessed portion. The wavelength converting layer is filled in the receiving space in the recessed portion so as to cover the top chip surface and the peripheral chip surface of the light emitting chip.

Abstract: Methods and apparatus are provided for a cooling system (100) for cooling a microelectronic device (102). The system includes a heat sink (104) and first and second heat pipes (106, 108). The heat sink (104) has a top side (114) and a bottom side (116). The top side (114) is coupled to the microelectronic device (102). The first and second heat pipes (106, 108) are embedded in the heat sink (104). The first heat pipe (106) is disposed along a first line (118). The second heat pipe (108) is disposed along a second line (120) that is not parallel to the first line (118) and each of the first and second heat pipes (106, 108) includes a portion located beneath the microelectronic device (102).