Abstract: The present invention provides a high-speed connector on a high density MINI version chip side, which comprises a board end connector, a wire end connector and a printed circuit board; the board end connector is arranged on the printed circuit board; the board end connector comprises a board end connector shell and a board end connector body arranged in the board end connector shell; the wire end connector comprises a wire end case and a tongue plate fixed to the wire end case; wherein at least one guide piece is extended from the board end connector shell, and the wire end case is provided with at least one guide slot for creating a butt joint with the guide piece. The connector of the present invention utilizes the space of the board end to the maximum extent, solves the problem that the CPU occupies the space of the board end due to the increased size of the heat dissipation module, and can realize high-speed data transmission.

Abstract: The present disclosure provides a strap unlocking mechanism adapted for a cable plug and a connector. The strap unlocking mechanism comprises an elastic latch, a strap and an abutting rod. The elastic latch comprises a locking portion and an unlocking elastic piece disposed on the cable plug. The unlocking elastic piece is connected to one side of the locking portion. One end of the strap is connected with the unlocking elastic piece. The abutting rod is disposed on the cable plug and abuts against a surface of the strap close to the unlocking elastic piece. A first pull end and a second pull end are defined on the strap by the abutting rod. The extension direction of the first pull end and the extension direction of the second pull end being different.

Abstract: The present invention provides a high-speed connector on a high density MINI version chip side, which comprises a board end connector, a wire end connector and a printed circuit board; the board end connector is arranged on the printed circuit board; the board end connector comprises a board end connector shell and a board end connector body arranged in the board end connector shell; the wire end connector comprises a wire end case and a tongue plate fixed to the wire end case; wherein at least one guide piece is extended from the board end connector shell, and the wire end case is provided with at least one guide slot for creating a butt joint with the guide piece. The connector of the present invention utilizes the space of the board end to the maximum extent, solves the problem that the CPU occupies the space of the board end due to the increased size of the heat dissipation module, and can realize high-speed data transmission.

Abstract: Provided is a plug and a connector assembly, which belong the technical field of connectors. The plug includes an insulating body, a cable and a circuit board. The insulating body includes a body part and a mating part which extends forwardly from the body part. The cable and the circuit board are electrically connected. The circuit board has an inserting part which protrudes forwardly out of the mating part. An outer side of the mating part is provided with a limiting groove and a guiding wall disposed within the limiting groove, and the guiding wall is adjacent to the inserting part and is capable of guiding insertion of the plug into a socket and preventing the plug from shaking in an up-down direction and/or in a left-right direction when the plug is inserted into the socket. The connector assembly includes the plug and the socket.

Abstract: Provided is a plug and a connector assembly, which belong the technical field of connectors. The plug includes an insulating body, a cable and a circuit board. The insulating body includes a body part and a mating part which extends forwardly from the body part. The cable and the circuit board are electrically connected. The circuit board has an inserting part which protrudes forwardly out of the mating part. An outer side of the mating part is provided with a limiting groove and a guiding wall disposed within the limiting groove, and the guiding wall is adjacent to the inserting part and is capable of guiding insertion of the plug into a socket and preventing the plug from shaking in an up-down direction and/or in a left-right direction when the plug is inserted into the socket. The connector assembly includes the plug and the socket.

Abstract: Provided are a plug and an electrical connector component. The plug includes an insulating body, a circuit board fixed to the insulating body, and a cable electrically connected with the circuit board and extending backwards from the insulating body. The insulating body includes a body part and a mating part which extends forwards from the body part; the circuit board has an inserting part that protrudes forwards out of the mating part; metal contact pieces are distributed on upper and lower surfaces of the inserting part; the insulating body is provided with a pair of baffle plates extending forwards from the body part; a pair of the baffle plates are respectively arranged on left and right sides of the mating part; and a limiting groove configured to guide the insertion of the plug with the socket is formed between each of the baffle plates and the mating part.

Abstract: Provided are a plug and an electrical connector component. The plug includes an insulating body, a circuit board fixed to the insulating body, and a cable electrically connected with the circuit board and extending backwards from the insulating body. The insulating body includes a body part and a mating part which extends forwards from the body part; the circuit board has an inserting part that protrudes forwards out of the mating part; metal contact pieces are distributed on upper and lower surfaces of the inserting part; the insulating body is provided with a pair of baffle plates extending forwards from the body part; a pair of the baffle plates are respectively arranged on left and right sides of the mating part; and a limiting groove configured to guide the insertion of the plug with the socket is formed between each of the baffle plates and the mating part.

Abstract: This invention discloses a new switching device supported on a semiconductor that includes a drain disposed on a first surface and a source region disposed near a second surface of said semiconductor opposite the first surface. The switching device further includes an insulated gate electrode disposed on top of the second surface for controlling a source to drain current. The switching device further includes a source electrode interposed into the insulated gate electrode for substantially preventing a coupling of an electrical field between the gate electrode and an epitaxial region underneath the insulated gate electrode. The source electrode further covers and extends over the insulated gate for covering an area on the second surface of the semiconductor to contact the source region. The semiconductor substrate further includes an epitaxial layer disposed above and having a different dopant concentration than the drain region.

Abstract: The present disclosure discloses a field effect transistor (“FET”), a termination structure and associated method for manufacturing. The termination structure for the FET includes a plurality of termination cells arranged substantially in parallel from an inner side toward an outer side of a termination area of the FET. Each of the termination cells comprises a termination trench and a guard ring region located underneath the bottom of the termination trench in the semiconductor layer. Each termination trench is lined with a termination insulation layer, and is filled with a first conductive spacer and a second conductive spacer respectively against an inner sidewall and an outer sidewall of the termination trench and spaced apart from each other with a space, and a dielectric layer filling the space between the first and the second spacers.

Abstract: This invention discloses a new switching device supported on a semiconductor that includes a drain disposed on a first surface and a source region disposed near a second surface of said semiconductor opposite the first surface. The switching device further includes an insulated gate electrode disposed on top of the second surface for controlling a source to drain current. The switching device further includes a source electrode interposed into the insulated gate electrode for substantially preventing a coupling of an electrical field between the gate electrode and an epitaxial region underneath the insulated gate electrode. The source electrode further covers and extends over the insulated gate for covering an area on the second surface of the semiconductor to contact the source region. The semiconductor substrate further includes an epitaxial layer disposed above and having a different dopant concentration than the drain region.

Abstract: A semiconductor device having an ESD protection structure and a method for forming the semiconductor device. The ESD protection structure is formed atop a termination area of the substrate and is electrically coupled between a source metal and a gate metal of the semiconductor device. The ESD protection structure has a first portion adjacent to the source metal, a second portion adjacent to the gate metal and a middle portion between and connecting the first portion and the second portion, wherein the middle portion has a first thickness greater than a second thickness of the first portion and the second portion. Such an ESD protection structure is beneficial to the formation of interlayer vias which are formed to couple the ESD protection structure to the source metal and the gate metal.

Abstract: A field effect transistor (“FET”), a termination structure and associated method for manufacturing. The FET has a plurality of active transistor cells and a termination structure. The termination structure for the FET includes a plurality of termination cells arranged substantially in parallel from an inner side toward an outer side of a termination area of the FET. Each of the termination cells comprises a termination trench lined with a termination insulation layer and filled with a termination conduction layer. The innermost termination cell is electrically coupled to gate regions of the active transistor cells while the rest of the termination cells are electrically floating.

Abstract: A semiconductor device with a substrate, an epitaxy layer formed on the substrate, a plurality of deep wells formed in the epitaxy layer, a plurality of trench gate MOSFET units each of which is formed in top of the epitaxy layer between two adjacent deep well, wherein a trench gate of the trench gate MOSFET unit is shallower than half of the distance between two adjacent deep wells, which may reduce the product of on-state resistance and the gate charge of the semiconductor device.

Abstract: A JFET having a semiconductor substrate of a first doping type, an epitaxial layer of the first doping type located on the semiconductor substrate, a body region of a second doping type located in the epitaxial layer, a source region of the first doping type located in the epitaxial layer, a gate region of the second doping type located in the body region, and a shielding layer of the second doping type located in the epitaxial layer, wherein the semiconductor substrate is configured as a drain region, the shielding layer is in a conductive path formed between the source region and the drain region.

Abstract: A super junction structural semiconductor device with a substantially rectangle-shaped first region, and a second region surrounding the periphery of the first region; trench gate MOSFET units in the first region comprising a plurality of trench gate regions and a first plurality of pillars; a body region between the trench gate regions and the first plurality of pillars; a second plurality of pillars in the second region extending along a corresponding side of the first region comprising a plurality of lateral pillars and a plurality of longitudinal pillars, wherein in a corner part of the second region, ends of the plurality of lateral pillars and ends of the plurality of longitudinal pillars are stagger and separated apart from each other.

Abstract: The present disclosure discloses a field effect transistor (“FET”), a termination structure and associated method for manufacturing. The termination structure for the FET includes a plurality of termination cells arranged substantially in parallel from an inner side toward an outer side of a termination area of the FET. Each of the termination cells comprises a termination trench and a guard ring region located underneath the bottom of the termination trench in the semiconductor layer. Each termination trench is lined with a termination insulation layer, and is filled with a first conductive spacer and a second conductive spacer respectively against an inner sidewall and an outer sidewall of the termination trench and spaced apart from each other with a space, and a dielectric layer filling the space between the first and the second spacers.

Abstract: This invention discloses a new switching device that includes a drain disposed on a first surface and a source region disposed near a second surface of a semiconductor opposite the first surface. An insulated gate electrode is disposed on top of the second surface for controlling a source to drain current and a source electrode is interposed into the insulated gate electrode for substantially preventing a coupling of an electrical field between the gate electrode and an epitaxial region underneath the insulated gate electrode. The source electrode further covers and extends over the insulated gate for covering an area on the second surface of the semiconductor to contact the source region, An epitaxial layer is disposed above and having a different dopant concentration than the drain region. The gate electrode is insulated from the source electrode by an insulation layer having a thickness depending on a Vgsmax rating of the vertical power device.

Abstract: A field effect transistor (“FET”), a termination structure and associated method for manufacturing. The FET has a plurality of active transistor cells and a termination structure. The termination structure for the FET includes a plurality of termination cells arranged substantially in parallel from an inner side toward an outer side of a termination area of the FET. Each of the termination cells comprises a termination trench lined with a termination insulation layer and filled with a termination conduction layer. The innermost termination cell is electrically coupled to gate regions of the active transistor cells while the rest of the termination cells are electrically floating.

Abstract: A semiconductor device wafer includes a test structure. The test structure includes a layer of material having an angle-shaped test portion disposed on at least a portion of a surface of the semiconductor wafer. A ruler marking on the surface of the semiconductor wafer proximate the test portion is adapted to facilitate measurement of a change in length of the test portion.

Abstract: A semiconductor device with a substrate, an epitaxy layer formed on the substrate, a plurality of deep wells formed in the epitaxy layer, a plurality of trench gate MOSFET units each of which is formed in top of the epitaxy layer between two adjacent deep well, wherein a trench gate of the trench gate MOSFET unit is shallower than half of the distance between two adjacent deep wells, which may reduce the product of on-state resistance and the gate charge of the semiconductor device.