Patents by Inventor Tim Z. Hossain

Tim Z. Hossain has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11846738
    Abstract: A method of forming a radiation detector includes forming a stack including a plurality of arrays of radiation detection devices. Forming an array of the plurality of arrays includes forming a polysilicon layer over an interlayer dielectric layer of another array of the plurality of arrays; forming charge storage layers over the polysilicon layer; forming a second polysilicon layer over the charge storage layers; etching the second polysilicon layer to form gate stacks; and depositing an interlayer dielectric disposed on at least three sides of the gate stacks, the interlayer dielectric including a radiation reactive material.
    Type: Grant
    Filed: April 22, 2020
    Date of Patent: December 19, 2023
    Assignee: CERIUM LABORATORIES LLC
    Inventors: Tim Z Hossain, Mark Clopton, Clayton Fullwood
  • Publication number: 20220206170
    Abstract: A method of forming a radiation detector includes forming a stack including a plurality of arrays of radiation detection devices. Forming an array of the plurality of arrays includes forming a polysilicon layer over an interlayer dielectric layer of another array of the plurality of arrays; forming charge storage layers over the polysilicon layer; forming a second polysilicon layer over the charge storage layers; etching the second polysilicon layer to form gate stacks; and depositing an interlayer dielectric disposed on at least three sides of the gate stacks, the interlayer dielectric including a radiation reactive material.
    Type: Application
    Filed: April 22, 2020
    Publication date: June 30, 2022
    Inventors: TIM Z HOSSAIN, MARK CLOPTON, CLAYTON FULLWOOD
  • Patent number: 8440357
    Abstract: Systems that facilitate operating proton exchange membrane (PEM) fuel cells are provided. The systems employ a fuel supply component that supplies fuel to the proton exchange membrane fuel cell; and a regeneration component that provides a reducing agent comprising a mixture of hydrogen and nitrogen, or a reducing plasma to a cathode catalyst of the proton exchange membrane fuel cell to reduce the cathode catalyst.
    Type: Grant
    Filed: June 9, 2011
    Date of Patent: May 14, 2013
    Assignee: Spansion LLC
    Inventors: Tim Z. Hossain, Daniel E. Posey
  • Publication number: 20110236773
    Abstract: Systems that facilitate operating proton exchange membrane (PEM) fuel cells are provided. The systems employ a fuel supply component that supplies fuel to the proton exchange membrane fuel cell; and a regeneration component that provides a reducing agent comprising a mixture of hydrogen and nitrogen, or a reducing plasma to a cathode catalyst of the proton exchange membrane fuel cell to reduce the cathode catalyst.
    Type: Application
    Filed: June 9, 2011
    Publication date: September 29, 2011
    Applicant: SPANSION LLC
    Inventors: Tim Z. Hossain, Daniel E. Posey
  • Patent number: 7981825
    Abstract: Systems and methods that facilitate operating proton exchange membrane (PEM) fuel cells are provided. The methods can involve contacting a reducing agent comprising a mixture of hydrogen and nitrogen, or a reducing plasma with a cathode catalyst of a proton exchange membrane fuel cell to reduce the cathode catalyst. The systems employ a fuel supply component that supplies fuel to the proton exchange membrane fuel cell; and a regeneration component that provides a reducing agent comprising a mixture of hydrogen and nitrogen, or a reducing plasma to a cathode catalyst of the proton exchange membrane fuel cell to reduce the cathode catalyst.
    Type: Grant
    Filed: March 27, 2008
    Date of Patent: July 19, 2011
    Assignee: Spansion LLC
    Inventors: Tim Z. Hossain, Daniel E. Posey
  • Publication number: 20100059762
    Abstract: Described are Silicon-on-Insulator devices containing a diamond-like carbon layer, methods of making the Silicon-on-Insulator devices, and methods of using the Silicon-on-Insulator devices.
    Type: Application
    Filed: September 8, 2008
    Publication date: March 11, 2010
    Applicant: SPANSION LLC
    Inventors: Tim Z. Hossain, Daniel E. Posey
  • Patent number: 7645993
    Abstract: Neutron detectors including one or more gamma shields over memory dies and methods of making the neutron detectors are provided. The neutron detectors can contain two or more memory dies, neutron-reactant layers over the two or more memory dies, and one or more gamma shields over at least a portion of or an entire of the two or more memory dies. By containing the gamma shield over the at least a portion of or an entire of the two or more memory dies, the neutron detector can detect and discriminate neutrons in the presence of gamma rays.
    Type: Grant
    Filed: December 28, 2007
    Date of Patent: January 12, 2010
    Assignee: Spansion, LLC
    Inventors: Jerzy Gazda, Tim Z. Hossain
  • Publication number: 20090246584
    Abstract: Systems and methods that facilitate operating proton exchange membrane (PEM) fuel cells are provided. The methods can involve contacting a reducing agent comprising a mixture of hydrogen and nitrogen, or a reducing plasma with a cathode catalyst of a proton exchange membrane fuel cell to reduce the cathode catalyst. The systems employ a fuel supply component that supplies fuel to the proton exchange membrane fuel cell; and a regeneration component that provides a reducing agent comprising a mixture of hydrogen and nitrogen, or a reducing plasma to a cathode catalyst of the proton exchange membrane fuel cell to reduce the cathode catalyst.
    Type: Application
    Filed: March 27, 2008
    Publication date: October 1, 2009
    Applicant: SPANSION LLC
    Inventors: Tim Z. Hossain, Daniel E. Posey
  • Publication number: 20090166550
    Abstract: Neutron detectors including one or more gamma shields over memory dies and methods of making the neutron detectors are provided. The neutron detectors can contain two or more memory dies, neutron-reactant layers over the two or more memory dies, and one or more gamma shields over at least a portion of or an entire of the two or more memory dies. By containing the gamma shield over the at least a portion of or an entire of the two or more memory dies, the neutron detector can detect and discriminate neutrons in the presence of gamma rays.
    Type: Application
    Filed: December 28, 2007
    Publication date: July 2, 2009
    Applicant: SPANSION LLC
    Inventors: Jerzy Gazda, Tim Z. Hossain
  • Publication number: 20090029202
    Abstract: Disclosed are fuel cells and methods of using fuel cells involving the use of an anode input gas comprising deuterium.
    Type: Application
    Filed: July 27, 2007
    Publication date: January 29, 2009
    Applicant: SPANSION LLC
    Inventors: Tim Z. Hossain, Daniel E. Posey
  • Patent number: 6579788
    Abstract: A method of forming conductive interconnections is disclosed herein. In one illustrative embodiment, the method comprises forming an opening in a layer of insulation material, forming a first plurality of silicon seed atoms in the opening, and performing a first tungsten growing process to form tungsten material in the opening. The method further comprises forming a second plurality of silicon seed atoms in the opening above at least a portion of the tungsten material formed during the first tungsten growing process, and performing at least one additional tungsten growing process after forming the second plurality of silicon seed atoms to further form tungsten material in the opening.
    Type: Grant
    Filed: September 18, 2000
    Date of Patent: June 17, 2003
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Clive Martin Jones, Tim Z. Hossain, Amiya R. Ghatak-Roy
  • Patent number: 6515367
    Abstract: An integrated circuit and manufacturing method therefor is provided having a semiconductor substrate with a semiconductor device. A device dielectric layer is formed on the semiconductor substrate, and a channel dielectric layer formed on the device dielectric layer has an opening formed therein. A barrier layer lines the channel opening, and a conductor core fills the opening over the barrier layer. Self-aligned sub-caps of silicide and/or oxides are formed over the conductor core and then capped by a capping layer which covers the sub-caps and the channel dielectric layer.
    Type: Grant
    Filed: April 15, 2002
    Date of Patent: February 4, 2003
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Joffre F. Bernard, Minh Van Ngo, Tim Z. Hossain
  • Patent number: 6434217
    Abstract: A system and method are presented for determining the thickness and elemental composition of a layer within a measurement sample in an easy and inexpensive manner. An embodiment of the method includes impinging an incident x-ray beam into an exposed surface of a measurement sample containing one or more layers. The incident x-ray beam passes through the sample and may refract depending on the composition of the layers to produce a transmitted x-ray beam. The intensity and the angle of refraction of the transmitted x-ray beam may then be measured. These measurements may be compared to the results of a calibration sample that has been prepared with a known thickness and composition relative to the layer characteristics of the sample. The intensity of the transmitted x-ray beam is a function of the thickness of the layer; while the angle of refraction is a function of the elemental composition of the layer.
    Type: Grant
    Filed: October 10, 2000
    Date of Patent: August 13, 2002
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Bruce L. Pickelsimer, Tim Z. Hossain
  • Patent number: 6406996
    Abstract: An integrated circuit and manufacturing method therefor is provided having a semiconductor substrate with a semiconductor device. A device dielectric layer is formed on the semiconductor substrate, and a channel dielectric layer formed on the device dielectric layer has an opening formed therein. A barrier layer lines the channel opening, and a conductor core fills the opening over the barrier layer. Self-aligned sub-caps of silicide and/or oxides are formed over the conductor core and then capped by a capping layer which covers the sub-caps and the channel dielectric layer.
    Type: Grant
    Filed: September 30, 2000
    Date of Patent: June 18, 2002
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Joffre F. Bernard, Minh Van Ngo, Tim Z. Hossain
  • Patent number: 6376267
    Abstract: A method is presented which uses glancing-angle X-ray fluorescence techniques to determine the roughness of a target surface. A primary X-ray beam is incident upon the target surface at an angle of incidence of less than about 0.2 degrees. Intensities of the elastically scattered primary radiation peak and at least one emitted secondary radiation peak are recorded. The experimental conditions are varied, preferably by changing the angle of incidence of the primary beam slightly, to generate a set of scattered primary and emitted secondary peak intensities. The secondary peak intensity may then be plotted against the scattered primary peak intensity. The plotted points form a line, and the slope of the line is determined. This slope depends on the roughness of the sample surface. The exact roughness may be obtained by comparing the slope to calibration data obtained using direct roughness measurements by a technique such as atomic force microscopy.
    Type: Grant
    Filed: March 10, 1999
    Date of Patent: April 23, 2002
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Brooke M. Noack, Tim Z. Hossain
  • Patent number: 6271112
    Abstract: A method for reducing die loss in a semiconductor fabrication process which employs titanium nitride and HDP oxide is provided. In the fabrication of multilevel interconnect structures, there is a propensity for defect formation in a process in which titanium nitride and HDP oxide layers are in contact along the edge of a semiconductor substrate. A dielectric interlayer is provided which improves the interfacial properties between titanium nitride and HDP oxide and thereby reduces defects caused by delamination at the titanium nitride/HDP oxide interface.
    Type: Grant
    Filed: November 13, 1998
    Date of Patent: August 7, 2001
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Christopher L. Wooten, Craig W. Christian, Thomas E. Spikes, Jr., Allen L. Evans, Tim Z. Hossain
  • Patent number: 6242785
    Abstract: A transistor and a method for making a transistor are described. A silicon gate conductor is patterned over a gate dielectric upon a silicon substrate. Dopant impurity distributions self-aligned to the gate conductor may be introduced. Silicon nitride (“nitride”) spacers are formed adjacent to opposed sidewall surfaces of the gate conductor. Oxide caps are formed covering exposed outer surfaces of the nitride spacers. The oxide caps prevent dissociation of the nitride spacers during a subsequent pre-amorphization implant. A preclean is subsequently used to remove oxides from the surfaces of the gate conductor and semiconductor substrate. The preclean may also remove the oxide caps, but does not attack the nitride spacers. A salicide process is used to form low-resistance gate, source, and drain silicides.
    Type: Grant
    Filed: January 26, 1999
    Date of Patent: June 5, 2001
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Tim Z. Hossain, Amiya R. Ghatak-Roy, Clive Jones
  • Patent number: 6191032
    Abstract: It has been observed that Si introduced into an Al metal line of an Al, Ti, and Si-containing layer stack of an integrated circuit, at concentrations uniformly less than the solid solubility of Si in Al, results in a reduction in Al metal line voiding. Such voiding is a stress induced phenomenon and the introduction of Si appears to reduce stresses in the Al metal lines. By controlling Ti deposition conditions to achieve desired thickness and grain-size characteristics of the Ti underlayer, a self-regulating filter for introduction of Si into the Al metal layer is provided. Si is introduced into the Al metal layer by migration through a suitably deposited Ti layer, rather than during Al layer deposition.
    Type: Grant
    Filed: February 4, 1997
    Date of Patent: February 20, 2001
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Don A. Tiffin, William S. Brennan, David Soza, Patrick L. Smith, Allen White, Tim Z. Hossain
  • Patent number: 6173036
    Abstract: For small angles that are near critical angle, a primary incident X-ray beam has excellent depth resolution. A series of X-ray fluorescence measurements are performed at varying small angles and analyzed for depth profiling of elements within a substrate. One highly useful application of the X-ray fluorescence measurements is depth profiling of a dopant used in semiconductor manufacturing such as arsenic, phosphorus, and boron. In one example, angles are be varied from 0.01° to 0.20° and measurements made to profile arsenic distribution within a semiconductor wafer. In one embodiment, measurements are acquired using a total reflection X-ray fluorescence (TXRF) type system for both known and unknown profile distribution samples. The fluorescence measurements are denominated in counts/second terms and formed as ratios comparing the known and unknown sample results. The count ratios are compared to ratios of known to unknown samples that are acquired using a control analytical measurement technique.
    Type: Grant
    Filed: July 31, 1998
    Date of Patent: January 9, 2001
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Tim Z. Hossain, Don A. Tiffin, Cornelia A. Weiss
  • Patent number: 6156650
    Abstract: A method of making a semiconductor device to reduce or prevent defects caused by the ejection of deposited material. The method includes a first layer of material deposited over a substrate in the presence of a gaseous ambient. A portion of the gaseous ambient is trapped by the first layer. This entrapped portion could cause defects during subsequent elevated temperature processing as the gas attempts to escape from the first layer. To prevent or reduce this problem, after depositing the first layer and before depositing a second layer over the first layer, the first layer is heated to remove at least a portion of the gaseous ambient trapped in the layer. For best results, the first layer is heated to a temperature at least as high as the highest temperature of later processing steps and at a pressure of no more than 1 torr. This method is particularly useful for layers formed by physical vapor deposition.
    Type: Grant
    Filed: November 13, 1998
    Date of Patent: December 5, 2000
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Tim Z. Hossain, William S. Brennan, Berta Valdez, Renee S. Prusik, Amiya R. Ghatak-Roy