Patents by Inventor Timothy A. Gosselin
Timothy A. Gosselin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11676900Abstract: An electronic assembly that includes a substrate having an upper surface and a bridge that includes an upper surface. The bridge is within a cavity in the upper surface of the substrate. A first electronic component is attached to the upper surface of the bridge and the upper surface of the substrate and a second electronic component is attached to the upper surface of the bridge and the upper surface of the substrate, wherein the bridge electrically connects the first electronic component to the second electronic component.Type: GrantFiled: December 22, 2015Date of Patent: June 13, 2023Assignee: Intel CorporationInventors: Eric J. Li, Nitin Deshpande, Shawna M. Liff, Omkar Karhade, Amram Eitan, Timothy A. Gosselin
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Publication number: 20230088170Abstract: Microelectronic assemblies, related devices and methods, are disclosed herein. In some embodiments, a microelectronic assembly may include a first die, having a first surface and an opposing second surface, in a first layer; a redistribution layer (RDL) on the first layer, wherein the RDL is electrically coupled to the second surface of the first die by solder interconnects, and a second die in a second layer on the RDL, wherein the second die is electrically coupled to the RDL by non-solder interconnects.Type: ApplicationFiled: September 21, 2021Publication date: March 23, 2023Applicant: Intel CorporationInventors: Xavier Francois Brun, Sanka Ganesan, Holly Sawyer, William J. Lambert, Timothy A. Gosselin, Yuting Wang
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Publication number: 20230086691Abstract: Microelectronic assemblies, related devices and methods, are disclosed herein. In some embodiments, a microelectronic assembly may include a microelectronic subassembly including a first bridge component in a first layer, the first bridge component having a first surface and an opposing second surface, and a die in a second layer, wherein the second layer is on the first layer, and the die is electrically coupled to the second surface of the first bridge component; a package substrate having a second bridge component embedded therein, wherein the second bridge component is electrically coupled to the first surface of the first bridge component; and a microelectronic component on the second surface of the package substrate and electrically coupled to the second bridge component, wherein the microelectronic component is electrically coupled to the die via the first and second bridge components.Type: ApplicationFiled: September 23, 2021Publication date: March 23, 2023Applicant: Intel CorporationInventors: Sriram Srinivasan, Sanka Ganesan, Timothy A. Gosselin
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Publication number: 20230078395Abstract: Disclosed herein are embedded heterogeneous architectures having minimized die shift and methods for manufacturing the same. The architectures may include a substrate, a bridge, and a material attached to the substrate. The substrate may include a first subset of vias and a second subset of vias. The bridge may be located in between the first subset and the second subset of vias. The material may include a first portion located proximate the first subset of vias, and a second portion located proximate the second subset of vias. The first and second portions may define a partial boundary of a cavity formed within the substrate and the bridge may be located within the cavity.Type: ApplicationFiled: September 10, 2021Publication date: March 16, 2023Inventors: Robin Mcree, Yosuke Kanaoka, Gang Duan, Jinhe Liu, Timothy A. Gosselin
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Publication number: 20220375844Abstract: An integrated circuit (IC) package, comprising a die having a first set of interconnects of a first pitch, and an interposer comprising an organic substrate having a second set of interconnects of a second pitch. The interposer also includes an inorganic layer over the organic substrate. The inorganic layer comprises conductive traces electrically coupling the second set of interconnects with the first set of interconnects. The die is attached to the interposer by the first set of interconnects. In some embodiments, the interposer further comprises an embedded die. The IC package further comprises a package support having a third set of interconnects of a third pitch, and a second inorganic layer over a surface of the interposer opposite to the die. The second inorganic layer comprises conductive traces electrically coupling the third set of interconnects with the second set of interconnects.Type: ApplicationFiled: May 24, 2021Publication date: November 24, 2022Applicant: Intel CorporationInventors: Xavier Francois Brun, Sanka Ganesan, Holly Sawyer, Timothy A. Gosselin
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Publication number: 20220165625Abstract: An integrated circuit package may be fabricated with a universal dummy device, instead of utilizing a dummy device that matches the bump layer of an electronic substrate of the integrated circuit package. In one embodiment, the universal dummy device may comprise a device substrate having an attachment surface and a metallization layer on the attachment surface, wherein the metallization layer is utilized to form a connection with the electronic substrate of the integrated circuit package. In a specific embodiment, the metallization layer may be a single structure extending across the entire attachment surface. In another embodiment, the metallization layer may be patterned to enable gap control between the universal dummy device and the electronic substrate.Type: ApplicationFiled: November 20, 2020Publication date: May 26, 2022Applicant: Intel CorporationInventors: Xavier Brun, Timothy Gosselin
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Patent number: 11075166Abstract: A microelectronic structure includes a microelectronic substrate having a first surface and a cavity extending into the substrate from the microelectronic substrate first surface, a first microelectronic device and a second microelectronic device attached to the microelectronic substrate first surface, and a microelectronic bridge disposed within the microelectronic substrate cavity and attached to the first microelectronic device and to the second microelectronic device. In one embodiment, the microelectronic structure may include a reconstituted wafer formed from the first microelectronic device and the second microelectronic device. In another embodiment, a flux material may extend between the first microelectronic device and the microelectronic bridge and between the second microelectronic device and the microelectronic bridge.Type: GrantFiled: August 27, 2020Date of Patent: July 27, 2021Assignee: Intel CorporationInventors: Eric J. Li, Timothy A. Gosselin, Yoshihiro Tomita, Shawna M. Liff, Amram Eitan, Mark Saltas
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Publication number: 20200395301Abstract: A microelectronic structure includes a microelectronic substrate having a first surface and a cavity extending into the substrate from the microelectronic substrate first surface, a first microelectronic device and a second microelectronic device attached to the microelectronic substrate first surface, and a microelectronic bridge disposed within the microelectronic substrate cavity and attached to the first microelectronic device and to the second microelectronic device. In one embodiment, the microelectronic structure may include a reconstituted wafer formed from the first microelectronic device and the second microelectronic device. In another embodiment, a flux material may extend between the first microelectronic device and the microelectronic bridge and between the second microelectronic device and the microelectronic bridge.Type: ApplicationFiled: August 27, 2020Publication date: December 17, 2020Applicant: Intel CorporationInventors: Eric J. LI, Timothy A. GOSSELIN, Yoshihiro TOMITA, Shawna M. LIFF, Amram EITAN, Mark SALTAS
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Patent number: 10845552Abstract: An optoelectronic apparatus is presented. In embodiments, the apparatus may include a package including a substrate with a first side and a second side opposite the first side, wherein the first side comprises a ball grid array (BGA) field. The apparatus may further include one or more integrated circuits (ICs) disposed on the first side of the substrate, inside the BGA field, that thermally interface with a printed circuit board (PCB), to which the package is to be coupled, one or more optical ICs coupled to the second side and communicatively coupled with the one or more ICs via interconnects provided in the substrate, wherein at least one of the optical ICs is at least partially covered by an integrated heat spreader (IHS), to provide dissipation of heat produced by the at least one optical IC.Type: GrantFiled: September 12, 2017Date of Patent: November 24, 2020Assignee: Intel CorporationInventors: Shawna M. Liff, Henning Braunisch, Timothy A. Gosselin, Prasanna Raghavan, Yikang Deng, Zhiguo Qian
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Patent number: 10790231Abstract: A microelectronic structure includes a microelectronic substrate having a first surface and a cavity extending into the substrate from the microelectronic substrate first surface, a first microelectronic device and a second microelectronic device attached to the microelectronic substrate first surface, and a microelectronic bridge disposed within the microelectronic substrate cavity and attached to the first microelectronic device and to the second microelectronic device. In one embodiment, the microelectronic structure may include a reconstituted wafer formed from the first microelectronic device and the second microelectronic device. In another embodiment, a flux material may extend between the first microelectronic device and the microelectronic bridge and between the second microelectronic device and the microelectronic bridge.Type: GrantFiled: July 12, 2019Date of Patent: September 29, 2020Assignee: Intel CorporationInventors: Eric J. Li, Timothy A. Gosselin, Yoshihiro Tomita, Shawna M. Liff, Amram Eitan, Mark Saltas
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Publication number: 20190355666Abstract: A microelectronic structure includes a microelectronic substrate having a first surface and a cavity extending into the substrate from the microelectronic substrate first surface, a first microelectronic device and a second microelectronic device attached to the microelectronic substrate first surface, and a microelectronic bridge disposed within the microelectronic substrate cavity and attached to the first microelectronic device and to the second microelectronic device. In one embodiment, the microelectronic structure may include a reconstituted wafer formed from the first microelectronic device and the second microelectronic device. In another embodiment, a flux material may extend between the first microelectronic device and the microelectronic bridge and between the second microelectronic device and the microelectronic bridge.Type: ApplicationFiled: July 12, 2019Publication date: November 21, 2019Applicant: Intel CorporationInventors: Eric J. Li, Timothy A. Gosselin, Yoshihiro Tomita, Shawna M. Liff, Amram Eitan, Mark Saltas
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Publication number: 20190317285Abstract: An optoelectronic apparatus is presented. In embodiments, the apparatus may include a package including a substrate with a first side and a second side opposite the first side, wherein the first side comprises a ball grid array (BGA) field. The apparatus may further include one or more integrated circuits (ICs) disposed on the first side of the substrate, inside the BGA field, that thermally interface with a printed circuit board (PCB), to which the package is to be coupled, one or more optical ICs coupled to the second side and communicatively coupled with the one or more ICs via interconnects provided in the substrate, wherein at least one of the optical ICs is at least partially covered by an integrated heat spreader (IHS), to provide dissipation of heat produced by the at least one optical IC.Type: ApplicationFiled: September 12, 2017Publication date: October 17, 2019Inventors: Shawna M. LIFF, Henning BRAUNISCH, Timothy A. GOSSELIN, Prasanna RAGHAVAN, Yikang DENG, Zhiguo QIAN
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Patent number: 10418329Abstract: A microelectronic structure includes a microelectronic substrate having a first surface and a cavity extending into the substrate from the microelectronic substrate first surface, a first microelectronic device and a second microelectronic device attached to the microelectronic substrate first surface, and a microelectronic bridge disposed within the microelectronic substrate cavity and attached to the first microelectronic device and to the second microelectronic device. In one embodiment, the microelectronic structure may include a reconstituted wafer formed from the first microelectronic device and the second microelectronic device. In another embodiment, a flux material may extend between the first microelectronic device and the microelectronic bridge and between the second microelectronic device and the microelectronic bridge.Type: GrantFiled: December 11, 2015Date of Patent: September 17, 2019Assignee: Intel CorporationInventors: Eric J. Li, Timothy A. Gosselin, Yoshihiro Tomita, Shawna M. Liff, Amram Eitan, Mark Saltas
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Publication number: 20180358296Abstract: An electronic assembly that includes a substrate having an upper surface and a bridge that includes an upper surface. The bridge is within a cavity in the upper surface of the substrate. A first electronic component is attached to the upper surface of the bridge and the upper surface of the substrate and a second electronic component is attached to the upper surface of the bridge and the upper surface of the substrate, wherein the bridge electrically connects the first electronic component to the second electronic component.Type: ApplicationFiled: December 22, 2015Publication date: December 13, 2018Inventors: Eric J. LI, Nitin DESHPANDE, Shawna M. LIFF, Omkar KARHADE, Amram EITAN, Timothy A. GOSSELIN
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Publication number: 20180337129Abstract: A microelectronic structure includes a microelectronic substrate having a first surface and a cavity extending into the substrate from the microelectronic substrate first surface, a first microelectronic device and a second microelectronic device attached to the microelectronic substrate first surface, and a microelectronic bridge disposed within the microelectronic substrate cavity and attached to the first microelectronic device and to the second microelectronic device. In one embodiment, the microelectronic structure may include a reconstituted wafer formed from the first microelectronic device and the second microelectronic device. In another embodiment, a flux material may extend between the first microelectronic device and the microelectronic bridge and between the second microelectronic device and the microelectronic bridge.Type: ApplicationFiled: December 11, 2015Publication date: November 22, 2018Applicant: Intel CorporationInventors: Eric J. Li, Timothy A. Gosselin, Yoshihiro Tomita, Shawna M. Liff, Amram Eitan, Mark Saltas
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Patent number: 9786517Abstract: Introducing an underfill material over contact pads on a surface of an integrated circuit substrate; and ablating the introduced underfill material to expose an area of the contact pads using temporally coherent electromagnetic radiation. A method including first ablating an underfill material to expose an area of contact pads on a substrate using temporally coherent electromagnetic radiation; introducing a solder to the exposed area of the contact pads; and second ablating the underfill material using temporally coherent electromagnetic radiation. A method including introducing an underfill material over contact pads on a surface of an integrated circuit substrate; defining an opening in the underfill material to expose an area of the contact pads using temporally coherent electromagnetic radiation; introducing a solder material to the exposed area of the contact pads; and after introducing the solder, removing the sacrificial material.Type: GrantFiled: September 9, 2013Date of Patent: October 10, 2017Assignee: Intel CorporationInventors: Rajendra C. Dias, Lars D. Skoglund, Anil R. Indluru, Edward R. Prack, Danish Faruqui, Tyler N. Osborn, Amram Eitan, Timothy A. Gosselin
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Publication number: 20170154828Abstract: A method and machine-readable medium including non-transitory program instructions that when executed by a processor cause the processor to perform a method including measuring at least one parameter of a substrate or a die; and establishing or modifying a thermal compression bonding recipe based on the at least one parameter, wherein the thermal compression bonding recipe is operable for thermal compression bonding of the die and the substrate. A thermal compression bonding tool including a pedestal operable to hold a substrate during a thermal compression bonding process and a bond head operable to engage a die, the tool including a controller machine readable instructions to process a substrate and a die combination, the instructions including an algorithm to implement or modify a thermal compression bonding process based on a parameter of a substrate or die.Type: ApplicationFiled: November 30, 2015Publication date: June 1, 2017Inventors: Timothy A. GOSSELIN, Patrick NARDI, Kartik SRINIVASAN, Amram EITAN, Ji Yong PARK, Christopher L. RUMER, George S. KOSTIEW
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Publication number: 20150072479Abstract: Introducing an underfill material over contact pads on a surface of an integrated circuit substrate; and ablating the introduced underfill material to expose an area of the contact pads using temporally coherent electromagnetic radiation. A method including first ablating an underfill material to expose an area of contact pads on a substrate using temporally coherent electromagnetic radiation; introducing a solder to the exposed area of the contact pads; and second ablating the underfill material using temporally coherent electromagnetic radiation. A method including introducing an underfill material over contact pads on a surface of an integrated circuit substrate; defining an opening in the underfill material to expose an area of the contact pads using temporally coherent electromagnetic radiation; introducing a solder material to the exposed area of the contact pads; and after introducing the solder, removing the sacrificial material.Type: ApplicationFiled: September 9, 2013Publication date: March 12, 2015Inventors: Rajendra C. Dias, Lars D. Skoglund, Anil R. Indluru, Edward R. Prack, Danish Faruqui, Tyler N. Osborn, Amram Eitan, Timothy A. Gosselin
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Patent number: 7740713Abstract: The present invention is directed to soldering techniques and compositions for use therein. In one aspect, a flux composition is provided. The flux composition comprises a fluxing agent comprising organic acid, an organic tacking agent and an organic wetting agent. In another aspect, a soldering method for joining objects is provided comprising the following steps. A flux composition and a solder compound are applied to at least a portion of one or more of the objects. The flux composition comprises a fluxing agent comprising organic acid, an organic tacking agent and an organic wetting agent. The objects are then joined.Type: GrantFiled: April 28, 2004Date of Patent: June 22, 2010Assignee: International Business Machines CorporationInventors: Eric Duchesne, Michael Gaynes, Timothy A. Gosselin, Kang-Wook Lee, Valerie Oberson
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Publication number: 20060242825Abstract: A circuitized substrate and a method of making the circuitized substrate are provided. The circuitized substrate includes a substrate having a conductive pad thereon. A first layer of solder enhancing material is positioned on the conductive pad, the first layer of solder enhancing material includes a first region and a second region positioned relative to the first region. A solder member is positioned on the first region of the first layer of solder enhancing material. A second layer of solder enhancing material is positioned on the solder member and on a portion of the second region of the first layer of solder enhancing material. The circuitized substrate may be used in the fabrication of an electronic package.Type: ApplicationFiled: July 14, 2006Publication date: November 2, 2006Applicant: International Business Machines CorporationInventors: Timothy Gosselin, Donald Mead