Patents by Inventor Timothy J. Southgate

Timothy J. Southgate has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8438365
    Abstract: A method of loading data into register files that correspond to respective execution units within a data-parallel processor. After receiving a first set of parameters that specify a subset of data within a first memory, the first set of parameters are compared to a plurality of sets of conditions that correspond to respective patterns of data. The first set of parameters is then converted to a second set of parameters in accordance with one of the sets of conditions satisfied by the first set of parameters. A sequence of memory addresses are generated based on the second set of parameters. Data is retrieved from locations within the first memory specified by the sequence of memory addresses and loaded into register files that correspond to respective execution units within a processor.
    Type: Grant
    Filed: October 9, 2007
    Date of Patent: May 7, 2013
    Assignee: Calos Fund Limited Liability Company
    Inventor: Timothy J. Southgate
  • Publication number: 20080301697
    Abstract: A system for multiple task management between processors includes a first processing device for executing tasks. A respective storage element is provided for storing one or more commands from each of the tasks. A command dispatcher is provided for selectively transferring a command from one of the storage elements to a command queue provided within a second processing device.
    Type: Application
    Filed: August 15, 2008
    Publication date: December 4, 2008
    Inventors: Timothy J. Southgate, Raghunath Rao, Kenneth Hesky
  • Publication number: 20080301395
    Abstract: Within a data processing system, a user-entered data declaration within a program source file is inspected to determine whether a first qualifier is provided with or omitted from the user-entered data declaration. If the first qualifier is provided, an unreserved data storage location disposed within a data-processing integrated-circuit (IC) device is identified and allocated for storage of data associated with the user-entered data declaration.
    Type: Application
    Filed: August 15, 2008
    Publication date: December 4, 2008
    Inventors: Peter Mattson, Timothy J. Southgate
  • Publication number: 20080141279
    Abstract: Within a data processing system, a user-entered data declaration within a program source file is inspected to determine whether a first qualifier is provided with or omitted from the user-entered data declaration. If the first qualifier is provided, an unreserved data storage location disposed within a data-processing integrated-circuit (IC) device is identified and allocated for storage of data associated with the user-entered data declaration.
    Type: Application
    Filed: October 9, 2007
    Publication date: June 12, 2008
    Inventors: Peter Mattson, Timothy J. Southgate, Brucek Khailany, Mark Rygh, Jim Jian Lin, Raghunath Rao, Kenneth Hesky, Udo Uebel
  • Patent number: 7171548
    Abstract: A reconfigurable computer system based on programmable logic is provided. A system design language may be used to write applications. The applications may be automatically partitioned into software components and programmable logic resource components. A virtual computer operating system may be provided to schedule and allocate system resources. The virtual computer operating system may include a virtual logic manager that may increase the capabilities of programmable logic resources in the system.
    Type: Grant
    Filed: September 19, 2003
    Date of Patent: January 30, 2007
    Assignee: Altera Corporation
    Inventors: Stephen J Smith, Timothy J Southgate
  • Publication number: 20040098569
    Abstract: A reconfigurable computer system based on programmable logic is provided. A system design language may be used to write applications. The applications may be automatically partitioned into software components and programmable logic resource components. A virtual computer operating system may be provided to schedule and allocate system resources. The virtual computer operating system may include a virtual logic manager that may increase the capabilities of programmable logic resources in the system.
    Type: Application
    Filed: September 19, 2003
    Publication date: May 20, 2004
    Applicant: Altera Corporation
    Inventors: Stephen J. Smith, Timothy J. Southgate
  • Patent number: 6658564
    Abstract: A reconfigurable computer system based on programmable logic is provided. A system design language may be used to write applications. The applications may be automatically partitioned into software components and programmable logic resource components. A virtual computer operating system may be provided to schedule and allocate system resources. The virtual computer operating system may include a virtual logic manager that may increase the capabilities of programmable logic resources in the system.
    Type: Grant
    Filed: November 19, 1999
    Date of Patent: December 2, 2003
    Assignee: Altera Corporation
    Inventors: Stephen J. Smith, Timothy J. Southgate
  • Patent number: 6588004
    Abstract: A method is described herein for designing a circuit using graphic editor software. A graphic design file is generated corresponding to a block diagram created in a graphical user interface associated with the graphic editor software. The block diagram includes a plurality of blocks and a plurality of conduits interconnecting the blocks. A block design file is generated in one of a plurality of formats for each of selected ones of the plurality of blocks in the block diagram. Each of the block design files corresponds to an implementation of its corresponding block. Modifications to any of the graphic design file and the block design files are incorporated into each other under software control.
    Type: Grant
    Filed: July 7, 2000
    Date of Patent: July 1, 2003
    Assignee: Altera Corporation
    Inventors: Timothy J. Southgate, Michael Wenzler
  • Patent number: 6408432
    Abstract: An apparatus and method for in-system programming of programmable devices includes a device configuration program with adaptive programming source code instructions that characterize device configuration instructions and data. The adaptive source code instructions may include conditional branches, subroutines, variables, configurable arrays, integer operators, and Boolean operators. These features allow for more compact and efficient device configuration instructions and data. An interpreter converts the device configuration program into formatted device configuration instructions and data. The formatted device configuration instructions and data are preferably compatible with IEEE 1149.1 JTAG-BST specifications. The formatted device configuration instructions and data are used to program a programmable device in the manner specified by the adaptive programming source code instructions.
    Type: Grant
    Filed: April 19, 2000
    Date of Patent: June 18, 2002
    Assignee: Altera Corporation
    Inventors: Alan L. Herrmann, Timothy J. Southgate
  • Patent number: 6311309
    Abstract: A method for simulating a portion of a circuit design is described. The circuit design includes a plurality of design files each corresponding to one of a plurality of design entities in the circuit design. A subset of the design entities is selected. The subset of the design entities corresponds to the portion of the circuit design to be simulated. In response to selection of the subset of the design entities, a netlist is generated under software control directly from the design files associated with the subset of the design entities. The portion of the circuit design is then simulated using the netlist.
    Type: Grant
    Filed: October 27, 1997
    Date of Patent: October 30, 2001
    Assignee: Altera Corporation
    Inventor: Timothy J. Southgate
  • Patent number: 6205579
    Abstract: A method for upgrading software is described. According to the invention, in response to operation of the software on a first platform, a connection is established between the first platform and a remote platform. Where first version data associated with the software are different from second version data from the remote platform, a portion of the software is overwritten with first updated code from the remote platform.
    Type: Grant
    Filed: October 27, 1997
    Date of Patent: March 20, 2001
    Assignee: Altera Corporation
    Inventor: Timothy J. Southgate
  • Patent number: 6161211
    Abstract: A method for designing a circuit is described. A block diagram corresponding to the circuit is generated according to an external specification associated with the circuit. Each block in the block diagram has a block specification associated therewith. A design file is generated for each block in the block diagram using the associated block specification and one of a plurality of design file templates. Each block in the block diagram is implemented by editing its corresponding design file. The operation of each block in the block diagram is simulated. A overall design for the circuit is compiled. After the design is compiled, changes are incorporated into the compiled design in response to changes in at least one design file through the use of software links maintained between the compiled design and the design files. A device is then configured according to the compiled design.
    Type: Grant
    Filed: October 27, 1997
    Date of Patent: December 12, 2000
    Assignee: Altera Corporation
    Inventor: Timothy J. Southgate
  • Patent number: 6134707
    Abstract: An apparatus and method for in-system programming of programmable devices includes a device configuration program with adaptive programming source code instructions that characterize device configuration instructions and data. The adaptive source code instructions may include conditional branches, subroutines, variables, configurable arrays, integer operators, and Boolean operators. These features allow for more compact and efficient device configuration instructions and data. An interpreter converts the device configuration program into formatted device configuration instructions and data. The formatted device configuration instructions and data are preferably compatible with IEEE 1149.1 JTAG-BST specifications. The formatted device configuration instructions and data are used to program a programmable device in the manner specified by the adaptive programming source code instructions.
    Type: Grant
    Filed: June 10, 1997
    Date of Patent: October 17, 2000
    Assignee: Altera Corporation
    Inventors: Alan L. Herrmann, Timothy J. Southgate
  • Patent number: 6120550
    Abstract: A method is described herein for generating a design file corresponding to a design entity in a logic design. An input and an output are specified for the design entity. A design file type is specified. The design file is created and a design file template corresponding to the design file type is copied into the design file. The design file template includes formatting corresponding to the design file type. The input and the output are instantiated in the design file. The designer may then completely specify the design entity in the design file.
    Type: Grant
    Filed: October 27, 1997
    Date of Patent: September 19, 2000
    Assignee: Altera Corporation
    Inventors: Timothy J. Southgate, Michael Wenzler
  • Patent number: 6110223
    Abstract: A method is described herein for designing a circuit using graphic editor software. A graphic design file is generated corresponding to a block diagram created in a graphical user interface associated with the graphic editor software. The block diagram includes a plurality of blocks and a plurality of conduits interconnecting the blocks. A block design file is generated in one of a plurality of formats for each of selected ones of the plurality of blocks in the block diagram. Each of the block design files corresponds to an implementation of its corresponding block. Modifications to any of the graphic design file and the block design files are incorporated into each other under software control.
    Type: Grant
    Filed: October 27, 1997
    Date of Patent: August 29, 2000
    Assignee: Altera Corporation
    Inventors: Timothy J. Southgate, Michael Wenzler
  • Patent number: D507783
    Type: Grant
    Filed: September 10, 2004
    Date of Patent: July 26, 2005
    Assignee: Altera Corporation
    Inventors: Michael Phipps, Timothy J. Southgate
  • Patent number: D508026
    Type: Grant
    Filed: September 10, 2004
    Date of Patent: August 2, 2005
    Assignee: Altera Corporation
    Inventors: Michael Phipps, Timothy J. Southgate
  • Patent number: D508897
    Type: Grant
    Filed: September 3, 2004
    Date of Patent: August 30, 2005
    Assignee: Altera Corporation
    Inventors: Michael Phipps, Timothy J. Southgate
  • Patent number: D510916
    Type: Grant
    Filed: September 10, 2004
    Date of Patent: October 25, 2005
    Assignee: Altera Corporation
    Inventors: Michael Phipps, Timothy J. Southgate
  • Patent number: RE42444
    Abstract: A reconfigurable computer system based on programmable logic is provided. A system design language may be used to write applications. The applications may be automatically partitioned into software components and programmable logic resource components. A virtual computer operating system may be provided to schedule and allocate system resources. The virtual computer operating system may include a virtual logic manager that may increase the capabilities of programmable logic resources in the system.
    Type: Grant
    Filed: January 30, 2009
    Date of Patent: June 7, 2011
    Assignee: Altera Corporation
    Inventors: Stephen J. Smith, Timothy J. Southgate