Patents by Inventor Ting Huang

Ting Huang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210286234
    Abstract: Examples of shutter assembly are described herein. In an example, the shutter assembly includes an opening having a magnetic rubber-based shutter disposed in the opening. The magnetic rubber-based shutter is slidable along a length of the opening to selectively cover and expose the camera.
    Type: Application
    Filed: December 15, 2017
    Publication date: September 16, 2021
    Inventors: Ya-Ting Yeh, Kuan-Ting Wu, Shih-Hsun Huang
  • Publication number: 20210283432
    Abstract: A helmet includes a helmet body and a gas detection and purification device. The gas detection and purification device in includes a body, a purification module, a gas-guiding unit, a gas detection module, and a power module. The gas detection module calculates the gas detection data obtained by the gas detection module so as to control the gas-guiding unit to start or stop operation based on the gas detection data. When the gas-guiding unit is in operation, the gas-guiding unit guides the gas into the body and to pass through the purification module for being filtered and purified to become a purified gas, and the gas-guiding unit discharges the purified gas out of the body to the nose portion, or the mouth portion, or both the nose portion and the mouth portion of the wearer for providing the wearer with the purified gas to breath.
    Type: Application
    Filed: March 12, 2021
    Publication date: September 16, 2021
    Inventors: Hao-Jan Mou, Yung-Lung Han, Chi-Feng Huang, Chin-Wen Hsieh, Tsung-I Lin, Yang Ku, Yi-Ting Lu
  • Patent number: 11121254
    Abstract: A transistor with strained superlattices as source/drain regions includes a substrate. A gate structure is disposed on the substrate. Two superlattices are respectively disposed at two sides of the gate structure and embedded in the substrate. The superlattices are strained. Each of the superlattices is formed by a repeated alternating stacked structure including a first epitaxial silicon germanium and a second epitaxial silicon germanium. The superlattices serve as source/drain regions of the transistor.
    Type: Grant
    Filed: September 16, 2019
    Date of Patent: September 14, 2021
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Bo-Shiun Chen, Chun-Jen Chen, Chung-Ting Huang, Chi-Hsuan Tang, Jhong-Yi Huang, Guan-Ying Wu
  • Patent number: 11120886
    Abstract: A gate driving circuit comprises a plurality of shift registers coupled in serial. An nth shift register includes a driving circuit, a pull-up circuit and a first auxiliary voltage regulator circuit. The driving circuit is electrically coupled to an output node and a first node. The driving circuit is configured to receive a clock signal and output a gate signal according to the clock signal. The pull-up circuit is electrically coupled to the driving circuit. The first auxiliary voltage regulator circuit is electrically coupled to the pull-up circuit and a second node. The first auxiliary voltage regulator circuit is configured to receive a control signal and the second node corresponding to a second voltage.
    Type: Grant
    Filed: November 11, 2019
    Date of Patent: September 14, 2021
    Assignee: AU OPTRONICS CORPORATION
    Inventors: Er-Lang Deng, Yuan-Nan Chiu, Chih-Yuan Wu, Yu-Lin Huang, I-Sheng Lin, Kuo-Ting Yang
  • Publication number: 20210280204
    Abstract: A method of determining noise reduction in a signal includes transforming the signal to generate a spectrogram; determining sharp change in a frequency spectrum for each frame in the spectrogram; and comparing a counted number of frames having sharp change with a predetermined value. The signal is determined to be subject to noise reduction if the counted number is greater than the predetermined value.
    Type: Application
    Filed: May 22, 2020
    Publication date: September 9, 2021
    Inventors: Ching-An Cho, Yu-Yen Chen, Kuo-Ting Huang
  • Publication number: 20210280565
    Abstract: A semiconductor device package includes a first conductive structure, a stress buffering layer and a second conductive structure. The first conductive structure includes a substrate, at least one first electronic component embedded in the substrate, and a first circuit layer disposed on the substrate and electrically connected to the first electronic component. The first circuit layer includes a conductive wiring pattern. The stress buffering layer is disposed on the substrate. The conductive wiring pattern of the first circuit layer extends through the stress buffering layer. The second conductive structure is disposed on the stress buffering layer and the first circuit layer.
    Type: Application
    Filed: May 25, 2021
    Publication date: September 9, 2021
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Chien-Mei HUANG, Shih-Yu WANG, I-Ting LIN, Wen Hung HUANG, Yuh-Shan SU, Chih-Cheng LEE, Hsing Kuo TIEN
  • Publication number: 20210281269
    Abstract: The present disclosure provides a buffer circuit and a buffer. The buffer circuit includes: an input follower circuit for following the voltage change of the first input signal; an input follower linearity boosting circuit for improving follower linearity of the input follower circuit; a first voltage bootstrap circuit for bootstrapping the voltage of the first input signal; a second voltage bootstrap circuit for bootstrapping the voltage of the second input signal; a third voltage bootstrap circuit for providing corresponding quiescent operation point voltage; a compensation follower circuit for following the compensation voltage; a compensation follower linearity boosting circuit for improving follower linearity of the compensation follower circuit; a first load for collecting the buffered voltage; a bias circuit for providing a bias current for the buffer; a bias linearity boosting circuit for improving linearity of the bias circuit; a second load for generating a nonlinear compensation current.
    Type: Application
    Filed: December 13, 2018
    Publication date: September 9, 2021
    Applicant: NO.24 RESEARCH INSTITUTE OF CHINA ELECTRONICS TECHNOLOGY GROUP CORPORATION
    Inventors: Ting LI, Gangyi HU, Ruzhang LI, Yong ZHANG, Zhengbo HUANG, Yabo NI, Xingfa HUANG, Jian'an WANG, Guangbing CHEN, Dongbing FU, Jun YUAN, Zicheng XU
  • Publication number: 20210281724
    Abstract: An anti-twist structure of voice coil motor includes a base, a lens housing, an elastic sheet, a magnet, and a yoke member. The lens housing has a margin wall, and the margin wall has a first protrusion and a contact portion. The elastic sheet has a hollowed slot, and the first protrusion pass through the hollowed slot, so that the elastic sheet is disposed on a portion of the margin wall and on the contact portion. The yoke member has an upper wall and a side wall. The side wall is disposed at one side of the upper wall and the side wall extends outward in a direction not parallel to the upper wall. The yoke member surrounds the lens housing, the elastic sheet, and the magnet. The lens housing has a deflectable angle relative to a horizontal reference line.
    Type: Application
    Filed: May 21, 2021
    Publication date: September 9, 2021
    Applicant: Lanto Electronic Limited
    Inventors: Wen-Yen Huang, Meng-Ting Lin, Fu-Yuan Wu, Shang-Yu Hsu, Bing-Bing Ma, Jie Du
  • Publication number: 20210281158
    Abstract: A voice coil motor includes a base, a lens housing, a voice coil, a magnet, a first elastic sheet, and a yoke member. The lens housing has a first margin wall, and a first protrusion and a second protrusion extend from the first margin wall. The height of the second protrusion is lower than the height of the first protrusion. The yoke member has a first wall, a connection wall, a second wall, and a side wall. The first wall, the connection wall, and the second wall together form a stepped structure. The first wall is disposed on the first protrusion, and the second wall is disposed on the second protrusion. The lens housing has a deflectable angle relative to a horizontal reference line. When the lens housing deflects to a maximum value of the deflectable angle, the second protrusion abuts against the second wall.
    Type: Application
    Filed: May 21, 2021
    Publication date: September 9, 2021
    Applicant: Lanto Electronic Limited
    Inventors: Wen-Yen Huang, Meng-Ting Lin, Fu-Yuan Wu, Shang-Yu Hsu, Bing-Bing Ma, Jie Du
  • Patent number: 11110201
    Abstract: Tissue compositions and methods of preparation thereof are provided. The tissue compositions can be used to treat or regenerate muscle tissue. The compositions can be configured to provide increased strength compared to other muscle matrices.
    Type: Grant
    Filed: January 29, 2018
    Date of Patent: September 7, 2021
    Assignee: LifeCell Corporation
    Inventors: Li Ting Huang, Eric Stec, Nathaniel Bachrach, Hui Xu
  • Patent number: 11112538
    Abstract: A first coating is provided on a first side of a glass substrate, and a second coating is provided on a second side of the glass substrate, directly or indirectly. The coatings are designed to reduce color change of the overall coated article, from the perspective of a viewer, upon heat treatment (e.g., thermal tempering and/or heat strengthening) and/or to have respective reflective coloration that substantially compensates for each other. For instance, from the perspective of a viewer of the coated article, the first coating may experience a positive a* color value shift due to heat treatment (HT), while the second coating experiences a negative a* color shift due to the HT. Thus, from the perspective of the viewer, color change due to HT (e.g., thermal tempering) can be reduced or minimized, so that non-heat-treated versions and heat treated versions of the coated article appear similar to the viewer.
    Type: Grant
    Filed: February 2, 2017
    Date of Patent: September 7, 2021
    Assignees: GUARDIAN GLASS, LLC, GUARDIAN EUROPE S.A.R.L.
    Inventors: Jian-gang Weng, Adam Burghardt, Ting Huang, Xuequn Hu, Cyrus Baker, Suresh Devisetti, Gyorgy Vikor
  • Patent number: 11113391
    Abstract: A method for preventing malicious software from attacking files of a computer system includes the following steps. Whether a file type of a specific file corresponding to an input/output (I/O) request is a to-be-backed-up file type is checked, wherein the to-be-backed-up file type belongs to one of multiple predetermined file types susceptible to malicious software attack. When the file type of the specific file is the to-be-backed-up file type, a backup already tag in a file context tag structure of the specific file is checked. When the backup already tag shows that the specific file has not been backed up, a backup process is performed for the specific file.
    Type: Grant
    Filed: March 18, 2019
    Date of Patent: September 7, 2021
    Assignee: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Lap Chung Lam, Pan-Jo Chuang, Li-Ting Huang, Tzy-Shiah Wang, Chuan-Yu Cho, Tzi-Cker Chiueh
  • Patent number: 11115039
    Abstract: The present disclosure provides a voltage-to-time converter and method for reducing parasitic capacitance and power supply influences. The voltage-to-time converter includes: a main sampling network, a compensation sampling network, a discharge network and an over-threshold detection unit. The influence of a traditional VTC parasitic capacitance on a VTC output swing amplitude is reduced by using the compensation sampling network. A sampling common-mode level of the compensation sampling network is compensated, such that the influence of the low-frequency disturbance of a power supply voltage on a threshold of a traditional VTC threshold detection circuit is reduced. The output swing amplitude of the voltage-to-time converter of the present disclosure can reduce the influence of a parasitic capacitance. A voltage common-mode level of a VTC input end is related to a power supply voltage, which reduces a conversion error caused by the influence of the power supply voltage on a threshold.
    Type: Grant
    Filed: May 13, 2019
    Date of Patent: September 7, 2021
    Assignee: No. 24 RESEARCH INSTITUTE OF CHINA ELECTRONICS TECHNOLOGY GROUP CORPORATION
    Inventors: Ting Li, Zhengbo Huang, Yong Zhang, Yabo Ni, Jian'an Wang, Dongbing Fu
  • Publication number: 20210272798
    Abstract: A cleaning system includes at least one cleaning module configured to receive a substrate after a chemical mechanical polishing (CMP) process and to remove contaminants on the substrate using a cleaning solution. The cleaning system further includes a cleaning solution supply system configured to supply the cleaning solution to the at least one cleaning module. The cleaning solution supply system includes at least one temperature control system. The at least one temperature control system includes a heating device configured to heat the cleaning solution, a cooling device configured to cool the cleaning solution, a temperature sensor configured to monitor a temperature of the cleaning solution, and a temperature controller configured to control the heating device and the cooling device.
    Type: Application
    Filed: March 2, 2020
    Publication date: September 2, 2021
    Inventors: Ssutzu Chen, Gin-Chen Huang, Ya-Ting Tsai, Ying-Tsung Chen, Kei-Wei Chen
  • Publication number: 20210272941
    Abstract: A package structure including a first redistribution layer, a semiconductor die, through insulator vias, an insulating encapsulant and a second redistribution layer. The first redistribution layer includes a dielectric layer, a conductive layer, and connecting portions electrically connected to the conductive layer. The dielectric layer has first and second surfaces, the connecting portions has a first side, a second side, and sidewalls joining the first side to the second side. The first side of the connecting portions is exposed from and coplanar with the first surface of the dielectric layer. The semiconductor die is disposed on the second surface of the dielectric layer. The through insulator vias are connected to the conductive layer. The insulating encapsulant is disposed on the dielectric layer and encapsulating the semiconductor die and the through insulator vias. The second redistribution layer is disposed on the semiconductor die and over the insulating encapsulant.
    Type: Application
    Filed: May 17, 2021
    Publication date: September 2, 2021
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chih-Hsuan Tai, Hao-Yi Tsai, Yu-Chih Huang, Chia-Hung Liu, Ting-Ting Kuo, Ban-Li Wu, Ying-Cheng Tseng, Chi-Hui Lai
  • Publication number: 20210274074
    Abstract: An anti-twist structure of a voice coil motor includes a base, a lens housing, a first elastic sheet, a second elastic sheet, a magnet, and a yoke member. The lens housing has first margin wall and a second margin wall, and a first protrusion extends from the first margin wall. The height of the second protrusion is lower than the height of the first protrusion. The yoke member has a first wall, a connection wall, a second wall, and a side wall. The first wall is disposed above the first protrusion, and the second wall is disposed above the second protrusion. The lens housing has a deflectable angle relative to a horizontal reference line. When the lens housing deflects to a maximum value of the deflectable angle, the first margin wall abuts against the second wall and/or the first protrusion abuts against the first wall.
    Type: Application
    Filed: May 21, 2021
    Publication date: September 2, 2021
    Applicant: Lanto Electronic Limited
    Inventors: Wen-Yen Huang, Meng-Ting Lin, Fu-Yuan Wu, Shang-Yu Hsu, Bing-Bing Ma, Jie Du
  • Patent number: 11106530
    Abstract: A variety of applications can include apparatus and/or methods that provide parity data protection to data in a memory system for a limited period of time and not stored as permanent parity data in a non-volatile memory. Parity data can be accumulated in a volatile memory for data programmed via a group of access lies having a specified number of access lines in the group. A read verify can be issued to selected pages after programming finishes at the end of programming via the access lines of the group. With the programming of the data determined to be acceptable at the end of programming via the last of the access lines of the group, the parity data in the volatile memory can be discarded and accumulation can begin for a next group having a specified number of access lines. Additional apparatus, systems, and methods are disclosed.
    Type: Grant
    Filed: December 20, 2019
    Date of Patent: August 31, 2021
    Assignee: Micron Technology, Inc.
    Inventors: Chun Sum Yeung, Falgun G. Trivedi, Harish Reddy Singidi, Xiangang Luo, Preston Allen Thomson, Ting Luo, Jianmin Huang
  • Patent number: 11104864
    Abstract: A stable liquid detergent composition containing a self-structuring surfactant system. A liquid detergent composition that includes a linear alkyl benzene sulfonate, and a co-surfactant selected from a zwitterionic surfactant, an amphoteric surfactant, a branched non-ionic surfactant and mixture thereof, with a first viscosity of no less than 3000 mPa·s measured at a first shear rate of 0.5 s?1, and a second viscosity of no more than 2,500 mPa·s measured at a second shear rate of 20 s?1, and the ratio of the first viscosity to the second viscosity is no less than 3.
    Type: Grant
    Filed: August 24, 2018
    Date of Patent: August 31, 2021
    Assignee: The Procter & Gamble Company
    Inventors: Liangjing Fang, Ming Tang, Karl Shiqing Wei, Peng Qin, Xu Huang, Ting He
  • Patent number: 11104996
    Abstract: A heating stage includes a pedestal and a thermal-conductive plate. The thermal-conductive plate is located on the pedestal. The thermal-conductive plate has a central portion and an edge portion surrounding the central portion, and the edge portion comprises a first portion and a second portion connected to the first portion, where the first portion is sandwiched between the central portion and the second portion. A height of the second portion gradually decreases along a direction from the central portion toward the edge portion.
    Type: Grant
    Filed: November 27, 2018
    Date of Patent: August 31, 2021
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: P. Y. Chiou, Chih-Chun Huang, Ping-Ting Shen, L. S. Huang
  • Patent number: 11106000
    Abstract: A driving mechanism for supporting an optical member is provided, including a base, a frame, a movable portion, a driving module, and an adhesive member. The base includes a plurality of first sidewalls, and at least one recess is formed on the first sidewalls. The frame includes a plurality of second sidewalls, and at least one opening is formed on the second sidewalls. The base and the frame form a hollow box, and the opening corresponds to the recess. The movable portion and the driving module are disposed in the hollow box. The driving module can drive the movable portion to move relative to the base. The adhesive member is accommodated in the opening and the recess, and extended along the first sidewalls. The adhesive member is disposed between the first sidewalls and the second sidewalls.
    Type: Grant
    Filed: May 17, 2018
    Date of Patent: August 31, 2021
    Assignee: TDK TAIWAN CORP.
    Inventors: Chao-Chang Hu, Bing-Ru Song, Yi-Ho Chen, Chia-Pin Hsu, Chih-Wei Weng, Shin-Hua Chen, Chien-Lun Huang, Chao-Chun Chang, Shou-Jen Liu, Kun-Shih Lin, Nai-Wen Hsu, Yu-Cheng Lin, Shang-Yu Hsu, Yu-Huai Liao, Yi-Hsin Nieh, Shih-Ting Huang, Kuo-Chun Kao, Fu-Yuan Wu