Abstract: An anti-twist structure of a voice coil motor includes a base, a lens housing, a first elastic sheet, a second elastic sheet, a magnet, and a yoke member. The lens housing has first margin wall and a second margin wall, and a first protrusion extends from the first margin wall. The height of the second protrusion is lower than the height of the first protrusion. The yoke member has a first wall, a connection wall, a second wall, and a side wall. The first wall is disposed above the first protrusion, and the second wall is disposed above the second protrusion. The lens housing has a deflectable angle relative to a horizontal reference line. When the lens housing deflects to a maximum value of the deflectable angle, the first margin wall abuts against the second wall and/or the first protrusion abuts against the first wall.

Abstract: An anti-twist structure of a voice coil motor includes a base, a lens housing, a first elastic sheet, a second elastic sheet, a magnet, and a yoke member. The lens housing has first margin wall and a second margin wall, and a first protrusion extends from the first margin wall. The height of the second protrusion is lower than the height of the first protrusion. The yoke member has a first wall, a connection wall, and a second wall. The first wall is disposed above the first protrusion, and the second wall is disposed above the second protrusion. The lens housing has a deflectable angle relative to a horizontal reference line. When the lens housing deflects to a maximum value of the deflectable angle, the first margin wall abuts against the second wall and/or the first protrusion abuts against the first wall.

Abstract: The present application discloses a chip socket, a testing fixture and a chip testing method thereof. The chip socket includes a pedestal, a plurality of conductive traces, a plurality of clamp structures, and a plurality of electrical contacts. The plurality of conductive traces are formed in the pedestal. The plurality of clamp structures are conductive and disposed on the first surface of the pedestal, and at least one of the plurality of clamp structures is coupled to a corresponding conductive trace and configured to clamp a solder ball of a chip to be tested. The plurality of electrical contacts are disposed on the second surface of the pedestal, and at least one of the plurality of electrical contacts is coupled to a corresponding clamp structure through a corresponding conductive trace.

Abstract: A method of manufacturing a semiconductor device includes at least the following steps. A protrusion is formed in a substrate by an anisotropic etch process, wherein a sidewall of the protrusion is inclined. A recess is formed on the sidewall of the protrusion by an isotropic etch process, wherein during the isotropic etch process, a by-product covers a first portion of the sidewall of the protrusion while exposing a second portion of the sidewall of the protrusion, so that the recess is formed between the first portion and the second portion of the sidewall.

Abstract: A package structure is provided. The package structure includes a substrate, a cover element, a semiconductor device, a protruding element, an adhesive element, and an electrical connector. The cover element is disposed on the substrate and having a recess. The semiconductor device is disposed on the substrate and disposed in the space surrounded by the cover element. The protruding element extends from the substrate and disposed in the recess. The adhesive element is disposed in the recess. The electrical connector is in contact with the substrate and the semiconductor device.

Abstract: A thin film transistor includes a stack of an active layer, a gate dielectric, and a gate electrode in a forward order or in a reverse order. The active layer includes a compound semiconductor material containing oxygen, at least one acceptor-type element selected from Ga and W, and at least one heavy post-transition metal element selected from In and Sn. An atomic percentage of the at least one heavy post-transition metal element at a first surface portion of the active layer that contacts the gate dielectric is higher than an atomic percentage of the at least one heavy post-transition metal element at a second surface portion of the active layer located on an opposite side of the gate dielectric. The front channel current may be increased, and the back channel leakage current may be decreased.

Abstract: A adjustment sound-generating temple includes a hinge member, a connecting seat and a temple. The hinge member has a first set of saw teeth and a pivot pins on one surface, the first set of saw teeth on the hinge member has an arc-shaped recess on the backside; the connecting seat is provided with an insert slot on one end and an extension rod on the other, which has two second set of saw teeth on each of its inner side. The temple is assembled by combining the hinge member and the connecting seat. The completed temple is then connected to the frame, forming a spectacle that makes clicking sounds when adjusting the temple's angle. The clicking sounds help to enhance the quality of the spectacle as a whole.

Abstract: An optical element driving mechanism is provided. The optical element driving mechanism includes a fixed part, a movable part, a first driving assembly, and a strengthening member. The fixed part includes a first base. The movable part is connected to an optical element with an optical axis. The movable part is movable relative to the fixed part, and the movable part is accommodated in the fixed part. The first driving assembly drives the movable part to move relative to the fixed part. The first driving assembly is disposed in the first base. The strengthening member is embedded in the first base. When viewed along a direction that is perpendicular to the optical axis, the strengthening member at least partially overlaps the first driving assembly. When viewed along the optical axis, the strengthening member does not overlap the first driving assembly.

Abstract: A method includes forming Magnetic Tunnel Junction (MTJ) stack layers, which includes depositing a bottom electrode layer; depositing a bottom magnetic electrode layer over the bottom electrode layer; depositing a tunnel barrier layer over the bottom magnetic electrode layer; depositing a top magnetic electrode layer over the tunnel barrier layer; and depositing a top electrode layer over the top magnetic electrode layer. The method further includes patterning the MTJ stack layers to form a MTJ; and performing a passivation process on a sidewall of the MTJ to form a protection layer. The passivation process includes reacting sidewall surface portions of the MTJ with a process gas comprising elements selected from the group consisting of oxygen, nitrogen, carbon, and combinations thereof.

Abstract: A material band riveting device includes a feeding structure, a riveting structure and a material pulling structure. The riveting structure is disposed to one end of the feeding structure. The riveting structure has a riveting mold, a plurality of locating pins, two first riveting pins, two second riveting pins and two pressing blocks. The plurality of the locating pins are partially disposed in the riveting mold. The two first riveting pins are partially disposed in the riveting mold. Each first riveting pin has a first riveting portion. The two second riveting pins are partially disposed in the riveting mold. Each second riveting pin has a second riveting portion. The material pulling structure is disposed under the feeding structure.

Abstract: Embodiments of the present disclosure provide a bond stage for bonding a semiconductor integrated circuit (IC) die. The bond stage includes a bonding platform having a top surface and a bottom surface opposing the top surface, a first actuator operable to tilt the bonding platform about a first rotation axis, and a plurality of contact sensors disposed at the bonding platform.

Abstract: A semiconductor structure is provided. The semiconductor structure includes a landing pad layer, a middle patterned dielectric layer, a top patterned dielectric layer, and a plurality of trench conductive layers. The middle patterned dielectric layer is disposed over the landing pad layer, in which the middle patterned dielectric layer includes a plurality of first openings. The top patterned dielectric layer is disposed over the middle patterned dielectric layer, in which the top patterned dielectric layer includes a plurality of second openings substantially aligned with the first openings, respectively. Each of the trench conductive layers is disposed through a portion of one of the second openings and a portion of one of the first openings, and each of the trench conductive layers has two side layers opposite to each other.

Abstract: A gas curtain device for a load port includes a casing, a holding unit, a gas-permeable plate, and a fastener unit. The casing defines an inner space and including a flange that defines a gas outlet in spatial communication with the inner space. The holding unit is disposed in the casing, and defines a ventilation opening. The plate is positioned between the holding unit and the inner flange, and has holes. A curtain-forming gas is introduced into the inner space, and sequentially flows through the ventilation opening and the holes to be discharged from the gas outlet to form a gas curtain. The fastener unit connects removably the holding unit and the plate to the flange.

Abstract: A semiconductor structure includes a substrate, a first dielectric layer on the substrate, a plurality of memory stack structures on the first dielectric layer, an insulating layer conformally covering the memory stack structures and the first dielectric layer, a second dielectric layer on the insulating layer and filling the spaces between the memory stack structures, a first interconnecting structure through the second dielectric layer, wherein a top surface of the first interconnecting structure is flush with a top surface of the second dielectric layer and higher than top surfaces of the memory stack structures, a third dielectric layer on the second dielectric layer, and a plurality of second interconnecting structures through the third dielectric layer, the second dielectric layer and the insulating layer on the top surfaces of the memory stack structures to contact the top surfaces of the memory stack structures.

Abstract: An image compensation device and a prism carrying mechanism thereof. The prism carrying mechanism comprises a base and a pair of prism carrying members. The base comprises a base body, a light passing hole disposed at the base body, and a plurality of first sliding assembling parts integrally formed on the same side of the base body. Each of the prism carrying members comprises a carrying member body, a prism assembling part disposed at the carrying member body and corresponding to the light passing hole, and a plurality of second sliding assembling parts integrally formed on the same side of the carrying member body. The prism assembling parts of the pair of prism carrying members are oppositely and alternately disposed in an axial direction. The plurality of second sliding assembling parts are slidably assembled to the plurality of first sliding assembling parts respectively.

Abstract: The present disclosure provides a coupler device for use in a phased array system. The coupler device includes a tunable amplifier and a coupler. The tunable amplifier is configured to convert an input signal to a first intermediate signal and a second intermediate signal. The coupler is coupled to the tunable amplifier. The coupler includes a first input port receiving the first intermediate signal, a second input port receiving the second intermediate signal, a first output port outputting a first output signal, and a second output port outputting a second output signal. A phase difference between a first phase of the first intermediate signal and a second phase of the second intermediate signal is a fixed phase angle.

Abstract: A package comprises at least one first device die, and a redistribution line (RDL) structure having the at least one first device die bonded thereto. The RDL structure comprises a plurality of dielectric layers, and a plurality of RDLs formed through the plurality of dielectric layers. A trench is defined proximate to axial edges of the RDL structure through each of the plurality of dielectric layers. The trench prevents damage to portions of the RDL structure located axially inwards of the trench.

Abstract: An online system presents a sponsored content page to a user in conjunction with a model serving system. The online system accesses a content page for a food item and identifies one or more sponsorship opportunities at the content page. The online system identifies one or more candidate sponsors for each sponsorship opportunity. The online system selects a bidding sponsor for the sponsorship opportunity from the one or more candidate sponsors and a candidate item associated with the bidding sponsor as a sponsored item. The online system provides a content page, a description of the sponsored item, and a request to generate a sponsored content page for the sponsorship opportunity to a model serving system. The online system receives a sponsored content page generated by a machine-learning language model at the model serving system and presents the sponsored content page to a user.

Abstract: The present disclosure describes a semiconductor device having a source/drain structure with a dopant cluster. The semiconductor device includes a channel structure on a substrate and a source/drain structure on the substrate and adjacent to the channel structure. The source/drain structure includes a first epitaxial layer on the substrate, a second epitaxial layer on the first epitaxial layer and sidewalls of the channel structure, and a third epitaxial layer on the second epitaxial layer. The second epitaxial layer includes a cluster of a dopant extending along a direction of the channel structure.

Abstract: The present disclosure provides a coupler device for use in a phased array system. The coupler device includes a weighting network and a phase matrix network. The weighting network is configured to convert and amplify an input signal to obtain eight intermediate amplified signals. The phase matrix network is coupled to the weighting network, and is configured to generate eight output signals based on the eight intermediate amplified signals. An output array of the eight output signals are obtained by performing a matrix multiplication of an array of the eight intermediate amplified signals with a phase matrix of the phase matrix network.