Patents by Inventor Ting Liu

Ting Liu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250059061
    Abstract: An iron-carbon composite material, a preparation method therefor, and an application thereof related to microbial technology applications. The method includes the following steps: a cross-linking and curing step: carrying out cross-linking and curing to iron powder and biological activated carbon by using an alkaline earth metal salt and a cross-linking agent; and a mineralization treatment step: soaking the cross-linked and cured iron-carbon composite material in a mineralization bacteria solution for 5-15 min, and carrying out drying to obtain an iron-carbon composite material.
    Type: Application
    Filed: December 28, 2021
    Publication date: February 20, 2025
    Applicant: BCEG ENVIRONMENT REMEDIATION CO., LTD
    Inventors: Shupeng LI, Lili GUO, Ting QU, Yaru LIU, Jiachen LI, Yong WANG, Qi WANG, Jing XIONG, Jinmei XUE
  • Publication number: 20250062778
    Abstract: A processor decompresses a compressed data vector into an original data vector. The processor includes an execution circuit, which receives a decompress instruction that includes two input operands and an output operand. The input operands indicate an address of the compressed data vector in a memory, and the output operand indicates the vector register for storing the original data vector after decompression. The execution circuit executes the decompress instruction to decompress the compressed data vector. When executing the decompress instruction, the execution circuit performs the following operations: read a mask value from the mask register, the mask value being a binary sequence indicating zero positions in the original data vector; generate a selection signal based on the mask value; and generate the original data vector by applying the selection signal to a selection switch that receives the compressed data vector as input.
    Type: Application
    Filed: August 18, 2023
    Publication date: February 20, 2025
    Inventors: Chih-Chun Liu, Liang-Yu Chen, Yao Ting Wang
  • Publication number: 20250062878
    Abstract: Embodiments of this application provide a communication method and a communication apparatus. The method includes: A first communication apparatus receives a first indication parameter. There is a correspondence between the first indication parameter and first codeword-to-layer mapping. The first communication apparatus determines the first codeword-to-layer mapping based on the first indication parameter. Based on the method, in embodiments of this application, codeword-to-layer mapping can be dynamically adjusted and/or indicated. For example, a terminal device may use different codeword-to-layer mapping at different moments. For another example, different terminal devices may use different codeword-to-layer mapping at a same moment.
    Type: Application
    Filed: October 22, 2024
    Publication date: February 20, 2025
    Inventors: Lei LIU, Xiaoyan BI, Yong LIU, Ting WANG, Chenglong JIANG
  • Patent number: 12228809
    Abstract: A display module includes a back plate, a light guide plate, a rubber frame and a display panel, the light guide plate is fixed on a bearing surface, a connecting line between two end portions of the bearing surface forms a first curve. The first curve includes a circular arc segment and a transition curve segment, and bends in a direction away from the display panel; the circular arc segment is located at the middle, at least one end of the circular arc segment is provided with the transition curve segment; the transition curve segment is located at a first position, the first position being a position of the bearing surface opposite to a second position, the second position being a position where light leaks from the display panel, the radius of curvature of the transition curve increases along a direction close to an end portion of the first curve.
    Type: Grant
    Filed: April 29, 2022
    Date of Patent: February 18, 2025
    Assignees: FUZHOU BOE OPTOELECTRONICS TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Han Zhang, Shuwen Lai, Kai Diao, Long Hu, Liangliang Ren, Yuhang Lin, Lian Fang, Chengkun Liu, Dingjie Zheng, Zhijie Guo, Zhiying Chen, Ting Cui
  • Patent number: 12228765
    Abstract: A curved optical plate includes a curved light exit surface including at least one curved edge and at least one uncurved edge, and at least one first side surface connected to the at least one uncurved edge of the light exit surface; a first side surface includes a first surface, and the first surface extends toward an interior of the curved optical plate.
    Type: Grant
    Filed: June 29, 2022
    Date of Patent: February 18, 2025
    Assignees: FUZHOU BOE OPTOELECTRONICS TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Yuhang Lin, Zhiying Chen, Chengkun Liu, Han Zhang, Hongyu Zhao, Ming Chen, Zhijie Guo, Lian Fang, Long Hu, Ting Cui, Liangliang Ren, Kai Diao
  • Patent number: 12229487
    Abstract: A method includes cropping a plurality of images from a layout of an integrated circuit, generating a first plurality of hash values, each from one of the plurality of images, loading a second plurality of hash values stored in a hotspot library, and comparing each of the first plurality of hash values with each of the second plurality of hash values. The step of comparing includes calculating a similarity value between the each of the first plurality of hash values and the each of the second plurality of hash values. The method further includes comparing the similarity value with a pre-determined threshold similarity value, and in response to a result that the similarity value is greater than the pre-determined threshold similarity value, recording a position of a corresponding image that has the result. The position is the position of the corresponding image in the layout.
    Type: Grant
    Filed: April 28, 2023
    Date of Patent: February 18, 2025
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: I-Shuo Liu, Chih-Chun Hsia, Hsin-Ting Chou, Kuanhua Su, William Weilun Hong, Chih Hung Chen, Kei-Wei Chen
  • Publication number: 20250052670
    Abstract: Disclosed is a portable instrument for measuring gas concentration. A laser unit provides a laser beam required for laser spectral absorption. An optical unit includes a gas absorption cell (100). The gas absorption cell (100) includes a first reflective mirror (110), a second reflective mirror (120) and a cell tube (130), the first reflective mirror (110) and the second reflective mirror (120) are respectively connected to opposite ends of the cell tube (130). When the laser unit emits a laser beam, an optical path is formed between the first reflective mirror (110) and the second reflective mirror (120) within the cell tube (130). A heat recovery unit recycles heat generated by an electronic system unit (200) to the optical unit.
    Type: Application
    Filed: July 23, 2024
    Publication date: February 13, 2025
    Inventors: Yin WANG, Ting-jung LIN, Junhui ZENG, Jianwu ZHENG, Zhimei LIU
  • Publication number: 20250052511
    Abstract: A vapor chamber heatsink assembly, under vacuum, having a working fluid therein, comprising a plurality of heatsink fins and a vapor chamber is provided. The vapor chamber comprises an upper and lower casing having an upper and lower chamber surface, respectively. The upper and lower chamber surfaces define a plurality of obstructers forming a plurality of braided channels therearound. When heat from a greater temperature heat source and a lower temperature heat source is applied to respective contact surfaces of the lower casing, via the plurality of obstructers and braided channels, respectively, the working fluid and liquid vapor slugs/bubbles travel therethrough, providing an effective phase change mechanism to the greater temperature heat source, while concurrently, hindering agglomeration of working fluid thereto. An effective phase change mechanism is also concurrently provided to the lower temperature heat source due to the non-agglomeration of working fluid to the greater temperature heat source.
    Type: Application
    Filed: October 24, 2024
    Publication date: February 13, 2025
    Inventors: Chia yu Lin, Shan yin Cheng, Chien ting Liu
  • Publication number: 20250056851
    Abstract: A semiconductor device includes a first channel region, a second channel region, and a first insulating fin, the first insulating fin being interposed between the first channel region and the second channel region. The first insulating fin includes a lower portion and an upper portion. The lower portion includes a fill material. The upper portion includes a first dielectric layer on the lower portion, the first dielectric layer being a first dielectric material, a first capping layer on the first dielectric layer, the first capping layer being a second dielectric material, the second dielectric material being different than the first dielectric material, and a second dielectric layer on the first capping layer, the second dielectric layer being the first dielectric material.
    Type: Application
    Filed: October 28, 2024
    Publication date: February 13, 2025
    Inventors: Jen-Hong Chang, Yi-Hsiu Liu, You-Ting Lin, Chih-Chung Chang, Kuo-Yi Chao, Jiun-Ming Kuo, Yuan-Ching Peng, Sung-En Lin, Chia-Cheng Chao, Chung-Ting Ko
  • Publication number: 20250054786
    Abstract: A die bonding tool includes a bond head having a moveable component. The moveable component may be moveable between an extended position in which a lower surface of the moveable component protrudes below a lower surface of the bond head and a retracted position in which the lower surface of the moveable component does not protrude below the lower surface of the bond head. The moveable component may be used to control a shape of a semiconductor die secured to the lower surface of the bond head during a process of bonding the semiconductor die to a substrate. Accordingly, void areas and other bonding defects may be avoided and the bond formed between the semiconductor die and the target substrate may be improved.
    Type: Application
    Filed: August 7, 2023
    Publication date: February 13, 2025
    Inventors: Chih-Yuan Chiu, Chi-Chun Peng, Yu-Hong Du, Hui-Ting Lin, Jen-Hao Liu, Amram Eitan
  • Patent number: 12225829
    Abstract: A semiconductor structure includes an Nth metal layer, a diffusion barrier layer over the Nth metal layer, a first deposition of bottom electrode material over the diffusion barrier layer, a second deposition of bottom electrode material over the first deposition of bottom electrode material, a magnetic tunneling junction (MTJ) layer over the second deposition of bottom electrode material, a top electrode over the MTJ layer; and an (N+1)th metal layer over the top electrode; wherein the diffusion barrier layer and the first deposition of bottom electrode material are laterally in contact with a dielectric layer, the first deposition of bottom electrode material spacing the diffusion barrier layer and the second deposition of bottom electrode material apart, and N is an integer greater than or equal to 1. An associated electrode structure and method are also disclosed.
    Type: Grant
    Filed: February 13, 2023
    Date of Patent: February 11, 2025
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Chung-Yen Chou, Fu-Ting Sung, Yao-Wen Chang, Shih-Chang Liu
  • Patent number: 12224298
    Abstract: Various embodiments of the present disclosure are directed towards an integrated circuit (IC) chip in which a bond pad structure extends to a columnar structure with a high via density. For example, an interconnect structure is on a frontside of a substrate and comprises a first bond wire, a second bond wire, and bond vias forming the columnar structure. The bond vias extend from the first bond wire to the second bond wire. The bond pad structure is inset into a backside of the substrate, opposite the frontside, and extends to the first bond wire. A projection of the first or second bond wire onto a plane parallel to a top surface of the substrate has a first area, and a projection of the bond vias onto the plane has a second area that is 10% or more of the first area, such that via density is high.
    Type: Grant
    Filed: August 2, 2021
    Date of Patent: February 11, 2025
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Yu-Hsien Li, Yen-Ting Chiang, Shyh-Fann Ting, Jen-Cheng Liu, Dun-Nian Yaung
  • Publication number: 20250041373
    Abstract: An extraction method of Hibiscus sabdariffa L. ‘TAITUNG NO. 6’, a Hibiscus sabdariffa L. ‘TAITUNG NO. 6’ extract using the same, and uses thereof are provided. The extraction method includes: providing the Hibiscus sabdariffa L. ‘TAITUNG NO. 6’ that is dried as a raw material for extraction; pulverizing the raw material; mixing the raw material that is pulverized with an extraction solvent for primary extraction, so as to obtain a Hibiscus sabdariffa L. ‘TAITUNG NO. 6’ primary extract; performing ultrasonic extraction on the Hibiscus sabdariffa L. ‘TAITUNG NO. 6’ primary extract, so as to obtain a Hibiscus sabdariffa L. ‘TAITUNG NO. 6’ extract; and filtering the Hibiscus sabdariffa L. ‘TAITUNG NO. 6’ extract.
    Type: Application
    Filed: July 29, 2024
    Publication date: February 6, 2025
    Inventors: CHIU-YUEH WANG, TING-TING LIU, YUN-HSIEN HSIEH, YUAN WEN
  • Publication number: 20250046623
    Abstract: The application relates to a method for manufacturing an electronic device, and in particular, to a method for manufacturing an electronic device with a carrier substrate. The method includes: providing a carrier substrate; forming a first base layer on the carrier substrate; forming a working unit on the first base layer, performing a detection step on the working unit to identify whether a defect is present, wherein the detection step includes automated optical inspection (AOI), electrical detection, or a combination thereof; and repairing the electronic device.
    Type: Application
    Filed: October 18, 2024
    Publication date: February 6, 2025
    Inventors: Yeong-E CHEN, Cheng-En CHENG, Yu-Ting LIU, Cheng-Chi WANG
  • Publication number: 20250045190
    Abstract: A computer-implemented method, a computer system, and a computer program product for generating an automation test script. Existing testing documents of a product under test can be acquired. A testing topology describing steps, containers, elements and actions of the test can be generated by extracting keywords in the existing test documents, wherein each element defines a user interface (UI) element of the product, each action defines an action attribute for an associated UI element, each container defines an operation area containing one or more UI elements, and each step defines one or more operations for one or more actions associated with one or more UI elements. An automation test script for the product can be generated based on the testing topology.
    Type: Application
    Filed: August 2, 2023
    Publication date: February 6, 2025
    Inventors: Dong Chen, Jia Chan Shen, Ju Ling Liu, Ting Ting Zhan
  • Patent number: 12218850
    Abstract: A transmission rate management method is provided. The transmission rate management method is applied to a transmission rate management device. The transmission rate management method includes the steps of calculating a total available data traffic of the transmission rate management device based on a data plan for the transmission rate management device, wherein the total available data traffic corresponds to a period of time; allocating to each of one or more client devices currently connected to the transmission rate management device one available data traffic corresponding to the period of time according to the total available data traffic; and adjusting a transmission rate of a client device of the one or more client devices based on a remaining data traffic of the available data traffic of the client device.
    Type: Grant
    Filed: January 28, 2022
    Date of Patent: February 4, 2025
    Assignee: MEDIATEK INC.
    Inventors: Yuan-Ting Huang, Kai-Wen Liu, Yu-Hua Huang
  • Patent number: 12219709
    Abstract: An integrated circuit (IC) chip assembly includes an integrated circuit (IC) die that includes a first substrate in which plurality of transistors is formed, a first structure that contains a plurality of first metallization components, and a second structure that contains a plurality of second metallization components. The first structure is disposed over a first side of the first substrate. The second structure is disposed over a second side of the first substrate opposite the first side. The chip assembly includes a second substrate bonded to the IC die through the second side. The chip assembly includes a trench that extends through the second substrate and through the second structure of the IC die. Sidewalls of the trench are defined at least in part by one or more protective layers.
    Type: Grant
    Filed: March 28, 2023
    Date of Patent: February 4, 2025
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Kao-Chih Liu, Wenmin Hsu, Yu-Ting Lin, Chia Hong Lin, ChienYi Chen
  • Patent number: 12218684
    Abstract: The present invention relates to a layered semi-parallel LDPC decoder system having a single permutation network, and belongs to the field of decoder hardware design. The system comprises a layered decoding architecture of the single permutation network, a layered semi-parallel decoding architecture of the single permutation network, a pipeline design for layered semi-parallel decoding and a hardware framework of a layered semi-parallel LDPC decoder. The present invention removes a permutation network module between a check node and a variable node by modifying the cyclic shift value of each information block transferred from the variable node to the check node, i.e., the cyclic shift operation of the decoder can be completed through the single permutation network so as to reduce hardware resources of the decoder. A semi-parallel decoding structure is adopted, and meanwhile, a pipeline is added between half layers.
    Type: Grant
    Filed: November 15, 2021
    Date of Patent: February 4, 2025
    Assignee: Chongqing University Of Posts And Telecommunications
    Inventors: Hongsheng Zhang, Taiyun Ding, Ting Liu, Hong Yang, Yi Huang, Weizhong Chen, Qi Wang, Xi Wang
  • Patent number: 12216901
    Abstract: A method for selecting an application and associated operational guidance to utilize on a mobile device is disclosed. In one embodiment, such a method identifies a selected environment of interest. Within the selected environment, the method identifies one or more applications that are commonly utilized by users within the selected environment and documents the one or more applications. The method detects physical entry of a particular user into the selected environment and, in response to detecting the entry, automatically notifies the particular user of the one or more applications that are commonly utilized within the selected environment. In certain embodiments, the method enables the user to quickly launch the one or more applications and/or provides operational guidance to the user with regard to using the one or more applications. A corresponding system and computer program product are also disclosed.
    Type: Grant
    Filed: September 20, 2022
    Date of Patent: February 4, 2025
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Xiang Wei Li, Dong Chen, Ye Chuan Wang, Ting Ting Zhan, Ju Ling Liu, Yu An, Wei Yan
  • Publication number: 20250040049
    Abstract: A wiring board includes a mother board and a daughter board that are stacked, a bonding layer disposed between the mother board and the daughter board, and at least one side wiring. The mother board includes a first substrate, and a first wiring layer disposed on the first substrate and including at least one first connection pad. The daughter board is disposed on a side of the first substrate away from the first wiring layer. The daughter board includes a second substrate, and a second wiring layer disposed on the second substrate and including at least one second connection pad. The at least one side wiring is connected, via a respective end thereof, to the at least one first connection pad in one-to-one correspondence, and the at least one side wiring is connected, via respective another end thereof, to the at least one second connection pad in one-to-one correspondence.
    Type: Application
    Filed: February 21, 2022
    Publication date: January 30, 2025
    Applicants: BOE MLED Technology Co., Ltd., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Chao LIU, Ting CAI, Ming ZHAI, Lili WANG, Jing WANG, Mingming JIA, Sha FENG, Enkai DONG, Haiwei SUN, Ke WANG