Patents by Inventor Ting Liu

Ting Liu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10478898
    Abstract: A silver particles manufacturing method comprises following steps: providing a silver containing compound; providing an organic solution; adding the silver containing compound into the organic solution, to perform ultrasonic vibrations or a heating process until the silver containing compound is dissolved completely into the organic solution, to form a silver ion solution; performing the ultrasonic vibrations or the heating process, and then let the solution settle down for a period, to form a silver particles synthesized solution; and placing the silver particles synthesized solution into a centrifuge to perform centrifugation and separation, to obtain ?m-scale silver particles and nm-scale silver particles. The silver particles manufacturing method has the advantages of low pollution, low cost, high yield, and mass production.
    Type: Grant
    Filed: December 8, 2015
    Date of Patent: November 19, 2019
    Assignee: NATIONAL CHUNG-SHAN INSTITUTE OF SCIENCE AND TECHNOLOGY
    Inventors: Chien-Liang Chang, Wu-Ching Hung, Wei-Jen Liu, Kuei-Ting Hsu, Jhao-Yi Wu, Pin-Chun Lin
  • Patent number: 10481448
    Abstract: A liquid crystal display device includes a plurality of pixel units, an electrode line surrounding the pixel units, at least one gate driver coupled with the pixel units via a plurality of gate lines, and at least one electrostatic discharge protection circuit coupled with the at least one gate driver and the electrode line.
    Type: Grant
    Filed: November 14, 2016
    Date of Patent: November 19, 2019
    Assignees: HANNSTAR DISPLAY (NANJING) CORPORATION, HANNSTAR DISPLAY CORPORATION
    Inventors: Chia-Hua Yu, Sung-Chun Lin, Hsuan-Chen Liu, Chien-Ting Chan
  • Patent number: 10483580
    Abstract: A solid state fuel cell includes an anode, a cathode, and a ceramic electrolyte. The ceramic electrolyte includes a silicate oxyapatite represented by REy?xMxSiO6O27±?, where RE is a rare earth metal, M is an alkali metal, x is greater than 0 and less than 2, y ranges from 9.3 to 10, and ? ranges from 0 to 2. A method for making the solid state fuel cell is also disclosed.
    Type: Grant
    Filed: December 1, 2016
    Date of Patent: November 19, 2019
    Assignee: National Taipei University of Technology
    Inventors: Sea-Fue Wang, Yi-Xin Liu, Ting-Ting Yang
  • Publication number: 20190347819
    Abstract: A method and an apparatus for vehicle position detection are provided. An image collecting device installed on a target vehicle is used to capture a region in front of the target vehicle at a current moment under a fixed viewing angle, to acquire a real image. Then, a virtual image under a preset viewing angle is generated based on the real image. The virtual image includes effective features of a side vehicle, and the side vehicle is accurately recognized based on the effective features, thereby determining position information of the side vehicle, so as to prevent accidents such as a collision between the target vehicle and the side vehicle.
    Type: Application
    Filed: August 25, 2018
    Publication date: November 14, 2019
    Inventors: Wei Liu, Ting Zhou, Huai Yuan, Jin LV, Hao Chen, Yizhong Fan
  • Publication number: 20190343159
    Abstract: The present disclosure relates to compositions including steviol glycosides. The present disclosure also relates to sweetener compositions and sweetened compositions including steviol glycosides, and uses of such sweetener compositions to prepare sweetened compositions including food, beverages, dental products, pharmaceuticals, nutraceuticals, and the like.
    Type: Application
    Filed: November 30, 2016
    Publication date: November 14, 2019
    Applicant: CARGILL, INCORPORATED
    Inventors: Ting Liu CARLSON, Nicole Lynn FALK, Dan S. GASPARD, Brian D. GUTHRIE, Kristopher T. MORTENSON, Michael Alan MORTENSON, Wade Nolan SCHMELZER, Nese YURTTAS
  • Publication number: 20190349889
    Abstract: Provided is a method for obtaining a network system resource configuration. The method includes that: a terminal receives a non-anchor carrier configuration broadcast by a network device, and the terminal determines, according to the non-anchor carrier configuration, resource information for performing random access or monitoring pages with the network device. The non-anchor carrier configuration includes any one of or any combination of: a non-anchor carrier frequency point list, a non-anchor carrier configuration parameter list, an uplink non-anchor carrier frequency point list, an uplink non-anchor carrier configuration parameter list, a downlink non-anchor carrier frequency point list and a downlink non-anchor carrier configuration parameter list.
    Type: Application
    Filed: February 12, 2019
    Publication date: November 14, 2019
    Inventors: Ting Lu, Bo Dai, Yuanfang Yu, Xu Liu, Xiubin Sha
  • Publication number: 20190348463
    Abstract: A circuit, including: a photodetector including a first readout terminal and a second readout terminal different than the first readout terminal; a first readout circuit coupled with the first readout terminal and configured to output a first readout voltage; a second readout circuit coupled with the second readout terminal and configured to output a second readout voltage; and a common-mode analog-to-digital converter (ADC) including: a first input terminal coupled with a first voltage source; a second input terminal coupled with a common-mode generator, the common-mode generator configured to receive the first readout voltage and the second readout voltage, and to generate a common-mode voltage between the first and second readout voltages; and a first output terminal configured to output a first output signal corresponding to a magnitude of a current generated by the photodetector.
    Type: Application
    Filed: July 25, 2019
    Publication date: November 14, 2019
    Inventors: Yun-Chung Na, Che-Fu Liang, Shu-Lu Chen, Szu-Lin Cheng, Han-Din Liu, Chien-Lung Chen, Yuan-Fu Lyu, Chieh-Ting Lin, Bo-Jiun Chen, Hui-Wen Chen, Shu-Wei Chu, Chung-Chih Lin, Kuan-Chen Chu
  • Patent number: 10475199
    Abstract: An optical measurement device and an optical measurement method for measuring a gap on an electronic device are provided. The optical measurement device includes an image capture device and an image processing device. The image capture device is used to capture an image including a gap. The electronic device includes a body and a component assembled on the body. The gap of the electronic device is existed between the body and the component. The image processing device is coupled to the image capture device. The image processing device is used to receive the image, and the image scanning operation is executed to the image to measure the breadth of the gap. The precise measurement result is quickly obtained.
    Type: Grant
    Filed: August 22, 2016
    Date of Patent: November 12, 2019
    Assignee: ASUSTeK COMPUTER INC.
    Inventors: Kuan-Hsien Liu, Ding-Chia Kao, Hao-Ting Hung, Yi-Ou Wang, You-Hung Tsai, Po Hung Huang
  • Patent number: 10475828
    Abstract: An image sensor device structure is provided. The image sensor device structure includes a substrate, and the substrate is doped with a first conductivity type. The image sensor device structure includes a light-sensing region formed in the substrate, and the light-sensing region is doped with a second conductivity type that is different from the first conductivity type. The image sensor device structure further includes a doping region extended into the light-sensing region, and the doping region is doped with the first conductivity type. The image sensor device structure also includes a plurality of color filters formed on the doping region.
    Type: Grant
    Filed: January 11, 2018
    Date of Patent: November 12, 2019
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Yen-Ting Chiang, Chun-Yuan Chen, Hsiao-Hui Tseng, Yu-Jen Wang, Shyh-Fann Ting, Wei-Chuang Wu, Jen-Cheng Liu, Dun-Nian Yaung
  • Patent number: 10475998
    Abstract: A semiconductor structure and a method for forming the same are provided. The semiconductor structure includes a bottom electrode having a first width and a dielectric structure having a second width formed over the bottom electrode. The semiconductor structure further includes a top electrode having a third width formed over the dielectric structure. In addition, the second width of the dielectric structure is greater than the first width of the bottom electrode.
    Type: Grant
    Filed: January 30, 2015
    Date of Patent: November 12, 2019
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD
    Inventors: Chern-Yow Hsu, Fu-Ting Sung, Shih-Chang Liu
  • Patent number: 10472963
    Abstract: A method for stepwise construction of a preferential gas migration pathway at a stope in a coal seam. First, a gas migration pathway is preliminarily formed at a stope depending on a mining effect of mining in a first mined seam. construction and stabilization method of gob-side entry retaining in deep strata, and a method of manual-guided pre-fracturing boreholes are then used to perform active construction respectively in external space and the outside of coal-rock mass to form preferential gas migration pathways. Eventually, under the effect of mining-induced stress, a system of preferential gas migration pathways connected to each other at the stope is further formed.
    Type: Grant
    Filed: December 1, 2017
    Date of Patent: November 12, 2019
    Assignee: China University of Mining and Technology
    Inventors: Baiquan Lin, Tong Liu, Ting Liu, Wei Yang, He Li, Zhanbo Huang, Rui Wang, Yihan Wang
  • Publication number: 20190341399
    Abstract: Embodiments of interconnect structures of a three-dimensional (3D) memory device and method for forming the interconnect structures are disclosed. In an example, a 3D NAND memory device includes a semiconductor substrate, an alternating layer stack disposed on the semiconductor substrate, and a dielectric structure, which extends vertically through the alternating layer stack, on an isolation region of the substrate. Further, the alternating layer stack abuts a sidewall surface of the dielectric structure and the dielectric structure is formed of a dielectric material. The 3D memory device additionally includes one or more through array contacts that extend vertically through the dielectric structure and the isolation region, and one or more channel structures that extend vertically through the alternating layer stack.
    Type: Application
    Filed: July 27, 2018
    Publication date: November 7, 2019
    Applicant: Yangtze Memory Technologies Co., Ltd.
    Inventors: Qian TAO, Yushi HU, Zhenyu LU, Li Hong XIAO, Xiaowang DAI, Yu Ting ZHOU, Zhao Hui TANG, Mei Lan GUO, ZhiWu TANG, Qinxiang WEI, Qianbing XU, Sha Sha LIU, Jian Hua SUN, Enbo WANG
  • Publication number: 20190341385
    Abstract: A semiconductor device and a manufacturing method thereof are provided. The method includes providing a substrate, a plurality of word lines and a plurality of bit lines, and then forming a storage node contact on each source/drain region, so that a width of a top surface of each storage node contact in a direction is less than a width of a bottom surface of each storage node contact.
    Type: Application
    Filed: July 18, 2019
    Publication date: November 7, 2019
    Inventors: Tzu-Tsen Liu, Li-Wei Feng, Chien-Ting Ho
  • Publication number: 20190340969
    Abstract: A gate driving circuit and a display panel with the gate driving circuit are provided. The gate driving circuit includes shift registers for providing scan signals to gate lines of the display panel. Each shift register includes a main circuit and a discharge circuit. In the main circuit, a pre-charge unit is coupled to a first node and is configured to output a pre-charge signal to the first node, a pull-up unit is coupled to the first node and a second node and is configured to output an mth stage scan signal of the 1st to Nth stage scan signals to the second node; and a reset unit is coupled to the first node and is configured to receive a reset signal. In the discharge circuit, a pull-down unit is coupled to the first node and the second node and is configured to receive a pull-down control signal.
    Type: Application
    Filed: April 29, 2019
    Publication date: November 7, 2019
    Inventors: Hsien-Tang HU, Hsuan-Chen LIU, Chien-Ting CHAN
  • Patent number: 10469005
    Abstract: The present teaching relates to a magnetic sensor comprising an input port to be connected to an external power supply, a magnetic field detecting circuit configured to generate a magnet detection signal, an output control circuit configured to control operation of the magnetic sensor in response to the magnet detection signal, and an output port. The magnetic field detecting circuit includes a magnetic sensing element configured to detect an external magnetic field and output a detection signal, a signal processing element configured to amplify the detection signal and removing interference from the detection signal to generate processed detection signal, and an analog-digital conversion element configured to convert the processed detection signal into a magnet detection signal, and the output control circuit is configured to control the magnetic sensor to operate in at least one of a first state and a second state responsive to at least the magnet detection signal.
    Type: Grant
    Filed: June 16, 2017
    Date of Patent: November 5, 2019
    Assignee: JOHNSON ELECTRIC INTERNATIONAL AG
    Inventors: Hui Min Guo, Shu Zuo Lou, Xiao Ming Chen, Guang Jie Cai, Chun Fai Wong, Yue Li, Chi Ping Sun, Bao Ting Liu, En Hui Wang, Fei Xin, Shing Hin Yeung, Xiu Wen Yang, Li Sheng Liu, Yan Yun Cui, Shu Juan Huang
  • Patent number: 10468349
    Abstract: Examples of an integrated circuit a having an advanced two-dimensional (2D) metal connection with metal cut and methods of fabricating the same are provided. An example method for fabricating a conductive interconnection layer of an integrated circuit may include: patterning a conductive connector portion on the conductive interconnection layer of the integrated circuit using extreme ultraviolet (EUV) lithography, wherein the conductive connector portion is patterned to extend across multiple semiconductor structures in a different layer of the integrated circuit; and cutting the conductive connector portion into a plurality of conductive connector sections, wherein the conductive connector portion is cut by removing conductive material from the metal connector portion at one or more locations between the semiconductor structures.
    Type: Grant
    Filed: October 19, 2018
    Date of Patent: November 5, 2019
    Assignee: Taiwan Semiconductor Manufacturing Company Limited
    Inventors: Chih-Liang Chen, Cheng-Chi Chuang, Chih-Ming Lai, Chia-Tien Wu, Charles Chew-Yuen Young, Hui-Ting Yang, Jiann-Tyng Tzeng, Kam-Tou Sio, Ru-Gun Liu, Shun Li Chen, Shih-Wei Peng, Tien-Lu Lin
  • Patent number: 10468587
    Abstract: A semiconductor structure includes an Nth metal layer, a diffusion barrier layer over the Nth metal layer, a first deposition of bottom electrode material over the diffusion barrier layer, a second deposition of bottom electrode material over the first deposition of bottom electrode material, a magnetic tunneling junction (MTJ) layer over the second deposition of bottom electrode material, a top electrode over the MTJ layer; and an (N+1)th metal layer over the top electrode; wherein the diffusion barrier layer and the first deposition of bottom electrode material are laterally in contact with a dielectric layer, the first deposition of bottom electrode material spacing the diffusion barrier layer and the second deposition of bottom electrode material apart, and N is an integer greater than or equal to 1. An associated electrode structure and method are also disclosed.
    Type: Grant
    Filed: June 15, 2017
    Date of Patent: November 5, 2019
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Chung-Yen Chou, Fu-Ting Sung, Yao-Wen Chang, Shih-Chang Liu
  • Patent number: 10470323
    Abstract: A hinge structure includes a first base, a second base, a first linking rod, a second linking rod, and a torque assembly. The first linking rod has a first pivot part, a first sliding part, and a second pivot part. The first pivot part is pivoted to the first base, and the first sliding part is slidably connected to the second base. The second linking rod has a second sliding part, a shaft part, a third pivot part, and a fourth pivot part. The second sliding part is slidably connected to the first base. The third pivot part is pivoted to the second base. The second pivot part is pivoted to the fourth pivot part. The torque assembly has a sleeve part sleeved on the shaft part and a connection part connected to the second base. The sleeve part generates torque during rotation with respect to the shaft part.
    Type: Grant
    Filed: July 16, 2018
    Date of Patent: November 5, 2019
    Assignee: COMPAL ELECTRONICS, INC.
    Inventors: Hsien-Hung Cheng, You-Yu Chen, Chia-Wei Chou, Po-Yi Chang, Cheng-Yo Hsiao, Wei-Ting Liu
  • Publication number: 20190333926
    Abstract: Semiconductor structures are provided. The semiconductor structure includes a substrate and a first gate electrode formed over the substrate. The semiconductor structure further includes a dielectric layer formed on a sidewall of the first gate electrode and a second gate electrode formed over the substrate and separated from the first gate electrode by the dielectric layer. The semiconductor structure further includes a contact formed over the second gate electrode. In addition, the contact has a first extending portion and a second extending portion extending along opposite sidewalls of the second gate electrode.
    Type: Application
    Filed: July 12, 2019
    Publication date: October 31, 2019
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Fu-Ting SUNG, Chung-Chiang MIN, Wei-Hang HUANG, Shih-Chang LIU, Chia-Shiung TSAI
  • Patent number: 10459754
    Abstract: A method for discovering an application topology relationship provided by this application, in a packet transmission process, API calling information is recorded, and a topology discovery server determines, by analyzing collected API calling information, whether interaction exists between virtual machines in a virtual machine cluster. By using the foregoing analysis manner, the topology discovery server may further determine interaction frequency that is between virtual machines and to which the collected API calling information relates, and determine an application topology relationship between the virtual machines according to the interaction frequency of the virtual machines.
    Type: Grant
    Filed: October 17, 2017
    Date of Patent: October 29, 2019
    Assignee: HUAWEI TECHNOLOGIES CO., LTD.
    Inventor: Ting Liu