Patents by Inventor Ting Liu
Ting Liu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20250150992Abstract: Wireless communications systems and methods related to communicating control information are provided. A method of wireless communication performed by a first sidelink user equipment (UE) may include transmitting, to a second sidelink UE, a first sidelink synchronization block (S-SSB) in a scheduled S-SSB slot, performing a first listen-before-talk (LBT) procedure in an unlicensed frequency band, and transmitting, to the second sidelink UE, a second S-SSB in a slot before a next scheduled S-SSB slot based on the first LBT procedure being unsuccessful.Type: ApplicationFiled: November 19, 2021Publication date: May 8, 2025Inventors: Yiqing CAO, Yuan KAI, Juan MONTOJO, Peter GAAL, Shuping CHEN, Bin HAN, Ting WANG, Lu GAO, Zhimin DU, Yang LIU, Yan LI, Jiangsheng WANG, Yue YIN, Qiwen DENG, Zhuo CHEN, Sony AKKARAKARAN
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Publication number: 20250149436Abstract: A method for manufacturing an interconnect structure includes: forming sacrificial portions and electrically conductive portions on a base structure such that the sacrificial portions are disposed to alternate with the electrically conductive portions in a first direction, and such that each of the sacrificial portions and the electrically conductive portions is elongated in a second direction transverse to the first direction; forming blocking portions respectively on the sacrificial portions; forming a sacrificial layer to cover the electrically conductive portions and the blocking portions; forming an electrically conductive via which extends through the sacrificial layer so as to permit the electrically conductive via to be electrically connected to one of the electrically conductive portions; after forming the electrically conductive via, performing a removal process to remove the sacrificial layer, the blocking portions and the sacrificial portions so as to form a cavity; and forming a dielectric portioType: ApplicationFiled: November 6, 2023Publication date: May 8, 2025Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Gary LIU, Ting-Ya LO, Shao-Kuan LEE, Zi-Yi YANG, Chi-Lin TENG, Kuang-Wei YANG, Hsin-Yen HUANG, Hsiao-Kang CHANG, Ming-Han LEE, Shau-Lin SHUE
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Publication number: 20250147195Abstract: An X-ray measurement system with high signal resolution is provided. The X-ray measurement system includes an X-ray generator, an X-ray optical element group, a multi-dimensional X-ray detector and a processing device. The X-ray generator is configured to generate an incident X-ray beam. X-ray optics are used to guide the incident X-ray beam to a to-be-tested sample. The multi-dimensional X-ray detector is used to receive the measurement X-ray generated by irradiating the incident X-ray beam on the to-be-tested sample. The multi-dimensional X-ray detector includes an insulation layer, a plurality of first electrode layers, a photodiode layer, an X-ray conversion material layer made of amorphous selenium, and a second electrode layer. The processing device is configured to collect a to-be-tested X-ray signal and generate a plurality of measurement results that include a plurality of mode signals of different orders.Type: ApplicationFiled: October 29, 2024Publication date: May 8, 2025Inventors: YU-YAN AU YONG, TSUNG-HSIEN HAN, CHUN-TING LIU, PO-CHING HE, PO-TSANG WU
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Publication number: 20250147431Abstract: A method of manufacturing a semiconductor device includes dividing a number of dies along an x axis in a die matrix in each exposure field in an exposure field matrix delineated on the semiconductor substrate, wherein the x axis is parallel to one edge of a smallest rectangle enclosing the exposure field matrix. A number of dies is divided along a y axis in the die matrix, wherein the y axis is perpendicular to the x axis. Sequences SNx0, SNx1, SNx, SNxr, SNy0, SNy1, SNy, and SNyr are formed. p*(Nbx+1)?2 stepping operations are performed in a third direction and first sequence exposure/stepping/exposure operations and second sequence exposure/stepping/exposure operations are performed alternately between any two adjacent stepping operations as well as before a first stepping operation and after a last stepping operation. A distance of each stepping operation in order follows the sequence SNx.Type: ApplicationFiled: January 9, 2025Publication date: May 8, 2025Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Shinn-Sheng YU, Ru-Gun LIU, Hsu-Ting HUANG, Kenji YAMAZOE, Minfeng CHEN, Shuo-Yen CHOU, Chin-Hsiang LIN
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Patent number: 12292642Abstract: The present disclosure provides a display panel and a manufacturing method therefor, and a display apparatus, which relate to the technical field of displaying. The display panel includes a first base plate and a second base plate which are aligned with each other; the first base plate includes a first substrate and a thin film transistor; the thin film transistor includes an active layer; an optical adjustment layer is disposed on the second base plate; an orthographic projection of the optical adjustment layer on the first substrate overlaps with an orthographic projection of the active layer on the first substrate. That is, the optical adjustment layer corresponds to the active layer. In a laminating direction of the display panel, the existence of the optical adjustment layer with a certain height enables a reflecting surface of the second base plate to be closer to the first base plate.Type: GrantFiled: September 17, 2021Date of Patent: May 6, 2025Assignees: Beijing BOE Display Technology Co., Ltd., BOE TECHNOLOGY GROUP CO., LTD.Inventors: Yingying Qu, Lingdan Bo, Ting Dong, Jianhua Huang, Qiujie Su, Dongchuan Chen, Yanping Liao, Seungmin Lee, Jiantao Liu, Yue Yang
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Patent number: 12294028Abstract: A method of manufacturing a semiconductor device includes at least the following steps. A protrusion is formed in a substrate by an anisotropic etch process, wherein a sidewall of the protrusion is inclined. A recess is formed on the sidewall of the protrusion by an isotropic etch process, wherein during the isotropic etch process, a by-product covers a first portion of the sidewall of the protrusion while exposing a second portion of the sidewall of the protrusion, so that the recess is formed between the first portion and the second portion of the sidewall.Type: GrantFiled: October 25, 2023Date of Patent: May 6, 2025Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Jiun-Ming Kuo, Hsin-Chih Chen, Che-Yuan Hsu, Kuo-Chin Liu, Han-Yu Tsai, You-Ting Lin, Jen-Hong Chang
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Publication number: 20250143190Abstract: A semiconductor structure includes an Nth metal layer, a diffusion barrier layer over the Nth metal layer, a first deposition of bottom electrode material over the diffusion barrier layer, a second deposition of bottom electrode material over the first deposition of bottom electrode material, a magnetic tunneling junction (MTJ) layer over the second deposition of bottom electrode material, a top electrode over the MTJ layer; and an (N+1)th metal layer over the top electrode; wherein the diffusion barrier layer and the first deposition of bottom electrode material are laterally in contact with a dielectric layer, the first deposition of bottom electrode material spacing the diffusion barrier layer and the second deposition of bottom electrode material apart, and N is an integer greater than or equal to 1. An associated electrode structure and method are also disclosed.Type: ApplicationFiled: January 3, 2025Publication date: May 1, 2025Inventors: CHUNG-YEN CHOU, FU-TING SUNG, YAO-WEN CHANG, SHIH-CHANG LIU
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Publication number: 20250142966Abstract: An electronic device includes an element layer and transducing structures. The element layer includes island portions, bridge portions and openings. The island portions have pixel structures. Each of the pixel structures includes a thin film transistor and at least one light-emitting element electrically connected to the thin film transistor. The bridge portions connect the island portions. The island portions and the bridge portions define the openings. Each of the openings has a top side and a bottom side opposite to each other. The at least one light emitting element is located on the top side. Each of the transducing structures overlaps a corresponding opening. Each of the transducing structures includes a first electrode disposed on the bottom side of the opening 10 and a second electrode disposed on the top side of the opening, wherein a portion of the opening is a cavity of the transducing structure.Type: ApplicationFiled: October 1, 2024Publication date: May 1, 2025Applicant: AUO CorporationInventors: Wei Ting Liu, Chih-Tsung Lee, Shang-Ren Lin, Yu-Chin Wu
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Publication number: 20250142987Abstract: Methods, devices, and systems for optical sensing are provided. In one aspect, an optical sensing apparatus includes: a first absorption region configured to absorb light in at least a first spectrum with visible or near infrared wavelengths; a second absorption region formed over the first absorption region, the second absorption region configured to absorb light in at least a second spectrum with near infrared or shortwave infrared wavelengths; and a third absorption region formed over the second absorption region, the third absorption region configured to absorb light in at least a third spectrum with shortwave infrared or mid-wave infrared wavelengths.Type: ApplicationFiled: August 29, 2024Publication date: May 1, 2025Inventors: Yun-Chung Na, You-Ru Lin, Tsung-Ting Wu, Yu-Hsuan Liu
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Publication number: 20250139809Abstract: A method and an apparatus for detecting an isolation pad in medical imaging, and a medical imaging system are provided. The method includes: acquiring an image of a detection object captured via a camera; determining, based on the image, whether an isolation pad is present at a predetermined part of the detection object; and outputting information related to a result of the determination. The present application detects an isolation pad placed on the body of a detection object, and it is thus possible to reliably avoid the formation of a loop in the body of the detection object.Type: ApplicationFiled: October 7, 2024Publication date: May 1, 2025Inventors: Qingyu Dai, Xiaolan Liu, Gang Hu, Ting Ye, Jun Zhang, Jian Cui, Kun Wang
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Patent number: 12288811Abstract: Multi-gate devices and methods for fabricating such are disclosed herein. An exemplary method includes forming an n-type work function layer in a gate trench in a gate structure, wherein the n-type work function layer is formed around first channel layers in a p-type gate region and around second channel layers in an n-type gate region, forming a first metal fill layer in a first gate trench over the n-type work function layer in the p-type gate region and in a second gate trench over the n-type work function layer in the n-type gate region, removing the first metal fill layer from the p-type gate region, removing the n-type work function layer from the p-type gate region, forming a p-type work function layer in the first gate trench of the p-type gate region, and forming a second metal fill layer in the first gate trench of the p-type gate region.Type: GrantFiled: May 6, 2022Date of Patent: April 29, 2025Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Shih-Hang Chiu, Kuan-Ting Liu, Chi On Chui, Chia-Wei Chen, Jian-Hao Chen, Cheng-Lung Hung
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Publication number: 20250132247Abstract: An interconnection structure is provided to include a substrate, a first metal trench, a boron nitride dielectric, a second metal trench, and a metal via. The substrate is formed with a first metal trench. The boron nitride dielectric is disposed over the substrate. The second metal trench is formed in the boron nitride dielectric. The metal via is disposed to interconnect the first metal trench and the second metal trench.Type: ApplicationFiled: October 24, 2023Publication date: April 24, 2025Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Chi-Lin TENG, Gary LIU, Ting-Ya LO, Yen-Ju WU, Shao-Kuan LEE, Kuang-Wei YANG, Hsin-Yen HUANG, Hsiao-Kang CHANG
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Publication number: 20250132208Abstract: The present disclosure provides a redistribution structure that includes a metal line, a first dielectric layer disposed over the metal line, a first etch stop layer (ESL) disposed over the first dielectric layer, a second dielectric layer disposed over the first ESL, and a conductive via extending through the second dielectric layer, the first ESL and the first dielectric layer to contact the metal line. A lower portion of the second dielectric layer extends downward through the first ESL and the first dielectric layer and partially into the metal line.Type: ApplicationFiled: February 13, 2024Publication date: April 24, 2025Inventors: Tzu-Ting Liu, Wen-Chiung Tu, Ming-Wei Lee, Chen-Chiu Huang, Dian-Hau Chen
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Publication number: 20250130758Abstract: Examples of the disclosure relate to selecting candidate devices for connecting with one or more portable devices. In examples of the disclosure two or more candidate devices that satisfy location criteria are identified. Microphones of a portable device are used to determine a location of a sound source relative to the at least one portable device and the location of the sound source is compared with respective locations for the two or more candidate devices. A candidate device for connecting to the at least one portable device is selected based, at least in part, on the comparison between the location of the sound source and a location for the selected candidate device.Type: ApplicationFiled: October 14, 2024Publication date: April 24, 2025Inventors: Ting DANG, Khaldoon AL-NAIMI, Ashok Samraj THANGARAJAN, Andrea FERLINI, Yang LIU, Alessandro MONTANARI
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Publication number: 20250133891Abstract: A light-emitting substrate has a display region and a peripheral region located on at least one side of the display region, the peripheral region includes a first peripheral region, and the first peripheral region and the display region are spaced apart in a first direction. The light-emitting substrate includes: a substrate; a first conductive layer disposed on the substrate, the first conductive layer including a plurality of signal lines located in the display region; an insulating layer covering the plurality of signal lines; and a second conductive layer disposed on the insulating layer. The insulating layer includes a first insulating layer and a second insulating layer sequentially stacked in a direction away from the substrate; and at least between the first peripheral region and the display region, at least part of edges of the first insulating layer exceeds an edge of the second insulating layer.Type: ApplicationFiled: September 30, 2022Publication date: April 24, 2025Inventors: Haifeng Hu, Ting Zeng, Xiaoxiang Zhang, Huan Liu, Xin Zha, Tao Xiao, Renwei Zhang, Caigui Yang, Qi Qi
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Patent number: 12284812Abstract: A semiconductor structure includes a substrate, a first dielectric layer on the substrate, a plurality of memory stack structures on the first dielectric layer, an insulating layer conformally covering the memory stack structures and the first dielectric layer, a second dielectric layer on the insulating layer and filling the spaces between the memory stack structures, a first interconnecting structure through the second dielectric layer, wherein a top surface of the first interconnecting structure is flush with a top surface of the second dielectric layer and higher than top surfaces of the memory stack structures, a third dielectric layer on the second dielectric layer, and a plurality of second interconnecting structures through the third dielectric layer, the second dielectric layer and the insulating layer on the top surfaces of the memory stack structures to contact the top surfaces of the memory stack structures.Type: GrantFiled: April 16, 2024Date of Patent: April 22, 2025Assignee: UNITED MICROELECTRONICS CORP.Inventors: Hui-Lin Wang, Yu-Ping Wang, Chen-Yi Weng, Chin-Yang Hsieh, Yi-Hui Lee, Ying-Cheng Liu, Yi-An Shih, I-Ming Tseng, Jing-Yin Jhang, Chien-Ting Lin
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Patent number: 12282390Abstract: Distributed journaling for write operations to RAID systems is disclosed, including: receiving a new write operation to a plurality of storage devices associated with a redundant array of independent disks (RAID) group, wherein the plurality of storage devices comprises a main data storage and a non-volatile journal storage; writing a record of the new write operation to the non-volatile journal storage; after the record of the new write operation is written to the non-volatile journal storage, writing new data associated with the new write operation to the main data storage; and after the new data associated with the new write operation is written to the main data storage, invalidating the record of the new write operation in the non-volatile journal storage, wherein upon restarting the plurality of storage devices associated with the RAID group, the non-volatile journal storage is checked and valid records of one or more write operations included in the non-volatile journal storage are written to the main dType: GrantFiled: July 26, 2024Date of Patent: April 22, 2025Assignee: GRAID Technology Inc.Inventors: Guo-Fu Tseng, Jin-Jhang Lee, Bo-Yi Sung, Po-Ting Liu, Cheng-Yue Chang
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Publication number: 20250126228Abstract: A first video stream comprising a first image of a first participant of a virtual meeting, a second image of a second participant, and a third image of a third participant are received from a first client device connected to a virtual meeting platform. It is determined whether an image combining condition is satisfied. Responsive to determining that the image combining condition is satisfied with respect to the first image and the second image, a first screen tile comprising the first image and the second image is generated. A first size of the first screen tile is defined based on a number of images comprised by the first screen tile. A second screen tile comprising the third image is generated. A virtual meeting user interface comprising the first screen tile and the second screen tile is provided for presentation on a second client device connected to the virtual meeting platform.Type: ApplicationFiled: October 15, 2024Publication date: April 17, 2025Inventors: Andrey Ryabtsev, Rahul Garg, Amelio Vázquez-Reina, Wonsik Kim, Robert Anderson, Weijuan Xi, Desai Fan, Fangda Li, Chun-Ting Liu
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Patent number: D1071786Type: GrantFiled: December 3, 2024Date of Patent: April 22, 2025Inventor: Ting Liu
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Patent number: D1071787Type: GrantFiled: December 3, 2024Date of Patent: April 22, 2025Inventor: Ting Liu