Patents by Inventor Ting Liu

Ting Liu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230034994
    Abstract: Provided is a channel identification method. The method includes: acquiring channel data of a terminal; constructing a first feature vector based on the channel data, where the first feature vector represents a numerical value set of cross-correlation values, which change along with time intervals, between channel data at different moments and the channel data themselves and between the channel data at different moments and subsequent channel data at different time intervals; and inputting the first feature vector into a predetermined prediction model to predict a speed of the terminal, or to predict a speed type of a cluster to which the terminal belongs. Further provided are an adaptive transmission method and apparatus based on the channel identification method, a transmission device, a base station, and a computer storage medium.
    Type: Application
    Filed: December 15, 2020
    Publication date: February 2, 2023
    Inventors: Jianguo LI, Qiaoyan LIU, Kai MAO, Ting MIAO, Ke SHI
  • Publication number: 20230029739
    Abstract: A semiconductor device includes a pair of fin structures on a semiconductor substrate, each including a vertically stacked plurality of channel layers, a dielectric fin extending in parallel to and between the fin structures, and a gate structure on and extending perpendicularly to the fin structures, the gate structure engaging with the plurality of channel layers. The dielectric fin includes a fin bottom and a fin top over the fin bottom. The fin bottom has a top surface extending above a bottom surface of a topmost channel layer. The fin top includes a core and a shell, the core having a first dielectric material, the shell surrounding the core and having a second dielectric material different from the first dielectric material.
    Type: Application
    Filed: July 29, 2021
    Publication date: February 2, 2023
    Inventors: Chih-Chung Chang, Sung-En Lin, Chung-Ting Ko, You-Ting Lin, Yi-Hsiu Liu, Po-Wei Liang, Jiun-Ming Kuo, Yung-Cheng Lu, Chi On Chui, Yuan-Ching Peng, Jen-Hong Chang
  • Patent number: 11569121
    Abstract: Methods of forming semiconductor devices are provided. The methods include: forming a trench in a substrate, wherein the trench includes a defect protruding from a bottom surface of the trench; forming a flowable material on the substrate to at least partially cover the defect; performing an etching process to reduce the height of the defect; and removing the flowable material.
    Type: Grant
    Filed: May 26, 2021
    Date of Patent: January 31, 2023
    Assignee: Vanguard International Semiconductor Corporation
    Inventors: I-Ping Lee, Kwang-Ming Lin, Chih-Cherng Liao, Ya-Huei Kuo, Pei-Yu Chang, Ya-Ting Chang, Tsung-Hsiung Lee, Zheng-Xian Wu, Kai-Chuan Kan, Yu-Jui Chang, Yow-Shiuan Liu
  • Patent number: 11570202
    Abstract: A method for automatically sensing attack behaviors, the method including: distributing a service request from a network switch to a response module, where the response module includes a main controller configured for data interaction processing and an auxiliary controller configured for interactive data processing; generating, by the main controller and the auxiliary controller in the response module, respective response data according to the service request, respectively; and comparing the respective response data of the main controller with the respective response data of the auxiliary controller; if a result of comparison is inconsistent, indicating the network switch is abnormal, an administrator is informed, and the response data generated by the auxiliary controller is fed back to the network switch; and, if the result of comparison is consistent, the response data generated by the main controller is fed back to the network switch.
    Type: Grant
    Filed: October 29, 2020
    Date of Patent: January 31, 2023
    Assignee: THE PLA INFORMATION ENGINEERING UNIVERSITY
    Inventors: Qinrang Liu, Ke Song, Bo Zhao, Jianliang Shen, Xia Zhang, Ting Chen, Peijie Li, Dongpei Liu, Wenjian Zhang, Li Zhang
  • Publication number: 20230028460
    Abstract: A semiconductor device includes an active region. A metal gate electrode is disposed over the active region. A conductive layer is disposed over the metal gate electrode. A silicon-containing layer is disposed over a first portion of the conductive layer. A dielectric layer is disposed over a second portion of the conductive layer. A gate via vertically extends through the silicon-containing layer. The gate via is disposed over, and electrically coupled to, the metal gate electrode.
    Type: Application
    Filed: April 21, 2022
    Publication date: January 26, 2023
    Inventors: Wei-Cheng Wang, Shih-Hang Chiu, Kuan-Ting Liu, Cheng-Lung Hung, Chi On Chui
  • Publication number: 20230027567
    Abstract: A method of manufacturing a semiconductor device includes forming a fin structure including a stacked layer of first semiconductor layers and second semiconductor layers disposed over a bottom fin structure and a hard mask layer over the stacked layer, forming an isolation insulating layer so that the hard mask layer and the stacked layer are exposed from the isolation insulating layer, forming a sacrificial cladding layer over at least sidewalls of the exposed hard mask layer and stacked layer, forming layers of a first dielectric layer and an insertion layer over the sacrificial cladding layer and the fin structure, performing an annealing operation to convert a portion of the layers of the first dielectric layer and the insertion layer from an amorphous form to a crystalline form, and removing the remaining amorphous portion of the layers of the first dielectric layer and the insertion layer to form a recess.
    Type: Application
    Filed: January 28, 2022
    Publication date: January 26, 2023
    Inventors: Han-Yu TSAI, Yi-Hsiu LIU, You-Ting LIN, Chih-Chung CHANG
  • Publication number: 20230023736
    Abstract: The present invention discloses a method for determining a maximum value of a heart activity parameter of a user performing a physical activity. Acquire first heart activity data in a first duration of the physical activity performed by the user. Acquire motion data in the first duration of the physical activity performed by the user. Calculate second heart activity data based on the motion data in the first duration of the physical activity performed by the user by a mathematical model and estimate the maximum value of the heart activity parameter of the user based on a comparison between the first heart activity data and the second heart activity data.
    Type: Application
    Filed: July 14, 2021
    Publication date: January 26, 2023
    Inventors: SZU-HONG CHEN, PIN-YU CHEN, TAI-YU HUANG, YU-TING LIU
  • Publication number: 20230026658
    Abstract: An immersion cooling system includes a tank, a first condenser, an enclosure, a second condenser and a connecting pipe. The tank has a first space. The first space is configured to accommodate a cooling liquid for at least one electronic equipment to immerse therein. The first condenser is disposed inside the tank. The enclosure is disposed outside the tank. The enclosure forms a second space together with the tank. The second condenser is disposed in the second space. The connecting pipe includes a first end and a second end opposite to the first end. The first end is connected with the second condenser. The second end is communicated with the first space.
    Type: Application
    Filed: May 17, 2022
    Publication date: January 26, 2023
    Inventors: Chia-Yi LIN, Wei-Chih LIN, Ren-Chun CHANG, Yan-Hui JIAN, Hsuan-Ting LIU, Li-Hsiu CHEN, Wen-Yin TSAI
  • Publication number: 20230023218
    Abstract: The embodiments of the present disclosure provide a cell culture composition and a use thereof, and the cell culture composition includes a culture medium and mitochondria. The cell culture composition including mitochondria can promote cell growth and improve the function of the damaged or aged stem cells, thereby improving overall cell growth.
    Type: Application
    Filed: September 19, 2022
    Publication date: January 26, 2023
    Applicant: TAIWAN MITOCHONDRION APPLIED TECHNOLOGY CO., LTD.
    Inventors: Han-Chung CHENG, Chih-Kai HSU, Hui-Ching TSENG, Shun-Chieh YANG, Chi-Tang TU, Szu-Ting LIU, Li-Hsin YAO
  • Patent number: 11561719
    Abstract: A flash memory control method, a flash memory storage device and a flash memory controller are provided. The method includes the following. A flash memory module is instructed to perform a data merge operation to copy first data in a first physical unit into at least one second physical unit. After the first data is copied and before the first physical unit is erased, another programming operation is performed on the first physical unit to change a data storage state of at least a part of memory cells in the first physical unit from a first state into a second state. After the first physical unit is programmed, an erase operation is performed on the first physical unit.
    Type: Grant
    Filed: April 27, 2021
    Date of Patent: January 24, 2023
    Assignee: PHISON ELECTRONICS CORP.
    Inventors: Yu-Siang Yang, Wei Lin, An-Cheng Liu, Yu-Heng Liu, Chun-Hsi Lai, Ting-Chien Zhan
  • Publication number: 20230016381
    Abstract: A semiconductor structure includes a semiconductor fin protruding from a substrate; a gate structure engaging with the semiconductor fin. The semiconductor structure also includes an interlayer dielectric (ILD) layer disposed over the substrate and adjacent to the gate structure, where a top surface of the gate structure is below a top surface of the ILD layer; a first metal layer in direct contact with a top surface of the gate structure; a second metal layer disposed over the first metal layer, where the first metal layer is disposed on bottom and sidewall surfaces of the second metal layer, where the bottom surface of the second metal layer has a concave profile, and where the second metal layer differs from the first metal layer in composition; and a gate contact disposed over the second metal layer.
    Type: Application
    Filed: May 6, 2022
    Publication date: January 19, 2023
    Inventors: Wei-Cheng Wang, Shih-Hang Chiu, Kuan-Ting Liu, Chi On Chui, Chia-Wei Chen, Jian-Hao Chen
  • Publication number: 20230015132
    Abstract: An air supply device, a gas turbine system and a using method thereof are disclosed. In the air supply device, an air intake compartment includes a connection end; a combustion air intake filter is located in the air intake compartment and connected with the combustion air intake filter; a combustion air intake interface is located on a tail plate and is connected with the combustion air silencer; and a sound insulation turnover mechanism includes a sound insulation flap and a turnover mechanism, the air intake compartment includes a first bottom plate and the tail plate that is located at the connection end, the sound insulation flap is located at the connection end, and the turnover mechanism is connected with the sound insulation flap, and is configured to drive the sound insulation flap to rotate relative to the tail plate.
    Type: Application
    Filed: March 4, 2022
    Publication date: January 19, 2023
    Applicant: YANTAI JEREH PETROLEUM EQUIPMENT & TECHNOLOGIES CO., LTD.
    Inventors: Ning FENG, Tao KOU, Ting ZHANG, Yichao MOU, Libin ZHOU, Xin LI, Xu LIU, Lili WANG, Jianglei ZOU, Qiong WU, Wanchun ZHA, Cong ZHANG
  • Publication number: 20230019475
    Abstract: A method for manufacturing a semiconductor structure includes the following: providing a substrate; forming a semiconductor layer on the substrate; performing P-type doping on the semiconductor layer to transform the semiconductor layer into an initial mask layer; performing a first patterning treatment on the initial mask layer to form a mask layer having an opening; and performing a second patterning on the substrate by taking the mask layer as a mask and using an etching process. An etching rate of the substrate is greater than an etching rate of the mask layer during the etching process.
    Type: Application
    Filed: September 23, 2022
    Publication date: January 19, 2023
    Applicant: CHANGXIN MEMORY TECHNOLOGIES, INC.
    Inventors: Ting LIAN, YUHENG LIU, Yunfei FU, Dingdong KUANG
  • Patent number: 11555981
    Abstract: An optical element driving mechanism is provided and includes a fixed assembly, a movable assembly, a driving assembly and a stopping assembly. The fixed assembly has a main axis. The movable assembly is configured to connect an optical element, and the movable assembly is movable relative to the fixed assembly. The driving assembly is configured to drive the movable assembly to move relative to the fixed assembly. The stopping assembly is configured to limit the movement of the movable assembly relative to the fixed assembly within a range of motion.
    Type: Grant
    Filed: June 12, 2020
    Date of Patent: January 17, 2023
    Assignee: TDK TAIWAN CORP.
    Inventors: Chao-Chang Hu, Liang-Ting Ho, Chen-Er Hsu, Yi-Liang Chan, Fu-Lai Tseng, Fu-Yuan Wu, Chen-Chi Kuo, Ying-Jen Wang, Wei-Han Hsia, Yi-Hsin Tseng, Wen-Chang Lin, Chun-Chia Liao, Shou-Jen Liu, Chao-Chun Chang, Yi-Chieh Lin, Shang-Yu Hsu, Yu-Huai Liao, Shih-Wei Hung, Sin-Hong Lin, Kun-Shih Lin, Yu-Cheng Lin, Wen-Yen Huang, Wei-Jhe Shen, Chih-Shiang Wu, Sin-Jhong Song, Che-Hsiang Chiu, Sheng-Chang Lin
  • Patent number: 11557021
    Abstract: A positioning system includes a storage device, a lidar and a controller. The storage device stores a global map. The lidar generates an initial local map. The controller rotates the initial local map to generate a rotated local map, compares the rotated local map and the initial local map separately with a plurality of partial areas of the global map, so as to obtain at least one similar area, calculates at least one candidate coordinates for a mobile device on the global map according to the center point of each of the similar areas, and calculates similarity scores according to each of the candidate coordinates, and selects the candidate coordinates having highest similarity score for use as coordinate of the mobile device on the global map.
    Type: Grant
    Filed: October 10, 2019
    Date of Patent: January 17, 2023
    Assignee: QUANTA COMPUTER INC.
    Inventors: Chao-Yi Liu, Chia-Wei Lin, Yang-Sheng Wang, Chun-Ting Chen, Yu-Ching Chen
  • Publication number: 20230009271
    Abstract: Some embodiments of the disclosure provides a method for preparing a sensing unit of a fiber-optic Fabry-Perot pressure sensor. The method includes the following steps. Preparing a first quartz sheet and a second quartz sheet, polishing the upper surface of the first quartz sheet, and polishing the upper surface of the second quartz sheet. Fabricating a plurality of grooves in the upper surface of the first quartz sheet. Fabricating through holes in the lower surface of the first quartz sheet, each of the through holes being coaxial with a corresponding groove and communicating with the corresponding groove. Combining the upper surface of the second quartz sheet with the upper surface of the first quartz sheet to form a laminated body. Cutting the plurality of grooves of the laminated body to obtain a plurality of sensing units.
    Type: Application
    Filed: July 7, 2022
    Publication date: January 12, 2023
    Applicant: NORTH UNIVERSITY OF CHINA
    Inventors: Pinggang Jia, Jijun Xiong, Jiashun Li, Guocheng Fang, Jia Liu, Guowen An, Ting Liang
  • Publication number: 20230011783
    Abstract: Multi-gate devices and methods for fabricating such are disclosed herein. An exemplary method includes forming an n-type work function layer in a gate trench in a gate structure, wherein the n-type work function layer is formed around first channel layers in a p-type gate region and around second channel layers in an n-type gate region, forming a first metal fill layer in a first gate trench over the n-type work function layer in the p-type gate region and in a second gate trench over the n-type work function layer in the n-type gate region, removing the first metal fill layer from the p-type gate region, removing the n-type work function layer from the p-type gate region, forming a p-type work function layer in the first gate trench of the p-type gate region, and forming a second metal fill layer in the first gate trench of the p-type gate region.
    Type: Application
    Filed: May 6, 2022
    Publication date: January 12, 2023
    Inventors: Shih-Hang Chiu, Kuan-Ting Liu, Chi On Chui, Chia-Wei Chen, Jian-Hao Chen, Cheng-Lung Hung
  • Publication number: 20230009027
    Abstract: A circuit includes a voltage divider circuit configured to generate a feedback voltage according to an output voltage, an operational amplifier configured to output a driving signal according to the feedback voltage and a reference voltage and a pass gate circuit including multiple current paths. The current paths are controlled by the driving signal and connected in parallel between the voltage divider circuit and a power reference node.
    Type: Application
    Filed: February 11, 2022
    Publication date: January 12, 2023
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Huan-Neng Chen, Yen-Lin LIU, Chia-Wei Hsu, Jo-Yu Wu, CHANG-FEN HU, Shao-Yu Li, Bo-Ting Chen
  • Publication number: 20230010065
    Abstract: A semiconductor structure and a method of forming the same are provided. In an embodiment, an exemplary semiconductor structure includes a gate structure. The gate structure includes a gate dielectric layer, an n-type work function layer embedded in the gate dielectric layer, a dielectric capping layer embedded in the n-type work function layer, and a p-type work function layer embedded in the dielectric capping layer. A top surface of the gate structure exposes the n-type work function layer, the dielectric capping layer, and the p-type work function layer. The semiconductor structure also includes a first metal cap on the n-type work function layer and a second metal cap on the p-type work function layer. The first metal cap is spaced apart from the second metal cap. without formed on the dielectric capping layer.
    Type: Application
    Filed: June 7, 2022
    Publication date: January 12, 2023
    Inventors: Shih-Hang Chiu, Chung-Chiang Wu, Wei-Cheng Wang, Chia-Wei Chen, Jian-Hao Chen, Kuan-Ting Liu, Chi On Chui
  • Publication number: 20230011163
    Abstract: The invention discloses the application of a ?-N-acetylhexosaminidase (HaHex74) from Haloferula sp. in the synthesis of human milk oligosaccharides. The invention provides the use of HaHex74 protein or related biological materials thereof in any one of the following: synthesizing human milk oligosaccharides; synthesizing Lacto-N-triose II and/or Lacto-N-neotetraose; the HaHex74 protein having the amino acid sequence shown in SEQ ID No. 2 is derived from Haloferula sp. The ?-N-acetylhexosaminidase HaHex74 disclosed by the invention possesses high-level expression, excellent hydrolysis properties and transglycosylation activity, which may make it potentially useful in the production of human milk oligosaccharides.
    Type: Application
    Filed: October 20, 2020
    Publication date: January 12, 2023
    Inventors: Zhengqiang JIANG, Yihao LIU, Shaoqing YANG, Junwen MA, Qiaojuan YAN, Ting LI