Patents by Inventor Ting-Wei Chang

Ting-Wei Chang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240143888
    Abstract: An integrated circuit includes a first and second active region, a first insulating region, and a first and second contact. The first and second active region extend in a first direction, and are on a first level. The first active region includes a first and second drain/source region. The second active region includes a third drain/source region. The first insulating region is over the first drain/source region. The first contact overlaps the third drain/source region, is electrically coupled to the third drain/source region and is located on a second level. The second contact includes a first and second portion. The first portion overlaps the first and second drain/source. The second portion overlaps the first contact, the first and third drain/source region, and the first insulating region, and is electrically coupled to the first portion, and electrically insulated from the first drain/source region.
    Type: Application
    Filed: January 9, 2024
    Publication date: May 2, 2024
    Inventors: Pochun WANG, Yu-Jung CHANG, Hui-Zhong ZHUANG, Ting-Wei CHIANG
  • Patent number: 11968817
    Abstract: A semiconductor device includes a fin structure. A source/drain region is formed on the fin structure. A first gate structure is disposed over the fin structure. A source/drain contact is disposed over the source/drain region. The source/drain contact has a protruding segment that protrudes at least partially over the first gate structure. The source/drain contact electrically couples together the source/drain region and the first gate structure.
    Type: Grant
    Filed: February 28, 2022
    Date of Patent: April 23, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Jui-Lin Chen, Chao-Yuan Chang, Ping-Wei Wang, Fu-Kai Yang, Ting Fang, I-Wen Wu, Shih-Hao Lin
  • Patent number: 11955397
    Abstract: A semiconductor structure is provided. The semiconductor structure includes a substrate, a channel layer, a barrier layer, a compound semiconductor layer, a gate electrode, and a stack of dielectric layers. The channel layer is disposed on the substrate. The barrier layer is disposed on the channel layer. The compound semiconductor layer is disposed on the barrier layer. The gate electrode is disposed on the compound semiconductor layer. The stack of dielectric layers is disposed on the gate electrode. The stack of dielectric layers includes layers having different etching rates.
    Type: Grant
    Filed: November 9, 2020
    Date of Patent: April 9, 2024
    Assignee: Vanguard International Semiconductor Corporation
    Inventors: Shin-Cheng Lin, Cheng-Wei Chou, Ting-En Hsieh, Yi-Han Huang, Kwang-Ming Lin, Yung-Fong Lin, Cheng-Tao Chou, Chi-Fu Lee, Chia-Lin Chen, Shu-Wen Chang
  • Publication number: 20240099086
    Abstract: A display may have an array of pixels. Display driver circuitry may supply data and control signals to the pixels. Each pixel may have seven transistors, a capacitor, and a light-emitting diode such as an organic light-emitting diode. The seven transistors may receive control signals using horizontal control lines. Each pixel may have first and second emission enable transistors that are coupled in series with a drive transistor and the light-emitting diode of that pixel. The first and second emission enable transistors may be coupled to a common control line or may be separately controlled so that on-bias stress can be effectively applied to the drive transistor. The display driver circuitry may have gate driver circuits that provide different gate line signals to different rows of pixels within the display. Different rows may also have different gate driver strengths and different supplemental gate line loading structures.
    Type: Application
    Filed: November 17, 2023
    Publication date: March 21, 2024
    Inventors: Cheng-Ho Yu, Chin-Wei Lin, Shyuan Yang, Ting-Kuo Chang, Tsung-Ting Tsai, Warren S. Rieutort-Louis, Shih-Chang Chang, Yu Cheng Chen, John Z. Zhong
  • Publication number: 20240088023
    Abstract: An interconnect structure includes a dielectric layer, a first conductive feature, a hard mask layer, a conductive layer, and a capping layer. The first conductive feature is disposed in the dielectric layer. The hard mask layer is disposed on the first conductive feature. The conductive layer includes a first portion and a second portion, the first portion of the conductive layer is disposed over at least a first portion of the hard mask layer, and the second portion of the conductive layer is disposed over the dielectric layer. The hard mask layer and the conductive layer are formed by different materials. The capping layer is disposed on the dielectric layer and the conductive layer.
    Type: Application
    Filed: November 20, 2023
    Publication date: March 14, 2024
    Inventors: Shao-Kuan LEE, Kuang-Wei YANG, Cherng-Shiaw TSAI, Cheng-Chin LEE, Ting-Ya LO, Chi-Lin TENG, Hsin-Yen HUANG, Hsiao-Kang CHANG, Shau-Lin SHUE
  • Publication number: 20240077479
    Abstract: A detection system and method for the migrating cell is provided. The system is configured to detect a migrating cell combined with an immunomagnetic bead. The system includes a platform, a microchannel, a magnetic field source, a coherent light source and an optical sensing module. The microchannel is configured to allow the migrating cell to flow in it along a flow direction. The magnetic field source is configured to provide magnetic force to the migrating cell combined with the immunomagnetic bead. The magnetic force includes at least one magnetic force component and the magnetic force component is opposite to the flow direction of the microchannel. The coherent light source is configured to provide the microchannel with the coherent light. The optical sensing module is configured to receive the interference light caused by the coherent light being reflected by the sample inside the microchannel.
    Type: Application
    Filed: August 10, 2023
    Publication date: March 7, 2024
    Applicant: DeepBrain Tech. Inc
    Inventors: Han-Lin Wang, Chia-Wei Chen, Yao-Wen Liang, Ting-Chun Lin, Yun-Ting Kuo, You-Yin Chen, Yu-Chun Lo, Ssu-Ju Li, Ching-Wen Chang, Yi-Chen Lin
  • Publication number: 20240038637
    Abstract: A clip structure for a packaged semiconductor device is provided. The packaged semiconductor device includes a first die portion and a second die portion being electrically isolated from the first die portion. The clip structure includes a first portion, a second portion and a gate wire bond. The first portion is electrically conductive, and the first portion is configured to integrally connect a source terminal with the first die portion. The second portion is electrically conductive and is electrically isolated from the first portion and is configured to connect to a gate terminal. The gate wire bond is configured to connect the second portion with the second die portion.
    Type: Application
    Filed: July 28, 2023
    Publication date: February 1, 2024
    Applicant: NEXPERIA B.V.
    Inventors: Jia Yunn Ting, Ting Wei Chang, Wing Onn Chaw
  • Publication number: 20230411175
    Abstract: A method for manufacturing a semiconductor package assembly is provided. The assembly includes a semiconductor package and a molding resin case encapsulating the semiconductor package. The complete semiconductor package undergoes a surface roughening treatment, thus improving the overall adhesion with the molding resin (EMC) and reducing the risks of delamination.
    Type: Application
    Filed: June 13, 2023
    Publication date: December 21, 2023
    Applicant: NEXPERIA B.V.
    Inventors: Wai Wai Lee, Ting Wei Chang, Jia Yunn Ting, Wei Leong Tan
  • Publication number: 20230352060
    Abstract: A circuit module with improved line load, may comprise a first line, a first switch, a second line, a second switch and a second driver. The first switch may be on and off to conduct and stop conducting between the first line and a first node. The second switch may be on and off to conduct and stop conducting between the second line and the first node. The second driver, coupled to the second line, may be enabled to drive the second line according to a voltage of a second node, and may be disabled to stop driving the second line. The voltage of the second node may be controlled by a voltage of the first node. When the first switch is on, the second switch may be off. When the second switch is off, the second driver may be enabled.
    Type: Application
    Filed: July 12, 2023
    Publication date: November 2, 2023
    Inventors: Nan-Chun LIEN, Li-Wei CHU, Ting-Wei CHANG
  • Patent number: 11790148
    Abstract: An IC structure includes a first cell and a first and second rail. The first cell includes a first and second active region and a first, a second and a third gate structure. The first active region having a first dopant type. The second active region having a second dopant type. The first gate structure extending in a second direction, overlapping the first or the second active region. The second gate structure extending in the second direction, and overlapping a first edge of the first or second active region. The third gate structure extending in the second direction, and overlapping at least a second edge of the first or second active region. The first rail extending in the first direction and overlapping a middle portion of the first active region. The second rail extending in the first direction and overlapping a middle portion of the second active region.
    Type: Grant
    Filed: December 10, 2020
    Date of Patent: October 17, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Hui-Zhong Zhuang, Ting-Wei Chang, Lee-Chung Lu, Li-Chun Tien, Shun Li Chen
  • Publication number: 20230326835
    Abstract: Aspects of the present disclosure relate to a molded electronic package and a method for manufacturing the same. The molded electronic package includes a first substrate, a second substrate, an electronic component arranged on the first substrate, a spring member arranged between the second substrate and the electronic component, the spring member including a first contact portion being fixated relative to the second substrate, and a second contact portion physically contacting the electronic component, and a body of solidified molding compound configured to encapsulate the electronic component and the spring member and to mutually fixate the first substrate, the second substrate, the electronic component and the spring member. The second substrate and the spring member are electrically and/or thermally conductive.
    Type: Application
    Filed: April 11, 2023
    Publication date: October 12, 2023
    Applicant: NEXPERIA B.V.
    Inventors: Hing Suan Cheam, Wei Leong Tan, Ting Wei Chang
  • Patent number: 11774668
    Abstract: A light-emitting module includes a light guide plate, a light-emitting element, a first reflection layer and a second reflection layer. The light guide plate has a light incident surface, a light exit surface, a first surface, and a second surface. The light incident surface has three edges connected sequentially. The first surface, the light exit surface, and the second surface are connected to the edges respectively. The first surface and the second surface are respectively located on opposite sides of the light guide plate. The light exit surface extends away from the light incident surface and is elongated. The light-emitting element is configured to emit light toward the light incident surface. The first reflection layer is disposed corresponding to the first surface to cover the first surface. The second reflection layer is disposed corresponding to the second surface to cover the second surface.
    Type: Grant
    Filed: March 30, 2023
    Date of Patent: October 3, 2023
    Assignee: Chicony Power Technology Co., Ltd.
    Inventors: Hsuan-Wei Ho, Ting-Wei Chang
  • Patent number: 11742000
    Abstract: A circuit module with improved line load, may comprise a first line, a first switch, a second line, a second switch and a second driver. The first switch may be on and off to conduct and stop conducting between the first line and a first node. The second switch may be on and off to conduct and stop conducting between the second line and the first node. The second driver, coupled to the second line, may be enabled to drive the second line according to a voltage of a second node, and may be disabled to stop driving the second line. The voltage of the second node may be controlled by a voltage of the first node. When the first switch is on, the second switch may be off. When the second switch is off, the second driver may be enabled.
    Type: Grant
    Filed: November 9, 2021
    Date of Patent: August 29, 2023
    Assignee: M31 TECHNOLOGY CORPORATION
    Inventors: Nan-Chun Lien, Li-Wei Chu, Ting-Wei Chang
  • Publication number: 20230204508
    Abstract: A detection method and a detection system for detecting objects of interest attached to a surface of a plurality of reporters, wherein the plurality of reporters are flowing in a microfluidic chip and illuminated by a light source. The detection method has following steps: obtaining a plurality of local surface plasmon resonance (LSPR) spectral images of each the plurality of the reporters individually, wherein each of the LSPR spectral images has a brightness of a long wavelength band (BA) and a brightness of a short wavelength band (BB); calculating a spectral image brightness contrast ? for each of the LSPR spectral images, wherein ? = B A - B B B A + B B ; and, defining a positive threshold for |?|?0.1.
    Type: Application
    Filed: December 20, 2022
    Publication date: June 29, 2023
    Inventors: Pei-Kuen WEI, Sheng-Hann WANG, Ting-Wei CHANG
  • Patent number: 11609496
    Abstract: The present invention provides a method for forming a patterned polyimide layer with the use of a positive photoresist composition. The composition comprises a cresol-type novolac resin, a diazonaphthoquinone-based sensitizer and an organic solvent; based on the cresol-type novolac resin with a total amount of 100 parts by weight, the amount of the diazonaphthoquinone-based sensitizer ranges from 40 parts to 60 parts by weight, the amount of the free cresol in the cresol-type novolac resin is lower than 2 parts by weight, and the alkaline dissolution rate (ADR) of the cresol-type novolac resin in an aqueous solution of 3.5 wt % to 7 wt % tetramethylammonium hydroxide is lower than 285 ?/s. The positive photoresist composition has excellent chemical resistance to the polyimide stripper, and can specifically improve the protective ability of the photoresist layer to the low-dielectric polyimide layer, thereby optimizing the manufacturing process and quality of the patterned polyimide layer.
    Type: Grant
    Filed: June 23, 2020
    Date of Patent: March 21, 2023
    Assignee: ECHEM SOLUTIONS CORP.
    Inventors: Ting-Wei Chang, Ming-Che Chung
  • Publication number: 20230040348
    Abstract: A circuit module with improved line load, may comprise a first line, a first switch, a second line, a second switch and a second driver. The first switch may be on and off to conduct and stop conducting between the first line and a first node. The second switch may be on and off to conduct and stop conducting between the second line and the first node. The second driver, coupled to the second line, may be enabled to drive the second line according to a voltage of a second node, and may be disabled to stop driving the second line. The voltage of the second node may be controlled by a voltage of the first node. When the first switch is on, the second switch may be off. When the second switch is off, the second driver may be enabled.
    Type: Application
    Filed: November 9, 2021
    Publication date: February 9, 2023
    Inventors: Nan-Chun LIEN, Li-Wei CHU, Ting-Wei CHANG
  • Patent number: 11474632
    Abstract: A touchpad module including a light guide plate, a circuit board, a light source, a reflective layer, a thin film, a touch substrate, a cover, and a low light-transmission layer is provided. The light source is disposed on one side of the incident surface of the light guide plate. The thin film overlaps a light-exit surface, a distant surface, and a bottom surface of the light guide plate, and has a first end side and a second end side. The first end side is fixed to a side edge area of the light-exit surface. The second end side is fixed to the reflective layer. The cover is located on one side of the light-exit surface of the light guide plate. The thin film is located between the cover and the light guide plate. The low light-transmission layer is disposed on one side of the cover facing the light guide plate.
    Type: Grant
    Filed: October 5, 2021
    Date of Patent: October 18, 2022
    Assignee: Chicony Power Technology Co., Ltd.
    Inventors: Hsuan-Wei Ho, Wen-Yen Wang, Ting-Wei Chang
  • Patent number: 11220680
    Abstract: The present disclosure provides a polypeptide including an anti-fibrin antibody and a serine protease moiety of human tissue plasminogen activator. Methods for treating thrombosis in a subject in need of such treatment using such polypeptide are also disclosed.
    Type: Grant
    Filed: November 21, 2019
    Date of Patent: January 11, 2022
    Assignee: IMMUNWORK INC.
    Inventors: Tse-Wen Chang, Hsing-Mao Chu, Wei-Ting Tian, Ting-Wei Chang, Ming-Yu Hsieh
  • Patent number: 11195090
    Abstract: A memory unit is controlled by a word line, a reference voltage and a bit-line clamping voltage. A non-volatile memory cell is controlled by the word line and stores a weight. A clamping module is electrically connected to the non-volatile memory cell via a bit line and controlled by the reference voltage and the bit-line clamping voltage. A clamping transistor of the clamping module is controlled by the bit-line clamping voltage to adjust a bit-line current. A cell detector of the clamping module is configured to detect the bit-line current to generate a comparison output according to the reference voltage. A clamping control circuit of the clamping module switches the clamping transistor according to the comparison output and the bit-line clamping voltage. When the clamping transistor is turned on by the clamping control circuit, the bit-line current is corresponding to the bit-line clamping voltage multiplied by the weight.
    Type: Grant
    Filed: August 6, 2020
    Date of Patent: December 7, 2021
    Assignee: NATIONAL TSING HUA UNIVERSITY
    Inventors: Meng-Fan Chang, Cheng-Xin Xue, Je-Syu Liu, Ting-Wei Chang, Tsung-Yuan Huang, Hui-Yao Kao
  • Patent number: 11182006
    Abstract: An illuminated touch panel includes a backlight assembly and a cover plate. The backlight assembly includes a light guide plate, and an outer stop. The light guide plate includes a plurality of bar portions and a connecting portion. The plurality of bar portions are separated from each other and arranged side by side. Each of the bar portions includes a pattern dot region, a connecting end and a light entrance end. There is a narrow slot between any two adjacent bar portions. The long axis direction of each of the extending dot regions of the connecting portion is substantially parallel to the length direction of each of the narrow slots. The plurality of light blocking bars of the outer stop are arranged side by side and fitted with the plurality of narrow slots. The cover plate includes a plurality of window regions corresponding to the plurality of pattern dot regions.
    Type: Grant
    Filed: November 13, 2020
    Date of Patent: November 23, 2021
    Assignee: CHICONY POWER TECHNOLOGY CO., LTD.
    Inventors: Hsuan-Wei Ho, Ting-Wei Chang