Abstract: A MRAM circuit structure is provided in the present invention, with the unit cell composed of three transistors in series and four MTJs, wherein the junction between first transistor and third transistor is first node, the junction between second transistor and third transistor is second node, and the other ends of first transistor and third transistor are connected to a common source line. First MTJ is connected to second MTJ in series to form a first MTJ pair that connecting to the first node, and third MTJ is connected to fourth MTJ in series to form a second MTJ pair that connecting to the second node.

Abstract: The present invention provides a motion detecting system, which includes a light source module, a plurality of image sensors and a control unit. The light source module illuminates at least one object. The image sensors respectively detect the object under the light emitted by the light source module to generate a plurality of detection results. The control unit is coupled to the image sensors, and generates a control command according to the detection results.

Abstract: A deep learning fault diagnosis method includes the following steps: a fault diagnosis data set X is processed based on sliding window processing, to obtain a picture-like sample data set {tilde over (X)}, and obtain an attention matrix A of the picture-like sample data set {tilde over (X)}; and a 2D-CNN model is constructed to process the picture-like sample data set {tilde over (X)} to obtain a corresponding feature map F, and in the meantime, the feature map F is processed based on channel-oriented average pooling and channel-oriented maximum pooling to obtain an output P1 of the average pooling and an output P2 of the maximum pooling, and a weight matrix W is obtained based on the attention matrix A, the output P1 of the average pooling, and the output P2 of the maximum pooling, so that an output of the model is a feature map {tilde over (F)} based on an attention mechanism, where {tilde over (F)}=WF.

Abstract: The present application provides an adapting sheet, a battery cell, a battery, and an electric apparatus. The adapting sheet includes a pole connection portion, a tab connection portion, and a bending portion. In a first direction, two sides of the pole connection portion are respectively connected to the tab connection portion through the bending portion. In a second direction, a height difference is formed between the pole connection portion and the tab connection portion, and the first direction is non-parallel to the second direction. The adapting sheet in the present disclosure is applied in the battery cell, so that the tab may be disposed at both sides of the pole in a width direction of the cell.

Abstract: Disclosed are a lithium aluminum hydrotalcite-based solid electrolyte film, a preparation method and use thereof, and a lithium battery including the same. The lithium aluminum hydrotalcite-based solid electrolyte film includes: a solid electrolyte film substrate formed by an organic polymer, and a lithium salt and a lithium aluminum hydrotalcite uniformly dispersed in the solid electrolyte film substrate, wherein the lithium aluminum hydrotalcite has a content of 50 wt % to 80 wt %, based on a total mass of the solid electrolyte film substrate after removal of the lithium salt; and the organic polymer includes one or more selected from the group consisting of polyethylene glycol diacrylate, polyethylene oxide, polypropylene carbonate, and polyvinylidene fluoride-hexafluoropropylene copolymer.

Abstract: A full-automatic detection apparatus and system for important zoonotic pathogen, and a control method therefor. The full-automatic detection apparatus for important zoonotic pathogen includes: a base capable of moving; an air collection device, configured to collect a to-be-detected sample in air along with the movement of the base; a nucleic acid detection and analysis device, configured to detect the to-be-detected sample collected by the air collection device to determine whether an infectious pathogen exists in the to-be-detected sample; an intelligent mobile device, configured to plan and control a moving path of the base; and a control device, configured to control the intelligent mobile device to plan and control the moving path of the base and to control a sampling period of the air collection device according to a control instruction of the terminal, and transmit a detection result from the nucleic acid detection and analysis device to the terminal.

Abstract: The present disclosure relates to a semiconductor device and a manufacturing method of fabricating a semiconductor structure. The method includes forming an opening in a substrate and depositing a conformal metal layer in the opening. The depositing includes performing one or more deposition cycles. The deposition includes flowing a first precursor into a deposition chamber and purging the deposition chamber to remove at least a portion of the first precursor. The method also includes flowing a second precursor into the deposition chamber to form a sublayer of the conformal metal layer and purging the deposition chamber to remove at least a portion of the second precursor. The method further includes performing a metallic halide etching (MHE) process that includes flowing a third precursor into the deposition chamber.

Abstract: A pre-charge system includes a pre-charge circuit and a timing controller circuit. The pre-charge circuit performs time-division pre-charge upon a plurality of bit-line groups of a memory array according to a plurality of pre-charge timing control signals, wherein the memory array includes a plurality of memory cells each coupled to one of the plurality of bit-line groups. The timing controller circuit generates and outputs the plurality of pre-charge timing control signals to the pre-charge circuit.

Abstract: A method includes forming a contact spacer on a sidewall of an inter-layer dielectric, wherein the contact spacer encircles a contact opening, forming a silicide region in the opening and on a source/drain region, depositing an adhesion layer extending into the contact opening, and performing a treatment process, so that the contact spacer is treated. The treatment process is selected from the group consisting of an oxidation process, a carbonation process, and combinations thereof. The method further includes depositing a metal barrier over the adhesion layer, depositing a metallic material to fill the contact opening, and performing a planarization process to remove excess portions of the metallic material over the inter-layer dielectric.

Abstract: A common mode filter includes a first iron core, a second iron core, a first coil, and a second coil. The first iron core includes two first electrode portions and two second electrode portions. The second iron core is disposed above the first iron core, and the first iron core and the second iron core are adhered to each other. All surfaces of the second iron core are coated with an insulating layer. The first coil is wound around the first iron core and the second iron core. The second coil is wound around the first iron core and the second iron core.

Abstract: An integrated circuit includes an error amplifier having a reference input, a feedback input, and an error output. A comparator has first and second comparator inputs and a comparator output. The first comparator input is coupled to the error output. A control circuit has a control input and a control output. The control input is coupled to the comparator output. The compensation circuit has a compensation control input and a compensation output. The compensation control input is coupled to the control output. The compensation output is coupled to at least one of the reference input, the feedback input, or the error output.

Abstract: Fucan-low endotoxin compositions comprising a therapeutically effective, medically acceptable fucan in a composition comprising less than about 0.2. 0.18. 0.1. 0.01. 0.001. or 0.0005 endotoxin units (EU) per milligram of the fucan.

Abstract: The present invention belongs to the field of nanomedicine, and provides a DC biomimetic membrane nanoparticle loaded with an NIR-II AIE dye, a preparation method therefor and use thereof. The DC biomimetic membrane nanoparticle loaded with the NIR-II AIE dye comprises a DC membrane and an NIR-II AIE dye loaded therein, wherein the NIR-II AIE dye has photothermal characteristics. The DC biomimetic membrane nanoparticle loaded with the NIR-II AIE dye provided by the present invention not only solves the problem that the NIR-II AIE dye is poor in water solubility and limited in fluorescence imaging, but also increases the enrichment efficiency of the NIR-II AIE dye coated by the DC membrane at a tumor site and successfully activates the activity of T cells in vivo.

Abstract: Systems and methods for thermal treatment of a workpiece are provided. In one example, a method for conducting a treatment process on a workpiece, such as a thermal treatment process, an annealing treatment process, an oxidizing treatment process, or a reducing treatment process in a processing apparatus is provided. The processing apparatus includes a plasma chamber and a processing chamber. The plasma chamber and the processing chamber are separated by a plurality of separation grids or grid plates. The separation grids or grid plates operable to filter ions generated in the plasma chamber. The processing chamber has a workpiece support operable to support a workpiece.

Abstract: A wireless access method includes the following steps. An access point obtains a personal identification number of a terminal device and broadcasts a beacon. The access point performs a terminal device authentication on a vendor specific information element of a probe request from the terminal device according to the personal identification number. When the terminal device authentication is successful, the access point performs a key calculation according to the personal identification number and the probe request to generate a pairwise transient key, a key encryption key and a group transient key and uses the key encryption key to encrypt a pre-shared key and the group transient key. The access point transmits a probe response to the terminal device. The access point installs the pairwise transient key and the group transient key to establish an encrypted transmission.

Abstract: A semiconductor device includes an active region over a substrate extending along a first lateral direction. The semiconductor device includes a number of first conductive structures operatively coupled to the active region. The first conductive structures extend along a second lateral direction. The semiconductor device includes a number of second conductive structures disposed above the plurality of first conductive structures. The second conductive structures extend along the first lateral direction. The semiconductor device includes a first capacitor having a first electrode and a second electrode. The first electrode includes one of the first conductive structures and the active region, and the second electrode includes a first one of the second conductive structures. Each of the active region and the first conductive structures is electrically coupled to a power rail structure configured to carry a supply voltage.

Abstract: A method for forming a semiconductor memory structure include forming a pillar structure. The pillar structure includes a first conductive layer, a second conductive layer and a data storage material layer between the first and second conducive layers. A sidewall of the first conductive layer, a sidewall of the data storage layer and a sidewall of the second conductive layer are exposed. An oxygen-containing plasma treatment is performed on the pillar structure to form hydrophilic surfaces of the sidewall of the first conductive layer, the sidewall of the data storage layer and the sidewall of the second conductive layer. An encapsulation layer is formed over the pillar structure and the dielectric layer. The encapsulation layer is in contact with the hydrophilic surfaces of the sidewall of the first conductive layer, the sidewall of the data storage layer and the sidewall of the second conductive layer.

Abstract: A display panel includes a plurality of pixel units. At least one pixel unit includes a display region and an anti-peep region. The anti-peep region includes a first light-blocking layer and a second light-blocking layer. The first light-blocking layer is on a side of the second light-blocking layer facing a light-exiting surface of the display panel. Along a direction perpendicular to the light-exiting surface of the display panel, a distance between the first light-blocking layer and the second light-blocking layer is greater than zero. Along a fifth direction, the first light-blocking layer includes a plurality of first light-blocking strips and a plurality of first openings. A first opening is arranged between two neighboring first light-blocking strips. The fifth direction is parallel to the light-exiting surface of the display panel. Along the fifth direction, the second light-blocking layer includes a plurality of second light-blocking strips and a plurality of second openings.

Abstract: An electronic package is provided, and the manufacturing method of which is to form a plurality of conductive pillars and dispose an electronic element on a first circuit structure, then cover the plurality of conductive pillars and the electronic element with a cladding layer, and then form a second circuit structure on the cladding layer, so that the plurality of conductive pillars are electrically connected to the first circuit structure and the second circuit structure, and the electronic element is electrically connected to the first circuit structure, where a fan-out redistribution layer is configured in the first circuit structure and the second circuit structure, and at least one ground layer is configured in the second circuit structure. Further, the ground layer includes a plurality of sheet bodies arranged in an array, so that at least one slot is disposed between every two adjacent sheet bodies.

Abstract: In an embodiment, a pattern transfer processing chamber includes a pattern transfer processing chamber and a loading area external to the pattern transfer processing chamber. The loading area is configured to transfer a wafer to or from the pattern transfer processing chamber. The loading area comprises a first region including a loadport, a second region including a load-lock between the first region and the pattern transfer processing chamber, and an embedded baking chamber configured to heat a patterned photoresist on the wafer.