Patents by Inventor Ting Yang

Ting Yang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250064872
    Abstract: Disclosed are a strain of Lactobacillus helveticus capable of removing multiple heavy metals and an application thereof in milk powder, where the strain is Lactobacillus helveticus KD-3, which is deposited in the China Center for Type Culture Collection on Apr. 6, 2023, with a deposit number of CCTCC NO: M2023479. The Lactobacillus helveticus KD-3 has a cadmium resistant gene czcD, a chromium resistant gene chrA and a lead resistant gene pbrT, and is capable of tolerating single and compound heavy metals (cadmium, chromium and lead). The Lactobacillus helveticus KD-3 of the present disclosure is used to prepare lyophilized bacterial powder.
    Type: Application
    Filed: August 20, 2024
    Publication date: February 27, 2025
    Applicant: SHAANXI UNIVERSITY OF SCIENCE AND TECHNOLOGY
    Inventors: Guowei SHU, Ke ZHANG, Huan LEI, Qisheng Hu, Guanli DU, Qiqi ZHENG, Guoliang LI, Qinfeng XU, Chunji DAI, Ting LI, Wenjing HU, Lihao XU, Chaowei YANG, Jie QIAO
  • Publication number: 20250066793
    Abstract: Disclosed herein are novel single-stranded anti-sense oligonucleotides (ASOs) capable of reducing the transcription of thioredoxin domain containing protein 5 (TXNDC5) mRNA. Also disclosed is use of the single-stranded ASOs as disclosed herein for manufacturing medicaments suitable for treating a disease associated with upregulation of TXNDC5. Accordingly, a pharmaceutical composition comprising the disclosed ASO molecules is provided; as well as a method of treating a subject suffering from TXNDC5-mediated disease via administering to the subject the disclosed single-stranded ASO molecules.
    Type: Application
    Filed: December 28, 2022
    Publication date: February 27, 2025
    Inventors: Ying-Shuan LAILEE, Chia-Wei LIU, Chi-Tang WANG, Pei-Yi TSAI, Chung-Hsiun WU, King LAM, Wei-Ting SUN, Kai-Chien YANG, Hung-Jyun HUANG
  • Publication number: 20250064345
    Abstract: A gait evaluating system including a processor is provided. The processor identifies whether a gait type of the user belongs to a normal gait, a non-neuropathic gait or a neuropathic gait based on step feature values of a user and walking limb feature values of the user. In response to that the gait type of the user belongs to the non-neuropathic gait, the processor controls the display panel to display a first auxiliary information, a second auxiliary information, and a third auxiliary information. The first auxiliary information indicates a potential sarcopenia of the user. The second auxiliary information indicates a dietary guideline for muscle building and muscle strengthening. The third auxiliary information shows a motion instruction video for regaining or maintaining muscle strength of the user.
    Type: Application
    Filed: October 18, 2024
    Publication date: February 27, 2025
    Applicant: Industrial Technology Research Institute
    Inventors: Je-Ping Hu, Keng-Hsun Lin, Shih-Fang Yang Mao, Pin-Chou Li, Jian-Hong Wu, Szu-Ju Li, Hui-Yu Cho, Yu-Chang Chen, Yen-Nien Lu, Jyun-Siang Hsu, Nien-Ya Lee, Kuan-Ting Ho, Ming-Chieh Tsai, Ching-Yu Huang
  • Publication number: 20250071935
    Abstract: A heat dissipation assembly is disclosed and includes a fan, a vapor chamber and a heat dissipation fin set. The fan includes a fan frame, an impeller and a fan cover. The impeller is disposed on the fan frame and accommodated in an accommodation space. The impeller includes plural metal blades and a hub, and the plural metal blades are radially arranged on the periphery of the hub to form a dense-metal-blade impeller. The fan cover is assembled with the fan frame to form an outlet, and the fan cover includes an inlet. The vapor chamber includes an upper plate and a lower plate assembled with each other. The upper plate or the lower plate is connected to the fan cover, and the vapor chamber and the fan cover are coplanar. The heat dissipation fin set is connected to the lower plate and spatially corresponding to the outlet.
    Type: Application
    Filed: November 12, 2024
    Publication date: February 27, 2025
    Inventors: Chin-Ting Chen, Chih-Wei Yang, Shu-Cheng Yang, Che-Wei Chang, Wen-Cheng Huang, Chin-Hung Lee, Chih-Wei Chan
  • Publication number: 20250072007
    Abstract: A MRAM layout structure with multiple unit cells, including a first word line, a second word line and a third word line extending through active areas, wherein two ends of a first MTJ are connected respectively to a second active area and one end of a second MTJ, and two ends of a third MTJ are connected respectively to a third active area and one end of a fourth MTJ, and a first bit line and a second bit line connected respectively to the other end of the second MTJ and the other end of the fourth MTJ.
    Type: Application
    Filed: November 13, 2024
    Publication date: February 27, 2025
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Yi-Ting Wu, Cheng-Tung Huang, Jen-Yu Wang, Yung-Ching Hsieh, Po-Chun Yang, Jian-Jhong Chen, Bo-Chang Li
  • Patent number: 12235615
    Abstract: A static auto-tuning system and method for controlling operation of a motor in a system. A speed reference signal is generated resulting in a speed response of the motor. Closed-loop feedback magnifies the rotating friction effect to an observable level. Inertia and rotating friction coefficient values of the system are estimated based on the speed frequency response and a virtual damping coefficient. A fixed low frequency speed signal may result in a first frequency response function for determining virtual damping, and a variable frequency excitation signal may result in a second frequency response function for determining the inertia and rotating friction characteristics. Closed-loop gains are determined based on these characteristics. The excitation signal may be sampled and a peak value in each interval may be identified and stored to produce an envelope of peak values for determining the gain response. Operation of the motor is controlled using the determined gains.
    Type: Grant
    Filed: October 14, 2022
    Date of Patent: February 25, 2025
    Inventors: Athanasios Sarigiannidis, Bo-Ting Lyu, Yi-Chieh Chen, Shih-Chin Yang
  • Patent number: 12237949
    Abstract: A communication receiver includes a first signal processing circuit and a second signal processing circuit. The first signal processing circuit includes a first feedforward equalizer and a decision circuit. The first feedforward equalizer processes a received signal to generate a first equalized signal. The decision circuit performs hard decision upon the first equalized signal to generate a first symbol decision signal. The second signal processing circuit includes a second feedforward equalizer, a decision feedforward equalizer, and a first decision feedback equalizer. The second feedforward equalizer processes the first equalized signal to generate a second equalized signal. The decision feedforward equalizer processes the first symbol decision signal to generate a third equalized signal. The first decision feedback equalizer generates a second symbol decision signal according to the second equalized signal and the third equalized signal.
    Type: Grant
    Filed: September 18, 2023
    Date of Patent: February 25, 2025
    Assignee: MEDIATEK INC.
    Inventors: Chung-Hsien Tsai, Che-Yu Chiang, Yu-Ting Liu, Tsung-Lin Lee, Chia-Sheng Peng, Ting-Ming Yang
  • Patent number: 12237218
    Abstract: A method of fabricating a contact structure includes the following steps. An opening is formed in a dielectric layer. A conductive material layer is formed within the opening and on the dielectric layer, wherein the conductive material layer includes a bottom section having a first thickness and a top section having a second thickness, the second thickness is greater than the first thickness. A first treatment is performed on the conductive material layer to form a first oxide layer on the bottom section and on the top section of the conductive material layer. A second treatment is performed to remove at least portions of the first oxide layer and at least portions of the conductive material layer, wherein after performing the second treatment, the bottom section and the top section of the conductive material layer have substantially equal thickness.
    Type: Grant
    Filed: May 6, 2022
    Date of Patent: February 25, 2025
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chang-Ting Chung, Shih-Wei Yeh, Kai-Chieh Yang, Yu-Ting Wen, Yu-Chen Ko, Ya-Yi Cheng, Min-Hsiu Hung, Chun-Hsien Huang, Wei-Jung Lin, Chih-Wei Chang, Ming-Hsing Tsai
  • Publication number: 20250059574
    Abstract: A method for preparing (2S,3R)-p-methylsulfonylphenylserine is provided. In order to solve the existing problem of low conversion rate, provided is a method for preparing (2S,3R)-p-methylsulfonylphenylserine, including carrying out a reaction between p-methylsulfonylbenzaldehyde, L-threonine and pyridoxal phosphate in an oxygen-containing environment under the combined action of transaldolase and acetaldehyde oxidase to obtain a product (2S,3R)-p-methylsulfonylphenylserine. The method can effectively achieve the effect of improving the conversion rate of the reaction and has the advantage of high product yield.
    Type: Application
    Filed: August 5, 2024
    Publication date: February 20, 2025
    Applicants: TAIZHOU UNIVERSITY, Taizhou Lingfeng Biotechnology Co., Ltd.
    Inventors: Zhongyi YANG, Shaoyang ZHANG, Yi WEI, Kun CHENG, Jieyang LU, Ting YANG, Weijin HUANG, Qingfeng CAI
  • Publication number: 20250060558
    Abstract: An optical image capturing lens includes a first lens positioning unit, an imaging lens assembly, and a light entrance member. An interior of the first lens positioning unit is hollow, and the first lens positioning unit is made of an opaque material. The imaging lens assembly is installed within the first lens positioning unit. The imaging lens assembly includes a lens and an image plane. The lens defines a maximum effective diameter at an optical effective area. The light entrance member is made of an opaque material and installed within the first lens positioning unit. The light entrance member surrounds an optical axis. The light entrance member has a light entrance hole facing the first optical effective area of the lens to allow the optical axis to pass through, wherein a diameter of the light entrance hole is smaller than or equal to the maximum effective diameter of the lens.
    Type: Application
    Filed: March 13, 2024
    Publication date: February 20, 2025
    Applicant: Ability Opto-Electronics Technology Co., Ltd.
    Inventors: Ya-Ting Yang, Chien-Hsun Lai
  • Publication number: 20250061752
    Abstract: A remote diagnosis method, performed by a vehicle to be diagnosed, includes receiving a remote control instruction sent by a server, in which the remote control instruction corresponds to a diagnosis category, and the remote control instruction is configured to instruct the vehicle to be diagnosed to execute a target test script corresponding to the remote control instruction; executing the target test script based on a preset diagnostic engine; diagnosing an execution result of the target test script based on the preset diagnosis engine; and reporting a diagnostic result of the target test script to the server.
    Type: Application
    Filed: December 27, 2022
    Publication date: February 20, 2025
    Inventor: Ting YANG
  • Patent number: 12224739
    Abstract: A fast-transient buffer is shown. The fast-transient buffer has a flipped voltage follower coupled between the input terminal and the output terminal of the fast-transient buffer, and a first MOS transistor coupled to the flipped voltage follower as well as the output terminal of the fast-transient buffer. The first MOS transistor regulates the output voltage of the output terminal of the fast-transient buffer, in the opposite direction in comparison with an output voltage regulation direction due to the flipped voltage follower.
    Type: Grant
    Filed: April 13, 2023
    Date of Patent: February 11, 2025
    Assignee: MEDIATEK INC.
    Inventors: Yueh-Min Chen, Ting-Yang Wang, Yu-Hsin Lin, Wen-Chieh Wang
  • Publication number: 20250047311
    Abstract: In some examples, the disclosure describes an electronic device with a processing resource and a memory resource storing computer-readable instructions executable by the processing resource to determine a wireless metric associated with a first wireless signal path utilizing concurrent dual wireless bands between an access point and the electronic device and alter the first wireless signal path to a second wireless signal path that utilizes a single band between the access point and the electronic device.
    Type: Application
    Filed: December 17, 2021
    Publication date: February 6, 2025
    Applicant: Hewlett-Packard Development Company, L.P.
    Inventors: Cheng-Fang Lin, Huai-Yung Yen, Ruei-Ting Lin, Ren-Hao Chen, Lo-Chun Tung, Yao-Cheng Yang
  • Publication number: 20250046344
    Abstract: The present disclosure relates to a method, apparatus, device, storage medium and program product for processing multimedia data. The method comprises: acquiring first multimedia draft data, wherein the first multimedia draft data is generated based on a segmented recording operation, video materials collected by the segmented recording operation being used to form video track segments in the first multimedia draft data; importing the first multimedia draft data into a first editor, so that the video track segments are displayed on a video editing track of the first editor; updating the first multimedia draft data in response to triggering a video editing operation for the video track segments on the first editor, to obtain second multimedia draft data; and generating a target video based on the second multimedia draft data in response to a trigger operation of video synthesis.
    Type: Application
    Filed: October 22, 2024
    Publication date: February 6, 2025
    Inventors: Zhanpeng HUANG, Guangde HUANG, Hengan WU, Rongtao YANG, Ting LUO, Yihan YANG, Xuyue HAN
  • Publication number: 20250048581
    Abstract: A system for assembling a riser cage bracket is disclosed. The system includes a riser cage body, a first riser cage window, and a second riser cage window. The first and second riser cage windows are configured to be interchangeably and removably connectable to the riser cage body to assemble the riser cage bracket. The first riser cage window is configured to, when connected to the riser cage body, define a first space between the riser cage body and the first riser cage window to receive a full-height expansion card detachably coupled to the riser cage bracket. The second riser cage window is configured to, when connected to the riser cage body, define a second space between the riser cage body and the second riser cage window to receive a low-profile expansion card detachably coupled to the riser cage bracket.
    Type: Application
    Filed: August 2, 2023
    Publication date: February 6, 2025
    Inventors: Peng ChiangHsieh, Yi-Lung Chou, Chi-Ting Yang
  • Patent number: 12218684
    Abstract: The present invention relates to a layered semi-parallel LDPC decoder system having a single permutation network, and belongs to the field of decoder hardware design. The system comprises a layered decoding architecture of the single permutation network, a layered semi-parallel decoding architecture of the single permutation network, a pipeline design for layered semi-parallel decoding and a hardware framework of a layered semi-parallel LDPC decoder. The present invention removes a permutation network module between a check node and a variable node by modifying the cyclic shift value of each information block transferred from the variable node to the check node, i.e., the cyclic shift operation of the decoder can be completed through the single permutation network so as to reduce hardware resources of the decoder. A semi-parallel decoding structure is adopted, and meanwhile, a pipeline is added between half layers.
    Type: Grant
    Filed: November 15, 2021
    Date of Patent: February 4, 2025
    Assignee: Chongqing University Of Posts And Telecommunications
    Inventors: Hongsheng Zhang, Taiyun Ding, Ting Liu, Hong Yang, Yi Huang, Weizhong Chen, Qi Wang, Xi Wang
  • Patent number: 12219879
    Abstract: A method includes forming Magnetic Tunnel Junction (MTJ) stack layers, which includes depositing a bottom electrode layer; depositing a bottom magnetic electrode layer over the bottom electrode layer; depositing a tunnel barrier layer over the bottom magnetic electrode layer; depositing a top magnetic electrode layer over the tunnel barrier layer; and depositing a top electrode layer over the top magnetic electrode layer. The method further includes patterning the MTJ stack layers to form a MTJ; and performing a passivation process on a sidewall of the MTJ to form a protection layer. The passivation process includes reacting sidewall surface portions of the MTJ with a process gas comprising elements selected from the group consisting of oxygen, nitrogen, carbon, and combinations thereof.
    Type: Grant
    Filed: November 28, 2023
    Date of Patent: February 4, 2025
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Tai-Yen Peng, Yu-Shu Chen, Sin-Yi Yang, Chen-Jung Wang, Chien Chung Huang, Han-Ting Lin, Jyu-Horng Shieh, Qiang Fu
  • Publication number: 20250038088
    Abstract: An electronic package is provided, and the manufacturing method of which is to form a plurality of conductive pillars and dispose an electronic element on a first circuit structure, then cover the plurality of conductive pillars and the electronic element with a cladding layer, and then form a second circuit structure on the cladding layer, so that the plurality of conductive pillars are electrically connected to the first circuit structure and the second circuit structure, and the electronic element is electrically connected to the first circuit structure, where a fan-out redistribution layer is configured in the first circuit structure and the second circuit structure, and at least one ground layer is configured in the second circuit structure. Further, the ground layer includes a plurality of sheet bodies arranged in an array, so that at least one slot is disposed between every two adjacent sheet bodies.
    Type: Application
    Filed: October 8, 2024
    Publication date: January 30, 2025
    Inventors: Ting-Yang Chou, Yih-Jenn Jiang, Don-Son Jiang
  • Patent number: 12204163
    Abstract: An optical system affixed to an electronic apparatus is provided, including a first optical module, a second optical module, and a third optical module. The first optical module is configured to adjust the moving direction of a first light from a first moving direction to a second moving direction, wherein the first moving direction is not parallel to the second moving direction. The second optical module is configured to receive the first light moving in the second moving direction. The first light reaches the third optical module via the first optical module and the second optical module in sequence. The third optical module includes a first photoelectric converter configured to transform the first light into a first image signal.
    Type: Grant
    Filed: February 5, 2024
    Date of Patent: January 21, 2025
    Assignee: TDK TAIWAN CORP.
    Inventors: Chao-Chang Hu, Chih-Wei Weng, Chia-Che Wu, Chien-Yu Kao, Hsiao-Hsin Hu, He-Ling Chang, Chao-Hsi Wang, Chen-Hsien Fan, Che-Wei Chang, Mao-Gen Jian, Sung-Mao Tsai, Wei-Jhe Shen, Yung-Ping Yang, Sin-Hong Lin, Tzu-Yu Chang, Sin-Jhong Song, Shang-Yu Hsu, Meng-Ting Lin, Shih-Wei Hung, Yu-Huai Liao, Mao-Kuo Hsu, Hsueh-Ju Lu, Ching-Chieh Huang, Chih-Wen Chiang, Yu-Chiao Lo, Ying-Jen Wang, Shu-Shan Chen, Che-Hsiang Chiu
  • Patent number: 12207512
    Abstract: A display may have an array of pixels. Display driver circuitry may supply data and control signals to the pixels. Each pixel may have seven transistors, a capacitor, and a light-emitting diode such as an organic light-emitting diode. The seven transistors may receive control signals using horizontal control lines. Each pixel may have first and second emission enable transistors that are coupled in series with a drive transistor and the light-emitting diode of that pixel. The first and second emission enable transistors may be coupled to a common control line or may be separately controlled so that on-bias stress can be effectively applied to the drive transistor. The display driver circuitry may have gate driver circuits that provide different gate line signals to different rows of pixels within the display. Different rows may also have different gate driver strengths and different supplemental gate line loading structures.
    Type: Grant
    Filed: November 17, 2023
    Date of Patent: January 21, 2025
    Assignee: Apple Inc.
    Inventors: Cheng-Ho Yu, Chin-Wei Lin, Shyuan Yang, Ting-Kuo Chang, Tsung-Ting Tsai, Warren S. Rieutort-Louis, Shih-Chang Chang, Yu Cheng Chen, John Z. Zhong