Abstract: Provided is a device with a replacement spacer structure and a method for forming such a structure. The method includes forming an initial spacer structure, wherein the initial spacer structure has an initial etch rate for a selected etchant. The method further includes removing a portion of the initial spacer structure, wherein a remaining portion of the initial spacer structure is not removed. Also, the method includes forming a replacement spacer structure adjacent to the remaining portion of the initial spacer structure to form a combined spacer structure, wherein the combined spacer structure has an intermediate etch rate for the selected etchant that is less than the initial etch rate for a selected etchant. Further, the method includes etching the combined spacer structure with the selected etchant to form a final spacer structure.

Abstract: A method (of forming a semiconductor device) including forming cell regions (in alternating first and second rows having first and second heights) including forming a majority of the cell regions in the first rows including: limiting a height of the majority of the cell regions to be single-row cell regions that span corresponding single one of the first rows but do not extend therebeyond; and forming a minority of the cell regions correspondingly in at least the first rows including reducing widths of the multi-row cell regions to be smaller than comparable single-row cell regions; and expanding heights of the minority of the cell regions to be multi-row cell regions, each of the multi-row cell regions spanning a corresponding single first row and at least a corresponding second row such that cell region densities of the second rows are at least about forty percent.

Abstract: A method (of manufacturing conductors for a semiconductor device) includes: forming active regions (ARs) in a first layer, the ARs extending in a first direction; forming a conductive layer over the first layer; forming first, second and third caps over the conductive layer, the caps extending in a second direction perpendicular to the first direction, and the caps having corresponding first, second and third sensitivities that are different from each other; removing portions of the conductive layer not under the first, second or third caps resulting in gate electrodes under the first caps and first and second drain/source (D/S) electrodes correspondingly under the second or third caps; and selectively removing portions of corresponding ones of the first D/S electrodes and the second D/S electrodes.

Abstract: Examples of a probe for microwave ablation are disclosed. The probe comprises a feed coaxial cable and an antenna that has a cylindrical outer housing with a predetermined diameter and a predetermined length defining a cavity therein and a radiating conductor positioned within the cavity with a matching stepped portion. The antenna further comprises a dielectric material placed in the cavity between the radiating conductor and the outer housing of the antenna to increase the mechanical strength of the probe as well as to improve the power coupling to the tissue to be ablated. The design of the coaxial cavity of the antenna with radiating conductor with a stepped portion fitted into dielectric materials increases antenna's mechanical strength to withstand higher temperatures and reduces an energy reflected back to the feed coaxial cable due to a good impedance match between the antenna and the feed cable such that antennas with smaller length can be used to fit curved paths.

Abstract: When a driving circuit of an anti-fuse memory device programs a selected anti-fuse memory cell, voltage differences between unselected bit lines and unselected anti-fuse control lines would be eliminated or decreased to an acceptable value by floating unselected anti-fuse control lines or by applying a second control line voltage to the unselected anti-fuse control lines. Leakage currents flowing from unselected bit lines through ruptured anti-fuse transistors of the anti-fuse memory device to the unselected anti-fuse control lines would be decreased or eliminated, and program disturbance would be avoided.

Abstract: A fixing frame for a lamp is provided. The fixing frame is arranged on the lamp, and the lamp for being arranged on a display, and the display has a display surface. The fixing frame includes a first part and a second part. The first part matches the shape of lamp. The second part is connected with the first part to stand upright on the lamp, the second part has a first height in a longitudinal direction of the lamp, and a first surface of the second part is parallel to the display surface.

Abstract: The present invention provides a motion detecting system, which includes a light source module, a plurality of image sensors and a control unit. The light source module illuminates at least one object. The image sensors respectively detect the object under the light emitted by the light source module to generate a plurality of detection results. The control unit is coupled to the image sensors, and generates a control command according to the detection results.

Abstract: A robot cleaner comprises a first light source, an optical sensor, a processing circuit and a second light source. The first light source emits first light. The optical sensor senses first optical data generated according to the first light. The processing circuit computes a height or an overhang height of an obstacle based on the first optical data. The second light source emits second light. The optical sensor senses second optical data generated according to the second light. The processing circuit determines whether the obstacle exists in the predetermined region or not based on the second optical data.

Abstract: An electronic package is provided, and the manufacturing method of which is to form a plurality of conductive pillars and dispose an electronic element on a first circuit structure, then cover the plurality of conductive pillars and the electronic element with a cladding layer, and then form a second circuit structure on the cladding layer, so that the plurality of conductive pillars are electrically connected to the first circuit structure and the second circuit structure, and the electronic element is electrically connected to the first circuit structure, where a fan-out redistribution layer is configured in the first circuit structure and the second circuit structure, and at least one ground layer is configured in the second circuit structure. Further, the ground layer includes a plurality of sheet bodies arranged in an array, so that at least one slot is disposed between every two adjacent sheet bodies.

Abstract: A terminal connection structure includes a terminal and an enameled wire. The terminal includes a socket and a conductor crimping portion. The conductor crimping portion includes a first crimping area and a second crimping area, and the first crimping area and the second crimping area are both U-shaped before crimped. The enameled wire is located in the first crimping area and the second crimping area, wherein the enameled wire includes three conducting wires and an enameled film covering the conducting wires. The first crimping area and the second crimping area are crimped to be in a shape of a semi-circular thereby crimping the three conducting wires tightly. Wherein an outer width of the second crimping area after crimped is W2, an outer diameter of the enameled wire is D, a thickness of the second crimping area is t, and the following condition is satisfied: W2?D×0.8+2t.

Abstract: A conformance testing method including: obtaining a testing symbol pattern in an optical signal; performing equalization compensation on the testing symbol pattern; generating a testing eye pattern; calculating a value of a first parameter based on the testing eye pattern and a noise enhancement coefficient, where the first parameter is used to determine a transmitter dispersion eye pattern closure degree of the optical transmitter; and when the value of the first parameter is less than or equal to a preset threshold, determining that conformance testing on the optical signal succeeds.

Abstract: A crop irrigation method based on a salt leaching fraction disclosed. The method includes: calculating a salt leaching fraction of crops by combining a salt stress and effect of water quality on an irrigation amount of the crops, controlling an irrigation apparatus to perform irrigation and drainage operations by monitoring water and salt in a soil depth corresponding to crop roots, and removing excess salt from the crop roots, thus reducing the salt stress on crop growth, ensuring a crop yield, and reducing waste of water resources while realizing efficient utilization of existing water resources.

Abstract: There is provided a robot including a first light source, a second light source, an image sensor and a processor. The processor is used to calculate an image quality of an image frame captured by the image sensor when the second light source is being turned on. The processor then determines whether to switch the second light source back to the first light source according to the image quality to accordingly identify the material of an operation surface.

Abstract: An auto clean machine comprising: a height computing device; and an obstacle determining device. The height computing device is turned on to compute a height or an overhang height of an obstacle when the obstacle determining device determines the obstacle exists in a predetermined region of the auto clean machine. The height computing device does not compute the height and the overhang height when the obstacle determining device does not determine the obstacle exists in the predetermined region.

Abstract: A game board device is provided for carrying and identifying game pieces that are divided into different piece types. The game board device includes a board, a plurality of optically identifying modules, and a processing module electrically coupled to the optically identifying modules. The optically identifying modules respectively correspond in position to detection regions of the board. Each of the optically identifying modules includes a light emitter that can emit light toward the corresponding detection region and a light receiver that can receive light reflected by the corresponding detection region. When any one of the detection regions is in an unoccupied mode, the corresponding optically identifying module can emit an unoccupied signal. When any one of the detection regions is in an occupied mode, the corresponding optically identifying module enables an identification signal that corresponds to the piece type of the corresponding game piece to be emitted therefrom.

Abstract: A system that generates a layout diagram has a processor that implements a method, the method including: generating first and second conductor shapes; generating first, second and third cap shapes correspondingly over the first and second conductor shapes; arranging a corresponding one of the second conductor shapes to be interspersed between each pair of neighboring ones of the first conductor shapes; generating first cut patterns over selected portions of corresponding ones of the first cap shapes; and generating second cut patterns over selected portions of corresponding ones of the second cap shapes. In some circumstances, the first cut patterns are designated as selective for a first etch sensitivity corresponding to the first cap shapes; and the second cut patterns are designated as selective for a second etch sensitivity corresponding to the second cap shapes.

Abstract: The present disclosure relates to a semiconductor device and a manufacturing method, and more particularly to forming via rail and deep via structures to reduce parasitic capacitances in standard cell structures. Via rail structures are formed in a level different from the conductive lines. The via rail structure can reduce the number of conductive lines and provide larger separations between conductive lines that are on the same interconnect level and thus reduce parasitic capacitance between conductive lines.

Abstract: A high-speed automatic scanning system for interpreting images with AI assistance and method using the same are provided. The system includes a control computer and an image capture platform. Scanning parameters of the image capture platform, including a helically-clockwise or helically-counterclockwise scanning path, is set by the control computer. After the scanning path is selected, the image capture platform aligns a camera to focus on a central block and respectively captures images of the central block's sub-blocks. Until all the blocks have been scanned, the image capture platform repeats the following procedure: moving the focusing position to a next neighboring block according to the scanning path, focusing on the next neighboring block, and capturing images of the sub-blocks of the next neighboring block. The present invention can fast perform scanning, exempted from performing focusing for every image, reducing the cycles and time of focusing.

Abstract: An AI-assisted automatic labeling system and a method thereof are disclosed. The method comprises steps: selecting images from microscopic images as candidate images, using a pre-labeling module to automatically label cells in the candidate images, and dividing the labeled images into training data and verification data; using a training module and the training data to train a basic model; using a verification module to verify and modify the basic model, wherein the verification module respectively verifies at least one cell area and at least one background area of the verification data to converge the basic model and form an automatic labeling model; using the automatic labeling model to automatically label cells in redundant images of the microscopic images. The basic model trained by the present invention can use few labeled images to perform regressive training and verification and then automatically labels the redundant images accurately and efficiently.