Abstract: A semiconductor device includes: a conductive layer M(h) including first and second power grid (PG) segments and first routing segments which are conductive, where h is an integer and h?1; long axes of the first and second PG segments and the first routing segments extending in a first direction; the first and second PG segments being separated in a second direction by a PG gap having a midpoint, the second direction being substantially perpendicular to the first direction. The first routing segments are distributed: between the first and second PG segments; and substantially uniformly in the second direction with respect to the midpoint of the PG gap.

Abstract: A method of generating an ECO-layout of an ECO base cell includes: generating first and second active area patterns and arranging them on opposite sides of a first axis; generating non-overlapping first, second and third conductive patterns and arranging each of them so as to correspondingly overlap the first and second active area patterns; locating the first conductive pattern between the second and third conductive patterns; generating a first cut-pattern which overlaps corresponding central regions of the second, and third conductive patterns; aligning the first cut-pattern relative to the first axis; generating a fourth conductive pattern; locating the fourth conductive pattern over an area bounded by the first cut-pattern; and expanding the fourth conductive pattern to occupy an area which substantially overlaps a first segment of the first conductive pattern and a first segment of one of the second and third conductive patterns, thereby resulting in the ECO-layout.

Abstract: A cell, in a semiconductor device, including: first and second active areas in a semiconductor substrate on opposite sides of the first axis; first, third and fifth, and correspondingly collinear second, fourth and sixth, having long axes in a second direction perpendicular to the first direction; the (A) first, third and fifth, and (B) second, fourth and sixth, conductive structures correspondingly overlapping the second active area; the first and second conductive structures correspondingly being centered between the (C) third and fifth, and (D) fourth and sixth, conductive structures; and a seventh conductive structure; the fourth conductive structure being located over first and second gaps between corresponding ones of the third through sixth, conductive structures; and the fourth conductive structure occupying an area which substantially overlaps one of the first and second conductive structures and a corresponding one of the first and second gaps.

Abstract: An aircraft galley is provided, including a first galley unit that includes meal carts, cabinets and a countertop-height work area and a second galley unit that includes a countertop-height work area and a plurality of deployable crew seats and with the first galley unit defines a crew work/interaction area. A passenger interaction screen is positioned for viewing by passengers boarding the aircraft and passing through the galley into a passenger cabin. A plurality of lavatories are positioned in a like plurality of corners of the galley and having respective major walls positioned at an oblique angle to a longitudinal axis of the aircraft and with respective doors angled away from the crew work/interaction area.

Abstract: An integrated circuit includes a cell that is between a substrate and a supply conductive line and that includes a source region, a contact conductive line, a power conductive line, and a power via. The contact conductive line extends from the source region. The power conductive line is coupled to the contact conductive line. The power via interconnects the supply conductive line and the power conductive line.

Abstract: An intelligent notification device is provided. The intelligent notification device is adapted to communicate with at least one electronic device. The intelligent notification device includes a detecting device and a controller. The detecting device detects a status parameter of at least one user and an enviromental parameter of the electronic device. The controller is electrically connected to the detecting device to control the electronic device to notify one of a plurality of events in an event schedule according to the event schedule and to dynamically adjust a time sequency of the events in the event schedule according to at least one of the enviromental parameter and the status parameter. An intelligent notification method is further provided.

Abstract: An integrated circuit includes a cell that is between a substrate and a supply conductive line and that includes a source region, a contact conductive line, a power conductive line, and a power via. The contact conductive line extends from the source region. The power conductive line is coupled to the contact conductive line. The power via interconnects the supply conductive line and the power conductive line.

Abstract: An intraoperative nerve evaluation device includes a flexible substrate, and a plurality of detection units disposed on the substrate and spaced apart from one another. Each of the detection units includes an electrode and a conductive wire electrically connected to the electrode. When the electrodes are attached to a nerve, a selected one of the electrodes is configured to receive an input signal via the corresponding conductive wire and to transmit the input signal to the nerve, and each of the electrodes other than the selected one is configured to receive from the nerve a response signal associated with the input signal and to transmit the response signal via the corresponding conductive wire.

Abstract: An integrated circuit includes a cell that is between a substrate and a supply conductive line and that includes a source region, a contact conductive line, a power conductive line, and a power via. The contact conductive line extends from the source region. The power conductive line is coupled to the contact conductive line. The power via interconnects the supply conductive line and the power conductive line.

Abstract: A method of generating an ECO-layout of an ECO base cell includes: generating first and second active area patterns and arranging them on opposite sides of a first axis; generating non-overlapping first, second and third conductive patterns and arranging each of them so as to correspondingly overlap the first and second active area patterns; locating the first conductive pattern between the second and third conductive patterns; generating a first cut-pattern which overlaps corresponding central regions of the second, and third conductive patterns; aligning the first cut-pattern relative to the first axis; generating a fourth conductive pattern; locating the fourth conductive pattern over an area bounded by the first cut-pattern; and expanding the fourth conductive pattern to occupy an area which substantially overlaps a first segment of the first conductive pattern and a first segment of one of the second and third conductive patterns, thereby resulting in the ECO-layout.

Abstract: A method of manufacturing a solar cell, including providing a patterned silicon wafer having a covered area and an uncovered area, and forming at least one electrode layer in the uncovered area in a low-temperature process.

Abstract: An aircraft galley is provided, including a first galley unit that includes meal carts, cabinets and a countertop-height work area and a second galley unit that includes a countertop-height work area and a plurality of deployable crew seats and with the first galley unit defines a crew work/interaction area. A passenger interaction screen is positioned for viewing by passengers boarding the aircraft and passing through the galley into a passenger cabin. A plurality of lavatories are positioned in a like plurality of corners of the galley and having respective major walls positioned at an oblique angle to a longitudinal axis of the aircraft and with respective doors angled away from the crew work/interaction area.

Abstract: An intelligent notification device is provided. The intelligent notification device is adapted to communicate with at least one electronic device. The intelligent notification device includes a detecting device and a controller. The detecting device detects a status parameter of at least one user and an enviromental parameter of the electronic device. The controller is electrically connected to the detecting device to control the electronic device to notify one of a plurality of events in an event schedule according to the event schedule and to dynamically adjust a time sequency of the events in the event schedule according to at least one of the enviromental parameter and the status parameter. An intelligent notification method is further provided.

Abstract: An integrated circuit includes a first diffusion area for a first type transistor. The first type transistor includes a first drain region and a first source region. A second diffusion area for a second type transistor is separated from the first diffusion area. The second type transistor includes a second drain region and a second source region. A gate electrode continuously extends across the first diffusion area and the second diffusion area in a routing direction. A first metallic structure is electrically coupled with the first source region. A second metallic structure is electrically coupled with the second drain region. A third metallic structure is disposed over and electrically coupled with the first and second metallic structures. A width of the first metallic structure is substantially equal to or larger than a width of the third metallic structure.

Abstract: An automatic notification device for communicating with a plurality of electronic device is provided. The automatic notification device includes a controller. The controller determines whether to transfer information to the first electronic device according to a utilizing status of the first electronic device, and receives a determine signal from the first electronic device to determine whether the information transferred to the first electronic device has already been read according to the determine signal. Furthermore, an automatic notification method applied to the automatic notification device is also provided.

Abstract: An integrated circuit includes a layer of a semiconductor device including a standard cell configuration having a fixed gate electrode pitch between gate electrode lines and a resistor formed of metal between the fixed gate electrode pitch of the standard cell configuration. In one embodiment, the integrated circuit can be charged device model (CDM) electrostatic discharge (ESD) protection circuit for a cross domain standard cell having the resistor formed of metal. A method of manufacturing integrated circuits includes forming a plurality of gate electrode lines separated by a gate electrode pitch to form a core standard cell device, applying at least a first layer of metal within the gate electrode pitch to form a portion of a resistor, and applying at least a second layer of metal to couple to the first layer of metal to form another portion of the resistor.

Abstract: Some embodiments relate to a method of hierarchical layout design, comprising forming a layout of an integrated circuit (IC) according to a design rule that specifies a minimum design rule distance between a neighboring layout features within the IC. Forming the layout comprises forming first and second standard cells having first and second layout features, respectively, that about one-another so that a distance between the first and second layout features is less than the minimum design rule distance. The method further comprises configuring design rule checking (DRC) to ignore this fail. Instead, the layout is modified with an automated layout tool by merging the first and second layout features, or by removing a portion of the first or second layout feature to increase the distance between the first and second layout features to be greater than or equal to the minimum distance.

Abstract: Some embodiments relate to a method of hierarchical layout design, comprising forming a layout of an integrated circuit (IC) according to a design rule that specifies a minimum design rule distance between a neighboring layout features within the IC. Forming the layout comprises forming first and second standard cells having first and second layout features, respectively, that about one-another so that a distance between the first and second layout features is less than the minimum design rule distance. The method further comprises configuring design rule checking (DRC) to ignore this fail. Instead, the layout is modified with an automated layout tool by merging the first and second layout features, or by removing a portion of the first or second layout feature to increase the distance between the first and second layout features to be greater than or equal to the minimum distance.

Abstract: An integrated circuit includes a layer of a semiconductor device including a standard cell configuration having a fixed gate electrode pitch between gate electrode lines and a resistor formed of metal between the fixed gate electrode pitch of the standard cell configuration. In one embodiment, the integrated circuit can be charged device model (CDM) electrostatic discharge (ESD) protection circuit for a cross domain standard cell having the resistor formed of metal. A method of manufacturing integrated circuits includes forming a plurality of gate electrode lines separated by a gate electrode pitch to form a core standard cell device, applying at least a first layer of metal within the gate electrode pitch to form a portion of a resistor, and applying at least a second layer of metal to couple to the first layer of metal to form another portion of the resistor.