Abstract: A semiconductor package and a manufacturing method thereof are provided. The semiconductor package includes at least one semiconductor die, an interposer, an encapsulant, a protection layer and connectors. The interposer has a first surface, a second surface opposite to the first surface and sidewalls connecting the first and second surfaces. The semiconductor die is disposed on the first surface of interposer and electrically connected with the interposer. The encapsulant is disposed over the interposer and laterally encapsulating the at least one semiconductor die. The connectors are disposed on the second surface of the interposer and electrically connected with the at least one semiconductor die through the interposer. The protection layer is disposed on the second surface of the interposer and surrounding the connectors. The sidewalls of the interposer include slanted sidewalls connected to the second surface, and the protection layer is in contact with the slant sidewalls of the interposer.

Abstract: A structure includes a redistribution structure, which includes a bottom layer and a plurality of upper layers over the bottom layer. The redistribution structure also includes a power-ground macro extending from a topmost layer in the plurality of upper layers to a bottommost layer in the plurality of upper layers, and a metal pad in the bottom layer and overlapped by the power-ground macro. The metal pad is electrically disconnected from the power-ground macro.

Abstract: A semiconductor package structure includes a first package, a second package over the first package, a plurality of connectors between the first package and the second package and a plurality of baffle structures between the first package and the second package. The second package includes a bonding region and a periphery region surrounding the bonding region. The connectors are disposed in the bonding region to provide electrical connections between the first package and the second package. The baffle structures are disposed in the periphery region and are separated from each other.

Abstract: A method includes bonding a first device die and a second device die to an interconnect die. The interconnect die includes a first portion over and bonded to the first device die, and a second portion over and bonded to the second device die. The interconnect die electrically connects the first device die to the second device die. The method further includes encapsulating the interconnect die in an encapsulating material, and forming a plurality of redistribution lines over the interconnect die.

Abstract: A semiconductor package includes a redistribution structure, at least one semiconductor device and a plurality of heat dissipation films. The at least one semiconductor device is mounted on the redistribution structure. The plurality of heat dissipation films are disposed on the at least one semiconductor device in a side by side manner and jointly cover an upper surface of the at least one semiconductor device. A manufacturing method of the semiconductor package is also provided.

Abstract: A method includes bonding a first device die and a second device die to an interconnect die. The interconnect die includes a first portion over and bonded to the first device die, and a second portion over and bonded to the second device die. The interconnect die electrically connects the first device die to the second device die. The method further includes encapsulating the interconnect die in an encapsulating material, and forming a plurality of redistribution lines over the interconnect die.

Abstract: A method includes bonding a first device die and a second device die to an interconnect die. The interconnect die includes a first portion over and bonded to the first device die, and a second portion over and bonded to the second device die. The interconnect die electrically connects the first device die to the second device die. The method further includes encapsulating the interconnect die in an encapsulating material, and forming a plurality of redistribution lines over the interconnect die.

Abstract: A semiconductor package structure includes a substrate, a first semiconductor and a second semiconductor over the substrate, and a multi-TIM structure disposed over the first semiconductor die and the second semiconductor die. The first semiconductor die includes a first heat output and the second semiconductor die includes a second heat output less than the first heat output. The multi-TIM structure includes a first TIM layer disposed over at least a portion of the first semiconductor die and a second TIM layer. A thermal conductivity of the first TIM layer is higher than a thermal conductivity of the second TIM layer. The first TIM layer covers the first semiconductor die.

Abstract: The present invention describes applications and methods (1) to use bacterophage Cf and its variants to prevent and treat the citrus canker pathogen, Xanthomonas citri subsp. citri; (2) to engineer recombinant Cf phages that the infectivity is controllable without being harmful to the rest of environment; (3) to engineer and produce recombinant Cf phages with longer storage shelf life; (4) to use Cf phage as a vector for the introduction and insertion of foreign genetic material into Xanthomonas citri subsp. citri. genome; (5) to use and engineer Xp12 and Xf bacteriophages to inhibit Xanthomonas oryzae pv. oryzae, the causal agent of the rice blight disease.

Abstract: A semiconductor package structure includes a first package, a second package over the first package, a plurality of connectors between the first package and the second package and a plurality of baffle structures between the first package and the second package. The second package includes a bonding region and a periphery region surrounding the bonding region. The connectors are disposed in the bonding region to provide electrical connections between the first package and the second package. The baffle structures are disposed in the periphery region and are separated from each other.

Abstract: A method includes bonding a first device die and a second device die to an interconnect die. The interconnect die includes a first portion over and bonded to the first device die, and a second portion over and bonded to the second device die. The interconnect die electrically connects the first device die to the second device die. The method further includes encapsulating the interconnect die in an encapsulating material, and forming a plurality of redistribution lines over the interconnect die.

Abstract: A semiconductor package structure includes a substrate, a first semiconductor and a second semiconductor over the substrate, and a multi-TIM structure disposed over the first semiconductor die and the second semiconductor die. The first semiconductor die includes a first heat output and the second semiconductor die includes a second heat output less than the first heat output. The multi-TIM structure includes a first TIM layer disposed over at least a portion of the first semiconductor die and a second TIM layer. A thermal conductivity of the first TIM layer is higher than a thermal conductivity of the second TIM layer. The first TIM layer covers the first semiconductor die.

Abstract: A semiconductor package structure includes a substrate, a first semiconductor and a second semiconductor over the substrate, and a multi-TIM structure disposed over the first semiconductor die and the second semiconductor die. The first semiconductor die includes a first heat output and the second semiconductor die includes a second heat output less than the first heat output. The multi-TIM structure includes a first TIM layer disposed over at least a portion of the first semiconductor die and a second TIM layer. A thermal conductivity of the first TIM layer is higher than a thermal conductivity of the second TIM layer. The first TIM layer covers the first semiconductor die.

Abstract: A semiconductor structure includes a first substrate including a first surface and a second surface opposite to the first surface; a first die disposed over the second surface of the first substrate; a plurality of first conductive bumps disposed between the first die and the first substrate; a molding disposed over the first substrate and surrounding the first die and the plurality of first conductive bumps; a second substrate disposed below the first surface of the first substrate; a plurality of second conductive bumps disposed between the first substrate and the second substrate; and a second die disposed between the first substrate and the second substrate.

Abstract: A method includes bonding a first device die and a second device die to an interconnect die. The interconnect die includes a first portion over and bonded to the first device die, and a second portion over and bonded to the second device die. The interconnect die electrically connects the first device die to the second device die. The method further includes encapsulating the interconnect die in an encapsulating material, and forming a plurality of redistribution lines over the interconnect die.

Abstract: A semiconductor structure includes a first substrate including a first surface and a second surface opposite to the first surface; a first die disposed over the second surface of the first substrate; a plurality of first conductive bumps disposed between the first die and the first substrate; a molding disposed over the first substrate and surrounding the first die and the plurality of first conductive bumps; a second substrate disposed below the first surface of the first substrate; a plurality of second conductive bumps disposed between the first substrate and the second substrate; and a second die disposed between the first substrate and the second substrate.

Abstract: The present invention describes applications and methods (1) to use bacteriophage Cf and its variants to prevent and treat the citrus canker pathogen, Xanthomonas citri subsp. citri; (2) to engineer recombinant Cf phages that the infectivity is controllable without being harmful to the rest of environment; (3) to engineer and produce recombinant Cf phages with longer storage shelf life; (4) to use Cf phage as a vector for the introduction and insertion of foreign genetic material into Xanthomonas citri subsp. citri. genome; (5) to use and engineer Xp12 and Xf bacteriophages to inhibit Xanthomonas oryzae pv. oryzae, the causal agent of the rice blight disease.

Abstract: A semiconductor package structure is disclosed. The semiconductor package structure includes: a substrate having a front surface and a back surface; a chip-on-interposer structure mounted on the front surface of the substrate; a back side stiffener mounted over the back surface of the substrate and surrounding a projection of the chip-on-interposer structure from a back surface perspective; and a plurality of conductive bumps mounted on the back surface of the substrate.