Patents by Inventor Tirunelveli S. Ravi

Tirunelveli S. Ravi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220064819
    Abstract: A CVD reactor for deposition of silicon carbide material on silicon carbide substrates, may comprise: an upper gas manifold and a lower gas manifold; and a substrate carrier comprising a gas tight rectangular box open on upper and lower surfaces, a multiplicity of planar walls across the width of the box, the walls being equally spaced in a row facing each other and defining a row of channels within the box, the walls comprising mounting fixtures for a plurality of substrates and at least one electrically resistive heater element; wherein the upper gas manifold and the lower gas manifold are configured to attach to the upper and lower surfaces of the substrate carrier, respectively, connect with upper and lower ends of the channels, and isolate gas flows in odd numbered channels from gas flows in even numbered channels, wherein the channels are numbered in order along the row; and wherein said electrically resistive heater elements and said mounting fixtures are coated with a material able to withstand exposu
    Type: Application
    Filed: March 12, 2021
    Publication date: March 3, 2022
    Inventors: Tirunelveli S. Ravi, Visweswaren Sivaramakrishnan
  • Patent number: 11111600
    Abstract: A process chamber which may be operated as follows: mounting substrates in a substrate carrier; loading the substrate carrier into a vacuum chamber and mating the substrate carrier with an upper gas manifold and a lower gas manifold; providing and maintaining a vacuum environment within the vacuum chamber; making electrical contact to an at least one electrically-resistive heater; heating the substrates to a process temperature by flowing current through the at least one electrically-resistive heater; and while heating the substrates, flowing process gas through odd numbered channels from the upper gas manifold to the lower gas manifold, and simultaneously flowing process gas through even numbered channels from the lower gas manifold to the upper gas manifold; wherein the process gas comprises an inert gas and the substrates are being thermally annealed, or wherein the process gas is a dopant gas and the substrates are being doped.
    Type: Grant
    Filed: December 4, 2017
    Date of Patent: September 7, 2021
    Assignee: Svagos Technik, Inc.
    Inventors: Tirunelveli S. Ravi, Visweswaren Sivaramakrishnan
  • Patent number: 11041253
    Abstract: A system for depositing thin single crystal silicon wafers by epitaxial deposition in a silicon precursor depletion mode with cross-flow deposition may include: a substrate carrier with low total heat capacity, high emissivity and small volume; a lamp module with rapid heat-up, efficient heat production, and spatial control over heating; and a manifold designed for cross-flow processing. Furthermore, the substrate carrier may include heat reflectors to control heat loss from the edges of the carrier and/or heat chokes to thermally isolate the carrier from the manifolds, allowing independent temperature control of the manifolds. The carrier and substrates may be configured for deposition on both sides of the substrates—the substrates having release layers on both sides and the carriers being configured to have equal process gas flow over both surfaces of the substrate. High volume may be addressed by a deposition system comprising multiple mini-batch reactors.
    Type: Grant
    Filed: May 29, 2018
    Date of Patent: June 22, 2021
    Assignee: Svagos Technik, Inc.
    Inventors: Visweswaren Sivaramakrishnan, Tirunelveli S. Ravi, Andrzej Kaszuba, Quoc Vinh Truong, Jean R. Vatus
  • Patent number: 10961621
    Abstract: A CVD reactor for single sided deposition of material on substrates, may comprise: an upper gas manifold and a lower gas manifold; a substrate carrier comprising a gas tight rectangular box open on upper and lower surfaces, a multiplicity of planar walls across the width of the box, the walls being equally spaced in a row facing each other and defining a row of channels within the box, the walls comprising mounting fixtures for a plurality of substrates and at least one electrically resistive heater element; and clamps within the vacuum chamber for making electrical contact to the at least one electrically resistive heater element; wherein the upper gas manifold and the lower gas manifold are configured to attach to the upper and lower surfaces of the substrate carrier, respectively, connect with upper and lower ends of the channels, and isolate gas flows in odd numbered channels from gas flows in even numbered channels, wherein the channels are numbered in order along the row, and wherein the gas flows compr
    Type: Grant
    Filed: June 6, 2016
    Date of Patent: March 30, 2021
    Assignee: Svagos Technik, Inc.
    Inventors: Visweswaren Sivaramakrishnan, Tirunelveli S. Ravi, Timothy N. Kleiner, Quoc Truong
  • Patent number: 10947640
    Abstract: A CVD reactor for deposition of silicon carbide material on silicon carbide substrates, may comprise: an upper gas manifold and a lower gas manifold; and a substrate carrier comprising a gas tight rectangular box open on upper and lower surfaces, a multiplicity of planar walls across the width of the box, the walls being equally spaced in a row facing each other and defining a row of channels within the box, the walls comprising mounting fixtures for a plurality of substrates and at least one electrically resistive heater element; wherein the upper gas manifold and the lower gas manifold are configured to attach to the upper and lower surfaces of the substrate carrier, respectively, connect with upper and lower ends of the channels, and isolate gas flows in odd numbered channels from gas flows in even numbered channels, wherein the channels are numbered in order along the row; and wherein said electrically resistive heater elements and said mounting fixtures are coated with a material able to withstand exposu
    Type: Grant
    Filed: December 4, 2017
    Date of Patent: March 16, 2021
    Assignee: Svagos Technik, Inc.
    Inventors: Tirunelveli S. Ravi, Visweswaren Sivaramakrishnan
  • Patent number: 10847421
    Abstract: Methods and equipment for the removal of semiconductor wafers grown on the top surface of a single crystal silicon substrate covered by a porous silicon separation layer by using IR irradiation of the porous silicon separation layer to initiate release of the semiconductor wafer from the substrate, particularly at edges (and corners) of the top surface of the substrate.
    Type: Grant
    Filed: June 22, 2017
    Date of Patent: November 24, 2020
    Assignee: Svagos Technik, Inc.
    Inventors: Tirunelveli S. Ravi, Stephen Daniel Miller
  • Publication number: 20190003076
    Abstract: A system for depositing thin single crystal silicon wafers by epitaxial deposition in a silicon precursor depletion mode with cross-flow deposition may include: a substrate carrier with low total heat capacity, high emissivity and small volume; a lamp module with rapid heat-up, efficient heat production, and spatial control over heating; and a manifold designed for cross-flow processing. Furthermore, the substrate carrier may include heat reflectors to control heat loss from the edges of the carrier and/or heat chokes to thermally isolate the carrier from the manifolds, allowing independent temperature control of the manifolds. The carrier and substrates may be configured for deposition on both sides of the substrates—the substrates having release layers on both sides and the carriers being configured to have equal process gas flow over both surfaces of the substrate. High volume may be addressed by a deposition system comprising multiple mini-batch reactors.
    Type: Application
    Filed: May 29, 2018
    Publication date: January 3, 2019
    Inventors: Visweswaren Sivaramakrishnan, Tirunelveli S. Ravi, Andrzej Kaszuba, Quoc Vinh Truong, Jean R. Vatus
  • Patent number: 9982363
    Abstract: A system for depositing thin single crystal silicon wafers by epitaxial deposition in a silicon precursor depletion mode with cross-flow deposition may include: a substrate carrier with low total heat capacity, high emissivity and small volume; a lamp module with rapid heat-up, efficient heat production, and spatial control over heating; and a manifold designed for cross-flow processing. Furthermore, the substrate carrier may include heat reflectors to control heat loss from the edges of the carrier and/or heat chokes to thermally isolate the carrier from the manifolds, allowing independent temperature control of the manifolds. The carrier and substrates may be configured for deposition on both sides of the substrates—the substrates having release layers on both sides and the carriers being configured to have equal process gas flow over both surfaces of the substrate. High volume may be addressed by a deposition system comprising multiple mini-batch reactors.
    Type: Grant
    Filed: February 3, 2016
    Date of Patent: May 29, 2018
    Assignee: Crystal Solar, Incorporated
    Inventors: Visweswaren Sivaramakrishnan, Tirunelveli S. Ravi, Andrzej Kaszuba, Quoc Vinh Truong, Jean R. Vatus
  • Patent number: 9920451
    Abstract: An epitaxial reactor enabling simultaneous deposition of thin films on a multiplicity of wafers is disclosed. During deposition, a number of wafers are contained within a wafer sleeve comprising a number of wafer carrier plates spaced closely apart to minimize the process volume. Process gases flow preferentially into the interior volume of the wafer sleeve, which is heated by one or more lamp modules. Purge gases flow outside the wafer sleeve within a reactor chamber to minimize deposition on the chamber walls. Sequencing of the illumination of the individual lamps in the lamp module may further improve the linearity of variation in deposition rates within the wafer sleeve. To improve uniformity, the direction of process gas flow may be varied in a cross-flow configuration. Combining lamp sequencing with cross-flow processing in a multiple reactor system enables high throughput deposition with good film uniformities and efficient use of process gases.
    Type: Grant
    Filed: March 17, 2014
    Date of Patent: March 20, 2018
    Assignee: Crystal Solar Incorporated
    Inventors: Visweswaren Sivaramakrishnan, Kedarnath Sangam, Tirunelveli S. Ravi, Andrzej Kaszuba, Quoc Vinh Truong
  • Publication number: 20170372966
    Abstract: Methods and equipment for the removal of semiconductor wafers grown on the top surface of a single crystal silicon substrate covered by a porous silicon separation layer by using IR irradiation of the porous silicon separation layer to initiate release of the semiconductor wafer from the substrate, particularly at edges (and corners) of the top surface of the substrate.
    Type: Application
    Filed: June 22, 2017
    Publication date: December 28, 2017
    Inventors: Tirunelveli S. Ravi, Stephen Daniel Miller
  • Publication number: 20170141720
    Abstract: Photovoltaic modules including a plurality of solar cells bonded to a module back sheet are described herein, wherein each solar cell includes a superstrate bonded to a front side of a photovoltaic device to facilitate handling of very thin photovoltaic devices during fabrication of the module. Modules may also include module front sheets and the solar cells may include bottom sheets. The modules may be made of flexible materials, and may be foldable. Fabrication processes include tabbing photovoltaic devices prior to attaching the individual superstrates.
    Type: Application
    Filed: October 8, 2015
    Publication date: May 18, 2017
    Inventors: Kramadhati V. Ravi, Tirunelveli S. Ravi, Ashish Asthana, Somnath Nag
  • Publication number: 20170037514
    Abstract: A CVD reactor for single sided deposition of material on substrates, may comprise: an upper gas manifold and a lower gas manifold; a substrate carrier comprising a gas tight rectangular box open on upper and lower surfaces, a multiplicity of planar walls across the width of the box, the walls being equally spaced in a row facing each other and defining a row of channels within the box, the walls comprising mounting fixtures for a plurality of substrates and at least one electrically resistive heater element; and clamps within the vacuum chamber for making electrical contact to the at least one electrically resistive heater element; wherein the upper gas manifold and the lower gas manifold are configured to attach to the upper and lower surfaces of the substrate carrier, respectively, connect with upper and lower ends of the channels, and isolate gas flows in odd numbered channels from gas flows in even numbered channels, wherein the channels are numbered in order along the row, and wherein the gas flows compr
    Type: Application
    Filed: June 6, 2016
    Publication date: February 9, 2017
    Inventors: Visweswaren Sivaramakrishnan, Tirunelveli S. Ravi, Timothy N. Kleiner, Quoc Truong
  • Patent number: 9556522
    Abstract: An epitaxial reactor enabling simultaneous deposition of thin films on a multiplicity of wafers is disclosed. During deposition, a number of wafers are contained within a wafer sleeve comprising a number of wafer carrier plates spaced closely apart to minimize the process volume. Process gases flow preferentially into the interior volume of the wafer sleeve, which is heated by one or more lamp modules. Purge gases flow outside the wafer sleeve within a reactor chamber to minimize wall deposition. In addition, sequencing of the illumination of the individual lamps in the lamp module may further improve the linearity of variation in deposition rates within the wafer sleeve. To improve uniformity, the direction of process gas flow may be varied in a cross-flow configuration. Combining lamp sequencing with cross-flow processing in a multiple reactor system enables high throughput deposition with good film uniformities and efficient use of process gases.
    Type: Grant
    Filed: March 4, 2014
    Date of Patent: January 31, 2017
    Assignee: Crystal Solar Incorporated
    Inventors: Visweswaren Sivaramakrishnan, Kedarnath Sangam, Tirunelveli S. Ravi, Andrzej Kaszuba, Quoc Vinh Truong
  • Publication number: 20170012149
    Abstract: Embodiments of the present invention may include single crystal silicon solar cell structures with epitaxially deposited silicon device layers with deep junction(s). In some embodiments, the single crystal silicon solar cell structures may comprise a moderately doped, thick (greater than 10 microns), epitaxially deposited silicon emitter layer. In some embodiments, the single crystal silicon solar cell structures may comprise moderately doped, thick (greater than 10 microns), epitaxially deposited FSF layers. The moderate doping reduces electron-hole recombination within the FSF and emitter layers and causes smaller bandgap narrowing and reduced Auger recombination compared to prior art devices which typically have more heavily doped layers, and the thicker FSF and emitter layers than typically used in prior art devices assist in having a desirable sheet resistance for the solar cell front and back surface, as measured prior to front side and back side metallization.
    Type: Application
    Filed: July 7, 2016
    Publication date: January 12, 2017
    Inventors: Ruiying Hao, Tirunelveli S. Ravi
  • Patent number: 9455360
    Abstract: Methods of fabricating metal wrap through solar cells and modules for thin silicon solar cells, including epitaxial silicon solar cells, are described. These metal wrap through solar cells have a planar back contact geometry for the base and emitter contacts. Fabrication of a metal wrap through solar cell may comprise: providing a photovoltaic device attached at the emitter side of the device to a solar glass by an encapsulant, the device including busbars on the device emitter; forming vias through the device base and emitter, the vias terminating in the busbars; depositing a conformal dielectric film over the surface of the vias and the back surface of the base; removing portions of the conformal dielectric film from the ends of the vias for exposing the busbars and from field areas of the base; and forming separate electrical contacts to the busbars and the field areas on the back surface of the solar cell.
    Type: Grant
    Filed: November 7, 2014
    Date of Patent: September 27, 2016
    Assignee: Crystal Solar, Inc.
    Inventors: Ashish Asthana, Tirunelveli S. Ravi, Kramadhati V. Ravi, Somnath Nag
  • Publication number: 20160233824
    Abstract: Photovoltaic modules including a plurality of solar cells bonded to a module back sheet are described herein, wherein each solar cell includes a superstrate bonded to a front side of a photovoltaic device to facilitate handling of very thin photovoltaic devices during fabrication of the module. Modules may also include module front sheets and the solar cells may include bottom sheets. The modules may be made of flexible materials, and may be foldable. Fabrication processes include tabbing photovoltaic devices prior to attaching the individual superstrates.
    Type: Application
    Filed: October 8, 2015
    Publication date: August 11, 2016
    Inventors: Kramadhati V. Ravi, Tirunelveli S. Ravi, Ashish Asthana, Somnath Nag
  • Publication number: 20160222544
    Abstract: A system for depositing thin single crystal silicon wafers by epitaxial deposition in a silicon precursor depletion mode with cross-flow deposition may include: a substrate carrier with low total heat capacity, high emissivity and small volume; a lamp module with rapid heat-up, efficient heat production, and spatial control over heating; and a manifold designed for cross-flow processing. Furthermore, the substrate carrier may include heat reflectors to control heat loss from the edges of the carrier and/or heat chokes to thermally isolate the carrier from the manifolds, allowing independent temperature control of the manifolds. The carrier and substrates may be configured for deposition on both sides of the substrates—the substrates having release layers on both sides and the carriers being configured to have equal process gas flow over both surfaces of the substrate. High volume may be addressed by a deposition system comprising multiple mini-batch reactors.
    Type: Application
    Filed: February 3, 2016
    Publication date: August 4, 2016
    Inventors: Visweswaren Sivaramakrishnan, Tirunelveli S. Ravi, Andrzej Kaszuba (Deceased), Quoc Vinh Truong, Jean R. Vatus
  • Patent number: 9397239
    Abstract: Fabrication of a single crystal silicon solar cell with an insitu epitaxially deposited very highly doped p-type silicon back surface field obviates the need for the conventional aluminum screen printing step, thus enabling a thinner silicon solar cell because of no aluminum induced bow in the cell. Furthermore, fabrication of a single crystal silicon solar cell with insitu epitaxial p-n junction formation and very highly doped n-type silicon front surface field completely avoids the conventional dopant diffusion step and one screen printing step, thus enabling a cheaper manufacturing process.
    Type: Grant
    Filed: December 17, 2013
    Date of Patent: July 19, 2016
    Assignee: Crystal Solar, Incorporated
    Inventors: Tirunelveli S. Ravi, Ashish Asthana
  • Patent number: 9255346
    Abstract: A system for depositing thin single crystal silicon wafers by epitaxial deposition in a silicon precursor depletion mode with cross-flow deposition may include: a substrate carrier with low total heat capacity, high emissivity and small volume; a lamp module with rapid heat-up, efficient heat production, and spatial control over heating; and a manifold designed for cross-flow processing. Furthermore, the substrate carrier may include heat reflectors to control heat loss from the edges of the carrier and/or heat chokes to thermally isolate the carrier from the manifolds, allowing independent temperature control of the manifolds. The carrier and substrates may be configured for deposition on both sides of the substrates—the substrates having release layers on both sides and the carriers being configured to have equal process gas flow over both surfaces of the substrate. High volume may be addressed by a deposition system comprising multiple mini-batch reactors.
    Type: Grant
    Filed: May 29, 2012
    Date of Patent: February 9, 2016
    Assignee: Crystal Solar, Incorporated
    Inventors: Visweswaren Sivaramakrishnan, Tirunelveli S. Ravi, Andrzej Kaszuba, Bozena Kaszuba, Quoc Vinh Truong, Jean R. Vatus
  • Publication number: 20150361555
    Abstract: A CVD reactor for depositing material on substrates may comprise: a vacuum chamber; at least two substrate carriers arranged in parallel in a row within the vacuum chamber, each of the at least two substrate carriers comprising mounting positions for a plurality of substrates, the mounting positions being on the walls of channels configured for flowing process gases, the channels being in parallel planes within all of the at least two substrate carriers; a planar electrically resistive heater between every two adjacent substrate carriers in the row; and planar heaters at both ends of the row. Furthermore, CVD reactor chambers with three channel substrate carriers and/or gas preheat structure are described herein.
    Type: Application
    Filed: June 12, 2015
    Publication date: December 17, 2015
    Inventors: Visweswaren Sivaramakrishnan, Quoc Vinh Truong, Timothy N. Kleiner, Tirunelveli S. Ravi