Abstract: A method for forming a semiconductor device structure is provided. The method includes forming a first overlay grating over a substrate. The first overlay grating has a first strip portion and a second strip portion, and the first strip portion and the second strip portion are elongated in a first elongated axis and are spaced apart from each other. The method includes forming a layer over the first overlay grating. The layer has a first trench elongated in a second elongated axis, the second elongated axis is substantially perpendicular to the first elongated axis, and the first trench extends across the first strip portion and the second strip portion. The method includes forming a second overlay grating over the layer. The second overlay grating has a third strip portion and a fourth strip portion.

Abstract: A semiconductor structure and the manufacturing method thereof are provided. A semiconductor structure includes a first semiconductor substrate, a first interconnect structure, a first conductive pad, a first dielectric layer, and a first conductive connector. The first semiconductor substrate includes a plurality of first semiconductor devices therein. The first interconnect structure is disposed over the first semiconductor substrate and electrically coupled to the first semiconductor devices. The first conductive pad is disposed over and electrically coupled to the first interconnect structure. The first dielectric layer covers the first conductive pad and the first interconnect structure, and the first dielectric layer includes a portion extending through the first conductive pad. The first conductive connector is disposed on and electrically coupled to the first interconnect structure, and the first conductive connector extends through the portion of the first dielectric layer.

Abstract: A method includes forming a hard mask over a target layer, performing a treatment on a first portion of the hard mask to form a treated portion, with a second portion of the hard mask left untreated as an untreated portion. The method further includes subjecting both the treated portion and the untreated portion of the hard mask to etching, in which the untreated portion is removed as a result of the etching, and the treated portion remains after the etching. A layer underlying the hard mask is etched, and the treated portion of the hard mask is used as a part of an etching mask in the etching.

Abstract: A package structure and method for forming the same are provided. The package structure includes a package component, and a dummy die disposed over the package component. The package structure includes a device die adjacent to the dummy die, and the device die includes a conductive pad, and the conductive pad is electrically connected to the package component.

Abstract: A method for sorting unsystematic environment risk of underground storage tank systems includes: generating an unsystematic environmental site assessment priority list for the underground storage tank systems using a risk weight assessment module based on facility level factor data and operational status factor data of each underground storage tank system; obtaining an actual soil gas detection data for each underground storage tank system after conducting an environmental site assessment on the priority list; and generating an investigation list according to the contamination potential assessment result of each underground storage tank system using a contamination potential assessment module based on the actual soil gas detection data as a basis for subsequent investigation and regulation on the underground storage tank systems.

Abstract: Provided are an electronic device for a network control terminal and a network node, and a method for the electronic device. The electronic device for a network control terminal comprises processing circuitry configured to set a first condition concerning a beam-forming capacity of a network node for determining the network node capable of serving as a relay node, and to generate control signaling of indication information comprising the first condition for indicating the network node served by the network control terminal.

Abstract: An abnormal flow detection device and an abnormal flow detection method thereof are provided. The abnormal flow detection device analyses a plurality of packets captured during a time interval to obtain a plurality of flow features of each packet and selects at least one key flow feature from the flow features based on a dimensionality reduction algorithm. The abnormal flow detection device trains a bidirectional generative adversarial network (BiGAN) by taking the at least one key flow feature of each packet as an input of the BiGAN to build a flow recognition model for detecting abnormal flows.

Abstract: A method includes method includes forming a dummy gate stack over a semiconductor substrate, wherein the semiconductor substrate is comprised in a wafer, removing the dummy gate stack to form a recess, forming a gate dielectric layer in the recess, and forming a metal layer in the recess and over the gate dielectric layer. The metal layer has an n-work function. A block layer is deposited over the metal layer using Atomic Layer Deposition (ALD). The remaining portion of the recess is filled with metallic materials, wherein the metallic materials are overlying the metal layer.

Abstract: A semiconductor structure and the manufacturing method thereof are provided. A semiconductor structure includes a first semiconductor substrate, a first interconnect structure, a first conductive pad, a first dielectric layer, and a first conductive connector. The first semiconductor substrate includes a plurality of first semiconductor devices therein. The first interconnect structure is disposed over the first semiconductor substrate and electrically coupled to the first semiconductor devices. The first conductive pad is disposed over and electrically coupled to the first interconnect structure. The first dielectric layer covers the first conductive pad and the first interconnect structure, and the first dielectric layer includes a portion extending through the first conductive pad. The first conductive connector is disposed on and electrically coupled to the first interconnect structure, and the first conductive connector extends through the portion of the first dielectric layer.

Abstract: Methods of forming connector pad structures, interconnect structures, and structures thereof are disclosed. In some embodiments, a method of forming a connector pad structure includes forming an underball metallization (UBM) pad, and increasing a surface roughness of the UBM pad by exposing the UBM pad to a plasma treatment. A polymer material is formed over a first portion of the UBM pad, leaving a second portion of the UBM pad exposed.

Abstract: Method and apparatus for full color data processing for 3D objects are provided. The method includes: performing a layering process on a target object to determine slice-layer data of each layer, wherein the slice-layer data includes layer-color data and layer-structure data, the layer-color data represents color information of the target object, and the layer-structure data represents a printing location of the target object; and analyzing the layer-color data and the layer-structure data when the layer-color data is consistent with background color data of the target object and analyzing the layer-color data when the layer-color data is inconsistent with the background color data of the target object, thereby determining a layer color of the target object and determining printing information of the target object.

Abstract: The present application is at least directed to an apparatus on a network including a non-transitory memory including instructions stored thereon for beamforming training during an interval in the network. The apparatus also includes a processor, operably coupled to the non-transitory memory, capable of executing the instructions of receiving, from a new radio node, a beamforming training signal and beam identification for each of plural beams during the interval. The processor is also configured to execute the instructions of determining an optimal transmission beam of the new radio node based on the beamforming training signals of the plural beams. The processor is further configured to execute the instructions of transmitting, to the new radio node, a signal including a beam identification of the optimal transmission beam and an identification of the apparatus during the interval.

Abstract: The present disclosure relates to a gripper device which comprises: a belt pulley driven by a power-driven motor; a belt and another belt pulley driven by the above belt pulley; a ball screw driven and rotated by the belt pulley; nut brackets driven to be shifted along two rigid guideways by two reverse threads at both sides of the ball screw, respectively; a plurality of steel balls, which are installed between a nut bracket and a rigid guideway and sustain more stresses when a workpiece is clamped between two upper slide on the nut brackets.

Abstract: The present disclosure relates to a grip jaw structure with characteristics as follows: a cam disk is driven by a rotary motor; two transmission shafts are driven through two slotted guideways in the cam disk; lubricants inside the slotted guideways adhere to a plurality of bearings in which the transmission shafts in the slotted guideways are inserted when the transmission shafts are shifted; sliders between which a workpiece is clamped are driven to be shifted by the transmission shafts along linear rails at the top of the framework for stresses sustained and dispersed by bearings.

Abstract: A communications apparatus, including a phase correction unit, a first radio frequency channel, a first analog bridge, a second radio frequency channel, and a second analog bridge. A first signal is sent to a first input end by using the first radio frequency channel, and is divided into at least two channels of first sub-signals by using the first analog bridge, and the at least two channels of first sub-signals are respectively output from at least two first output ends to at least two first antenna arrays. Similarly, a second signal is divided into at least two channels of second sub-signals by using the second analog bridge, and the at least two channels of second sub-signals are output to at least two second antenna arrays. A first channel of first sub-signal and a first channel of second sub-signal are coupled to the phase correction unit by using a coupler.

Abstract: A method of manufacturing a semiconductor device includes providing a semiconductor die and surrounding a sidewall of the semiconductor die with a dielectric material. The method further includes forming a post passivation interconnect (PPI) over the semiconductor die and electrically coupling the PPI with the semiconductor die. The method further includes molding the semiconductor die and the PPI into an integrated semiconductor package. The method further includes covering at least a portion of an outer surface of the integrated semiconductor package with a conductive layer, wherein the conductive layer is conformal to the morphology of the portion of the outer surface. Moreover, the method further includes forming a conductive path inside the integrated semiconductor package electrically coupled to the conductive layer and a ground terminal of the integrated semiconductor package.

Abstract: Various embodiments of the present application are directed towards a method for forming a flat via top surface for memory, as well as an integrated circuit (IC) resulting from the method. In some embodiments, an etch is performed into a dielectric layer to form an opening. A liner layer is formed covering the dielectric layer and lining the opening. A lower body layer is formed covering the dielectric layer and filling a remainder of the opening over the liner layer. A top surface of the lower body layer and a top surface of the liner layer are recessed to below a top surface of the dielectric layer to partially clear the opening. A homogeneous upper body layer is formed covering the dielectric layer and partially filling the opening. A planarization is performed into the homogeneous upper body layer until the dielectric layer is reached.

Abstract: A vapor chamber includes an upper plate and a lower plate. The lower plate is attached on the upper plate. The upper plate and the lower plate are combined together to define a working space. The lower plate is in thermal contact with a heat source. A reinforcing layer is formed on a surface of the upper plate or the lower plate away from the working space.

Abstract: The present disclosure provides an electronic device and a battery safety monitoring method and monitoring system. The battery safety monitoring method includes: obtaining a battery voltage of a battery of the electronic device in real time; determining whether a voltage jump occurs in the battery of the electronic device according to the battery voltage obtained in real time; and determining that the battery is abnormal currently, when the voltage jump occurs in the battery.

Abstract: Methods, systems, and computer programs are presented for providing file system functions on a cloud storage system based on blob storage. A cloud storage system comprises storage clusters, and each storage cluster comprises a plurality of storage nodes (each including a partition layer that stores data in blobs organized within containers, and a stream layer for streaming blob data), a hierarchical namespace service for implementing file system functions on the data stored in the blobs and, a front end layer for processing user requests to access and manage data stored on the blobs. The file system functions include flat namespace functions and hierarchical namespace functions. Further, the front end layer accesses the partition layer to access the blobs based on addresses of blobs and accesses the hierarchical namespace service to identify the blobs.