Patents by Inventor To-Wen Tsao

To-Wen Tsao has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240145372
    Abstract: A substrate structure is provided, in which an insulating protection layer is formed on a substrate body having a plurality of electrical contact pads, and the insulating protection layer has a plurality of openings corresponding to the plurality of exposed electrical contact pads, and the insulating protection layer is formed with a hollow portion surrounding a partial edge of at least one of the electrical contact pads at at least one of the openings, so as to reduce the barrier of the insulating protection layer.
    Type: Application
    Filed: December 22, 2022
    Publication date: May 2, 2024
    Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.
    Inventors: Chia-Wen TSAO, Wen-Chen HSIEH, Yi-Lin TSAI, Hsiu-Fang CHIEN
  • Publication number: 20240143008
    Abstract: A middle-range (mid) low dropout (LDO) voltage has both sinking and sourcing current capability. The mid LDO can provide a voltage reference in active mode and power mode for core only design to work in a Safe Operating Area (SOA). The output of mid LDO can track IO power and/or core power dynamically. The mid LDO can comprise a voltage reference generator and a power-down controller connected to an amplifier, which output is connected to a decoupling capacitor. The provision of a high ground signal allows the mid LDO provide the sinking and sourcing currents.
    Type: Application
    Filed: January 11, 2024
    Publication date: May 2, 2024
    Inventors: Szu-Chun Tsao, Yi-Wen Chen, Jaw-Juinn Horng
  • Publication number: 20240113345
    Abstract: A battery module and a short protection method thereof are provided. The battery module has a battery cell pack and a control circuit. The method includes: detecting a temperature of the battery cell pack as a battery cell temperature through the control circuit; determining whether the battery cell temperature shows a downward trend when the battery cell temperature is higher than a first predetermined temperature value; and deactivating the battery module when the battery cell temperature does not show the downward trend.
    Type: Application
    Filed: May 23, 2023
    Publication date: April 4, 2024
    Applicant: ASUSTeK COMPUTER INC.
    Inventors: Chunyen Lai, Yu-Cheng Shen, Chun Tsao, Chaochan Tan, Huichuan Lo, Wen-Che Chung, Ming Hung Yao
  • Publication number: 20240088187
    Abstract: Trenches in which to form a back side isolation structure for an array of CMOS image sensors are formed by a cyclic process that allows the trenches to be kept narrow. Each cycle of the process includes etching to add a depth segment to the trenches and coating the depth segment with an etch-resistant coating. The following etch step will break through the etch-resistant coating at the bottom of the trench but the etch-resistant coating will remain in the upper part of the trench to limit lateral etching and substrate damage. The resulting trenches have a series of vertically spaced nodes. The process may result in a 10% increase in photodiode area and a 30-40% increase in full well capacity.
    Type: Application
    Filed: January 3, 2023
    Publication date: March 14, 2024
    Inventors: Chih Cheng Shih, Tsun-Kai Tsao, Jiech-Fun Lu, Hung-Wen Hsu, Bing Cheng You, Wen-Chang Kuo
  • Publication number: 20240069618
    Abstract: The disclosure provides a power management method. The power management method is applicable to an electronic device. The electronic device is electrically coupled to an adapter, and includes a system and a battery. The adapter has a feed power. The battery has a discharge power. The power management method of the disclosure includes: reading a power value of the battery; determining a state of the system; and discharging power to the system, when the system is in a power-on state and the power value is greater than a charging stopping value, by using the battery, and controlling, according to the discharge power and the feed power, the adapter to selectively supply power to the system. The disclosure further provides an electronic device using the power management method.
    Type: Application
    Filed: April 27, 2023
    Publication date: February 29, 2024
    Inventors: Wen Che CHUNG, Hui Chuan LO, Hao-Hsuan LIN, Chun TSAO, Jun-Fu CHEN, Ming-Hung YAO, Jia-Wei ZHANG, Kuan-Lun CHEN, Ting-Chao LIN, Cheng-Yen LIN, Chunyen LAI
  • Publication number: 20230343692
    Abstract: An electronic package is provided and includes a substrate structure, an electronic element disposed on the substrate structure and an encapsulation layer encapsulating the electronic element, where at least one functional circuit is formed on a surface of a substrate body of the substrate structure, and a wire having a smaller width is arranged on a boundary line at a junction between an encapsulation area and a peripheral area, so that when a mold for forming the encapsulation layer is formed to cover the substrate structure, the mold will create a gap around the wire to serve as an exhaust passage. Therefore, when the encapsulation layer is formed, the exhaust passage can be used to exhaust air, so as to avoid problems such as the occurrence of voids or overflows of the encapsulation layer.
    Type: Application
    Filed: July 7, 2022
    Publication date: October 26, 2023
    Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.
    Inventors: Wen-Chen Hsieh, Ya-Ting Chi, Chia-Wen Tsao, Hsin-Yin Chang, Yi-Lin Tsai, Hsiu-Fang Chien
  • Patent number: 11732231
    Abstract: The present invention relates to a composite membrane. The composite membrane includes: an elastic polymer substrate having a first surface processed by a surface modification; and a thermosensitive conductive layer formed on the first surface by performing a co-polymerization process, allowing an electrical current to pass through, and altering a hydrophilicity of a membrane surface in response to a change of a temperature.
    Type: Grant
    Filed: October 22, 2020
    Date of Patent: August 22, 2023
    Assignee: NATIONAL CENTRAL UNIVERSITY
    Inventors: Wei-Wen Hu, Chia-Wen Tsao
  • Publication number: 20230253342
    Abstract: An electronic package is provided and includes a substrate structure and an electronic element disposed on the substrate structure. The substrate structure is provided with a plurality of circuits and a reinforcing portion that is free from being electrically connected to the plurality of circuits on a surface of a substrate body of the substrate structure, such that the electronic element is electrically connected to the plurality of circuits and is free from being electrically connected to the reinforcing portion, and the reinforcing portion includes a dummy pad and a trace line connected to the dummy pad to increase a layout area of the reinforcing portion on the substrate body. Therefore, the adhesion of the reinforcing portion can be improved, and the electronic element can be prevented from cracking.
    Type: Application
    Filed: August 23, 2022
    Publication date: August 10, 2023
    Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.
    Inventors: Hsiu-Fang Chien, Wen-Chen Hsieh, Chia-Wen Tsao, Hsin-Yin Chang, Ya-Ting Chi, Yi-Lin Tsai
  • Publication number: 20230238321
    Abstract: An interconnect structure is formed on a substrate in a semiconductor device. The interconnect structure includes a dielectric layer and a metal layer. The dielectric layer includes a region and a plurality of protrusions. The metal layer is disposed on the region and between the protrusions, wherein tops of the protrusions are exposed with respect to the metal layer. In a top view of the semiconductor device, the protrusions are distributed in the region. Any straight path crossing through a central region of the region is always intersected with a portion of the protrusions.
    Type: Application
    Filed: March 29, 2023
    Publication date: July 27, 2023
    Applicant: United Microelectronics Corp.
    Inventors: To-Wen Tsao, Ching-Chang Hsu
  • Publication number: 20220223515
    Abstract: An interconnect structure is formed in a semiconductor device. The interconnect structure includes a dielectric layer disposed over a substrate. The dielectric layer includes a region and a plurality of protrusions. The protrusions are distributed in the region. A metal layer is disposed on the dielectric layer. Tops of the protrusions are exposed with respect to the metal layer. Any straight path crossing through a central region of the region is always intersected with a portion of the protrusions.
    Type: Application
    Filed: February 3, 2021
    Publication date: July 14, 2022
    Applicant: United Microelectronics Corp.
    Inventors: To-Wen Tsao, Ching-Chang Hsu
  • Publication number: 20220089990
    Abstract: The present invention relates to a composite membrane. The composite membrane includes: an elastic polymer substrate having a first surface processed by a surface modification; and a thermosensitive conductive layer formed on the first surface by performing a co-polymerization process, allowing an electrical current to pass through, and altering a hydrophilicity of a membrane surface in response to a change of a temperature.
    Type: Application
    Filed: October 22, 2020
    Publication date: March 24, 2022
    Applicant: National Central University
    Inventors: WEI-WEN HU, CHIA-WEN TSAO
  • Publication number: 20220088603
    Abstract: The present invention relates to a bioreactor. The bioreactor includes a fluidic channel layer including a set of channels configured to generate a suction caused by a negative pressure or a retrieval force caused by a positive pressure; an elastic conductive layer configured with a pair of electrodes, configured on the fluidic channel layer, driven by the suction or the retrieval force to have a deformation toward a deformation direction, and receiving a voltage difference by the pair of the electrodes to form an electrical field along an electrical field direction; and a culture layer configured on the elastic conductive layer and providing for a biological tissue to culture in vitro on the elastic conductive layer.
    Type: Application
    Filed: October 23, 2020
    Publication date: March 24, 2022
    Applicant: National Central University
    Inventors: CHIA-WEN TSAO, WEI-WEN HU
  • Publication number: 20190307210
    Abstract: The present disclosure illustrates a manufacturing method of a vamp with an embossed pattern comprising: (1) providing a plain cloth. (2) heating the plain cloth by an oven to soften the plain cloth. (3) cooling the plain cloth and forming an embossed pattern on the plain cloth by a cold pressing roller, and the cold pressing roller provided with a predetermined pattern. (4) forming an embossed layer with the embossed pattern on the plain cloth. Because of the cold pressing roller, a depth of the cooled embossed layer is the same as a depth of the predetermined pattern. Hence, the embossed pattern can maintain its appearance.
    Type: Application
    Filed: June 21, 2019
    Publication date: October 10, 2019
    Inventors: Wen-Tsao WEN, Yu-Chang WEN
  • Patent number: 10290576
    Abstract: A device comprises a metal via having a lower portion in a first etch stop layer and an upper portion in a first dielectric layer over a substrate, a second etch stop layer over and in direct contact with the first dielectric layer, a second dielectric layer over and in direct contact with the first etch stop layer, a stress reduction layer over and in direct contact with the second dielectric layer, a third etch stop layer over and in direct contact with the stress reduction layer and a metal structure over the metal via, wherein the metal structure comprises a lower portion in the second etch stop layer and the second dielectric layer and an upper portion in the stress reduction layer.
    Type: Grant
    Filed: January 3, 2018
    Date of Patent: May 14, 2019
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Ying-Ti Lu, Wen-Tsao Chen, Ming-Ray Mao, Kuan-Chi Tsai
  • Publication number: 20190105150
    Abstract: The present disclosure involves an ascending aorta graft apparatus and methods for use thereof. The graft is specially designed to treat an aortic dissection or aneurysm occurring at least partially in the region of the ascending aorta and the aortic arch. The ascending aorta graft features at least one bypass or jump graft that establishes fluid communication between two portions of the ascending aorta graft and enables the surgeon to expeditiously reestablish perfusion to at least one artery of the aortic branch immediately upon surgical placement of the ascending aorta graft. An integrated assembly is created with additional stent grafts and a thoracic stent graft that traverses the descending aorta.
    Type: Application
    Filed: October 10, 2018
    Publication date: April 11, 2019
    Inventor: Nai-Wen Tsao
  • Patent number: 10214854
    Abstract: A method of dyeing knitted fabrics and fabric and vamp fabric with predetermined color using the same are provided. The method includes steps of: providing a plain knitted fabric; entirely spray dyeing the fabric by dye liquor containing nano-particles through the printing and spraying process; executing a high temperature process or a steam process of a thermally drying process to the dyed knitted fabric so that the nano-particles can attach into the fabric of the knitted fabric, and forming the knitted fabric with the predetermined color after the knitted fabric is dyed. The fabric and the dyeing method provided can therefore reduce the production of sewage effectively.
    Type: Grant
    Filed: November 29, 2016
    Date of Patent: February 26, 2019
    Assignee: LONG JOHN TSUNG RIGHT INDUSTRIAL CO., LTD.
    Inventors: Wen-Tsao Wen, Yu-Chang Wen
  • Publication number: 20180305847
    Abstract: A recycled fabric structure is provided, which includes a plurality of types of blended yarn arranged by weaving or interlacing. Wherein, each of the types of the blended yarn has a plurality of first fibers and a plurality of second fibers vertically arranged and interloped with each other. The plurality of first fibers accounts for 30% to 50% of the total weight of the blended yarn. The first fiber is a recycled fiber.
    Type: Application
    Filed: February 11, 2018
    Publication date: October 25, 2018
    Inventors: WEN-TSAO WEN, Yu-Chang Wen
  • Publication number: 20180145025
    Abstract: A device comprises a metal via having a lower portion in a first etch stop layer and an upper portion in a first dielectric layer over a substrate, a second etch stop layer over and in direct contact with the first dielectric layer, a second dielectric layer over and in direct contact with the first etch stop layer, a stress reduction layer over and in direct contact with the second dielectric layer, a third etch stop layer over and in direct contact with the stress reduction layer and a metal structure over the metal via, wherein the metal structure comprises a lower portion in the second etch stop layer and the second dielectric layer and an upper portion in the stress reduction layer.
    Type: Application
    Filed: January 3, 2018
    Publication date: May 24, 2018
    Inventors: Ying-Ti Lu, Wen-Tsao Chen, Ming-Ray Mao, Kuan-Chi Tsai
  • Publication number: 20180078005
    Abstract: A zip fastener consisting of two zipper tapes, two series of interlocking teeth and a zipper slider is disclosed. Each interlocking tooth includes a front engagement end piece and a rear extension end piece respectively extended from a tooth body thereof in reversed direction. The rear extension end piece provides a track for supporting and guiding sliding movement of the zipper slider and an augmented portion that exhibits a visual indication.
    Type: Application
    Filed: August 27, 2017
    Publication date: March 22, 2018
    Inventor: Chang-Wen TSAO
  • Publication number: 20180010293
    Abstract: A method of dyeing knitted fabrics and fabric and vamp fabric with predetermined color using the same are provided. The method includes steps of: providing a plain knitted fabric; entirely spray dyeing the fabric by dye liquor containing nano-particles through the printing and spraying process; executing a high temperature process or a steam process of a thermally drying process to the dyed knitted fabric so that the nano-particles can attach into the fabric of the knitted fabric, and forming the knitted fabric with the predetermined color after the knitted fabric is dyed. The fabric and the dyeing method provided can therefore reduce the production of sewage effectively.
    Type: Application
    Filed: November 29, 2016
    Publication date: January 11, 2018
    Inventors: Wen-Tsao WEN, Yu-Chang WEN