Patents by Inventor Tobias ERLBACHER

Tobias ERLBACHER has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20180108788
    Abstract: The invention disclosure describes a manufacturing method for realizing so-called JBS areas for a unipolar power diode on the basis of diamond. In this special method, an n-doped layer is applied to the typically p-doped drift region, e.g. by means of epitaxial layer growth. The applied n-doped layer is then removed again in defined areas. A photolithographic mask may be applied and the n-doped layer is removed by dry or wet chemical etching. Having structured the JBS areas, the Schottky metal is applied to the entire surface. The resulting JBS structure shields an electric field generated by an applied reverse voltage from the Schottky transition. The reverse voltage from which the Schottky transition is fully shielded can be adjusted by altering the distance between the JBS areas.
    Type: Application
    Filed: October 17, 2016
    Publication date: April 19, 2018
    Inventors: Andreas Hürner, Tobias Erlbacher
  • Patent number: 9917146
    Abstract: An integrated capacitor includes a substrate with a first main surface area and an opposing second main surface area. A capacitor structure with a dielectric layer is integrated in the first main surface area. A compensation structure with a compensation layer is integrated in the second main surface area. The ratio between a surface enlargement of the second main surface area effected by the compensation structure corresponds to at least 30% of the surface enlargement of the first main surface area effected by the capacitor structure.
    Type: Grant
    Filed: August 29, 2016
    Date of Patent: March 13, 2018
    Assignee: FRAUNHOFER-GESELLSCHAFT ZUR FOERDERUNG DER ANGEWANDTEN FORSCHUNG E.V.
    Inventors: Anton Bauer, Tobias Erlbacher, Holger Schwarzmann
  • Patent number: 9893057
    Abstract: A monolithically integrated semiconductor switch, particularly a circuit breaker, has regenerative turn-off behavior. The semiconductor switch has two monolithically integrated field effect transistors, for example a p-JFET and a n-JFET. The source electrodes of both JFETs and the well region of the n-JFET are short circuited. In addition, the gate electrodes of both JFETs and the drain electrode of the p-JFET are short-circuited via the cathode. In contrast, the well region of the p-JFET is short-circuited to the anode. In this way, a monolithically integrated semiconductor switch is created which turns off automatically when a certain anode voltage level or a certain anode current level is exceeded. The threshold values for the anode voltage and the anode current can be set by appropriate dimensioning of the elements. In this way, it is possible to achieve blocking strengths of up to 200 kV with fast response behavior.
    Type: Grant
    Filed: May 3, 2017
    Date of Patent: February 13, 2018
    Assignee: FRAUNHOFER-GESELLSCHAFT ZUR FOERDERUNG DER ANGEWANDTEN FORSCHUNG E.V.
    Inventors: Andreas Huerner, Tobias Erlbacher
  • Patent number: 9865763
    Abstract: The present invention concerns a method for the detection of sunlight with a detector arrangement that delivers an output signal as a function of incident sunlight. In the method a detector arrangement is deployed with an SiC-semiconductor detector, which is only sensitive to the UV-component of the incident sunlight. By the deployment of such a detector arrangement a disturbance of the sunlight detection by artificial light sources is to a large extent avoided, so that a more reliable detection of the sunlight is enabled.
    Type: Grant
    Filed: December 14, 2015
    Date of Patent: January 9, 2018
    Assignee: FRAUNHOFER-GESELLSCHAFT ZUR FOERDERUNG DER ANGEWANDTEN FORSCHUNG E.V.
    Inventor: Tobias Erlbacher
  • Publication number: 20170323884
    Abstract: A monolithically integrated semiconductor switch, particularly a circuit breaker, has regenerative turn-off behaviour. The semiconductor switch has two monolithically integrated field effect transistors, for example a p-JFET and a n-JFET. The source electrodes of both JFETs and the well region of the n-JFET are short circuited. In addition, the gate electrodes of both JFETs and the drain electrode of the p-JFET are short-circuited via the cathode. In contrast, the well region of the p-JFET is short-circuited to the anode. In this way, a monolithically integrated semiconductor switch is created which turns off automatically when a certain anode voltage level or a certain anode current level is exceeded. The threshold values for the anode voltage and the anode current can be set by appropriate dimensioning of the elements. In this way, it is possible to achieve blocking strengths of up to 200 kV with fast response behaviour.
    Type: Application
    Filed: May 3, 2017
    Publication date: November 9, 2017
    Inventors: ANDREAS HUERNER, TOBIAS ERLBACHER
  • Publication number: 20160365408
    Abstract: An integrated capacitor includes a substrate with a first main surface area and an opposing second main surface area. A capacitor structure with a dielectric layer is integrated in the first main surface area. A compensation structure with a compensation layer is integrated in the second main surface area. The ratio between a surface enlargement of the second main surface area effected by the compensation structure corresponds to at least 30% of the surface enlargement of the first main surface area effected by the capacitor structure.
    Type: Application
    Filed: August 29, 2016
    Publication date: December 15, 2016
    Inventors: Anton BAUER, Tobias ERLBACHER, Holger SCHWARZMANN
  • Patent number: 9455151
    Abstract: An integrated capacitor includes a substrate with a first main surface area and an opposing second main surface area. A capacitor structure with a dielectric layer is integrated in the first main surface area. A compensation structure with a compensation layer is integrated in the second main surface area. The ratio between a surface enlargement of the second main surface area effected by the compensation structure corresponds to at least 30% of the surface enlargement of the first main surface area effected by the capacitor structure.
    Type: Grant
    Filed: November 21, 2014
    Date of Patent: September 27, 2016
    Assignee: Fraunhofer-Gesellschaft zur Foerderung der angewandten Forschung e.V.
    Inventors: Anton Bauer, Tobias Erlbacher, Holger Schwarzmann
  • Publication number: 20160190230
    Abstract: In a method for producing a capacitor, a dielectric structure is generated in a trench of a semiconductor substrate. The dielectric structure includes a plurality of adjacent dielectric layers having opposing material tensions.
    Type: Application
    Filed: November 24, 2015
    Publication date: June 30, 2016
    Inventors: Florian KRACH, Tobias ERLBACHER
  • Publication number: 20160172524
    Abstract: The present invention concerns a method for the detection of sunlight with a detector arrangement that delivers an output signal as a function of incident sunlight. In the method a detector arrangement is deployed with an SiC-semiconductor detector, which is only sensitive to the UV-component of the incident sunlight. By the deployment of such a detector arrangement a disturbance of the sunlight detection by artificial light sources is to a large extent avoided, so that a more reliable detection of the sunlight is enabled.
    Type: Application
    Filed: December 14, 2015
    Publication date: June 16, 2016
    Inventor: TOBIAS ERLBACHER
  • Patent number: 9337467
    Abstract: An electrical bypass element, suitable for bypassing defective storage cells in energy storage devices includes two electrical conductors between which is formed a layer sequence with at least one electrical insulation layer and one or more reactive layer stacks, in which an exothermic reaction can be triggered. The reactive layer stacks and the insulation layer are matched to one another such that the insulation layer disintegrates as a result of the thermal energy released during the exothermic reaction and an electrical connection is produced between the electrical conductors. The electrical bypass element can be actively triggered even before the ultimate failure of a storage cell so that higher power losses in the energy storage device can be avoided.
    Type: Grant
    Filed: March 25, 2013
    Date of Patent: May 10, 2016
    Assignee: FRAUNHOFER-GESELLSCHAFT ZUR FOERDERUNG DER ANGEWANDTEN FORSCHUNG E.V.
    Inventors: Joachim vom Dorp, Tobias Erlbacher, Lothar Frey
  • Publication number: 20150357680
    Abstract: A semiconductor substrate has a first doping region arranged at a surface and a second doping region adjacent to the first doping region. A p-n junction between the doping regions is at least partially arranged less than 5 ?m away from a contact area of the first doping region arranged at the substrate surface. A first contact structure is in contact with the first doping region in the contact area of the first doping region and has at least partially an electrically conductive material provided for a diffusion into the semiconductor substrate. The first contact structure is configured so that the conductive material provided for a diffusion into the substrate diffuses at least partially through the first doping region into the second doping region in case predefined trigger conditions occur. A second contact structure is in contact with the second doping region in a contact area of the second doping region.
    Type: Application
    Filed: May 22, 2015
    Publication date: December 10, 2015
    Inventors: Tobias Erlbacher, Vincent Lorentz, Reinhold Waller, Gudrun Rattmann
  • Publication number: 20150145104
    Abstract: An integrated capacitor includes a substrate with a first main surface area and an opposing second main surface area. A capacitor structure with a dielectric layer is integrated in the first main surface area. A compensation structure with a compensation layer is integrated in the second main surface area. The ratio between a surface enlargement of the second main surface area effected by the compensation structure corresponds to at least 30% of the surface enlargement of the first main surface area effected by the capacitor structure.
    Type: Application
    Filed: November 21, 2014
    Publication date: May 28, 2015
    Inventors: Anton BAUER, Tobias ERLBACHER, Holger SCHWARZMANN