Patents by Inventor Todd Austin

Todd Austin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20050125777
    Abstract: A method for analyzing the performance of a program when running in an interpreted environment. An interpreter is a program that translates and executes another program. To analyze a binary in an interpreted environment, a mechanism is used to indicate points in the program at source, intermediate, or binary showing where information about the system is to be tracked/profiled/analyzed. Once these analysis points are determined, triggers are created in a separate file or inserted via program instrumentation into the binary to indicate to the interpreter when the analysis triggers need to be processed. The system being analyzed is then run via an interpreter. When one of these triggers occurs during execution, the interpreter calls analysis code passing it the appropriate information so that it may track statistics, metrics, and information about the program corresponding to the trigger.
    Type: Application
    Filed: December 5, 2003
    Publication date: June 9, 2005
    Inventors: Brad Calder, Todd Austin, Don Yang, Timothy Sherwood
  • Publication number: 20050022094
    Abstract: An integrated circuit includes a plurality of processing stages each including processing logic 1014, a non-delayed signal-capture element 1016, a delayed signal-capture element 1018 and a comparator 1024. The non-delayed signal-capture element 1016 captures an output from the processing logic 1014 at a non-delayed capture time. At a later delayed capture time, the delayed signal-capture element 1018 also captures a value from the processing logic 1014. An error detection circuit 1026 and error correction circuit 1028 detect and correct random errors in the delayed value and supplies an error-checked delayed value to the comparator 1024. The comparator 1024 compares the error-checked delayed value and the non-delayed value and if they are not equal this indicates that the non-delayed value was captured too soon and should be replaced by the error-checked delayed value.
    Type: Application
    Filed: July 23, 2004
    Publication date: January 27, 2005
    Inventors: Trevor Mudge, Todd Austin, David Blaauw, Krisztian Flautner