Patents by Inventor Todd C. Sorenson

Todd C. Sorenson has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20190073280
    Abstract: A plurality of tasks are executed on a plurality of central processing units (CPUs) of a computational device. In response to an occurrence of an event in the computational device, one or more CPUs that are executing tasks associated with an event category to which the event belongs are stopped within a first predetermined amount of time. In response to stopping the one or more CPUs, a data set indicative of a state of the computational device is collected, for at most a second predetermined amount of time.
    Type: Application
    Filed: September 5, 2017
    Publication date: March 7, 2019
    Inventors: Matthew D. Carson, Trung N. Nguyen, Louis A. Rasor, Todd C. Sorenson
  • Publication number: 20190012165
    Abstract: Provided are techniques for concurrent Input/Output (I/O) enclosure firmware/Field-Programmable Gate Array (FPGA) update in a multi-node environment. First notifications are sent to each I/O enclosure management engine on each of a plurality of server nodes that code activation for a first set of I/O enclosures is starting. An update image is distributed to the first set of I/O enclosures. The update image on the first set of I/O enclosures is activated by sending an activate reset command to each of the first set of I/O enclosures, wherein a reset is not propagated to other devices within each I/O enclosure in the first set of I/O enclosures in response to determining that the reset is an activate reset. In response to the activate reset command completing, second notifications are sent to each I/O enclosure management engine that code activation for the first set of I/O enclosures has completed.
    Type: Application
    Filed: September 12, 2018
    Publication date: January 10, 2019
    Inventors: Gary W. Batchelor, Veronica S. Davila, Enrique Q. Garcia, Robin Han, Jay T. Kirch, Ronald D. Martens, Trung N. Nguyen, Brian A. Rinaldi, Todd C. Sorenson
  • Publication number: 20190004581
    Abstract: In one embodiment, a method includes determining a plurality of hardware components of a system. The method also includes power cycling a first hardware component of the plurality of hardware components of the system according to a dynamic schedule. Also, the method includes determining whether the first hardware component experienced a power-up failure resulting from the power cycling. Moreover, the method includes outputting an indication to replace and/or repair the first hardware component in response to a determination that the first hardware component experienced the power-up failure resulting from the power cycling. Other systems, methods, ad computer program products for preventing unexpected power-up failures of individual hardware components are described in accordance with more embodiments.
    Type: Application
    Filed: June 30, 2017
    Publication date: January 3, 2019
    Inventors: Matthew G. Borlick, Brian J. Cagno, Lokesh M. Gupta, Karl A. Nielsen, Todd C. Sorenson
  • Publication number: 20180341541
    Abstract: Provided are a method, a system, and a computer program product in which a storage controller determines one or more resources that are impacted by an error. A cleanup of tasks associated with the one or more resources that are impacted by the error is performed, to recover from the error, wherein host input/output (I/O) operations continue to be processed, and wherein tasks associated with other resources continue to execute.
    Type: Application
    Filed: August 2, 2018
    Publication date: November 29, 2018
    Inventors: Wang Ping He, Larry Juarez, Matthew J. Kalos, John N. McCauley, Louis A. Rasor, Brian A. Rinaldi, Todd C. Sorenson
  • Publication number: 20180341542
    Abstract: Provided are a method, a system, and a computer program product in which a storage controller determines one or more resources that are impacted by an error. A cleanup of tasks associated with the one or more resources that are impacted by the error is performed, to recover from the error, wherein host input/output (I/O) operations continue to be processed, and wherein tasks associated with other resources continue to execute.
    Type: Application
    Filed: August 2, 2018
    Publication date: November 29, 2018
    Inventors: Wang Ping He, Larry Juarez, Matthew J. Kalos, John N. McCauley, Louis A. Rasor, Brian A. Rinaldi, Todd C. Sorenson
  • Patent number: 10114633
    Abstract: Provided are techniques for concurrent Input/Output (I/O) enclosure firmware/Field-Programmable Gate Array (FPGA) update in a multi-node environment. First notifications are sent to each I/O enclosure management engine on each of a plurality of server nodes that code activation for a first set of I/O enclosures is starting. An update image is distributed to the first set of I/O enclosures. The update image on the first set of I/O enclosures is activated by sending an activate reset command to each of the first set of I/O enclosures, wherein a reset is not propagated to other devices within each I/O enclosure in the first set of I/O enclosures in response to determining that the reset is an activate reset. In response to the activate reset command completing, second notifications are sent to each I/O enclosure management engine that code activation for the first set of I/O enclosures has completed.
    Type: Grant
    Filed: December 8, 2016
    Date of Patent: October 30, 2018
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Gary W. Batchelor, Veronica S. Davila, Enrique Q. Garcia, Robin Han, Jay T. Kirch, Ronald D. Martens, Trung N. Nguyen, Brian A. Rinaldi, Todd C. Sorenson
  • Patent number: 10067818
    Abstract: Provided are a method, a system, and a computer program product in which a storage controller determines one or more resources that are impacted by an error. A cleanup of tasks associated with the one or more resources that are impacted by the error is performed, to recover from the error, wherein host input/output (I/O) operations continue to be processed, and wherein tasks associated with other resources continue to execute.
    Type: Grant
    Filed: July 29, 2016
    Date of Patent: September 4, 2018
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Wang Ping He, Larry Juarez, Matthew J. Kalos, John N. McCauley, Louis A. Rasor, Brian A. Rinaldi, Todd C. Sorenson
  • Patent number: 10013171
    Abstract: A method for reducing stress on a RAID under rebuild is disclosed herein. In one embodiment, such a method includes performing the following actions while the RAID is undergoing a rebuild process: (1) redirect writes intended for the RAID to a temporary storage area located on a same primary storage system as the RAID, and (2) redirect reads intended for the RAID to a secondary storage system configured to store a copy of data in the RAID. The method is further configured to perform the following actions upon completing the rebuild process: (3) update the rebuilt RAID to reflect writes made to the temporary storage area during the rebuild process, and (4) redirect reads and writes to the rebuilt RAID. A corresponding system and computer program product are also disclosed.
    Type: Grant
    Filed: June 29, 2015
    Date of Patent: July 3, 2018
    Assignee: International Business Machines Corporation
    Inventors: Herve G. P. Andre, Rashmi Chandra, Glynis G. Dsouza, Larry Juarez, Tony Leung, Igor Popov, Jacob L. Sheppard, Todd C. Sorenson
  • Patent number: 10007583
    Abstract: Provided are a computer program product, system, and method for generating data structure to maintain error and connection information on components and use the data structure to determine an error correction operation. For each of a plurality of first level components in enclosures connected to second level components, errors at the first level component and a connection between the first level component to one of the second level components are determined and error variables are set to indicate whether an error was reported at the first level component. A data structure is generated indicating connections among the first level components and the second level components. The error variable values and the data structure are used to determine an error correction operation with respect to at least one of the first level component and the connected second level component.
    Type: Grant
    Filed: February 19, 2016
    Date of Patent: June 26, 2018
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Xue Dong Gao, Chang Ping Lu, Todd C. Sorenson, Jeffrey R. Steffan
  • Publication number: 20180165082
    Abstract: Provided are techniques for concurrent Input/Output (I/O) enclosure firmware/Field-Programmable Gate Array (FPGA) update in a multi-node environment. First notifications are sent to each I/O enclosure management engine on each of a plurality of server nodes that code activation for a first set of I/O enclosures is starting. An update image is distributed to the first set of I/O enclosures. The update image on the first set of I/O enclosures is activated by sending an activate reset command to each of the first set of I/O enclosures, wherein a reset is not propagated to other devices within each I/O enclosure in the first set of I/O enclosures in response to determining that the reset is an activate reset. In response to the activate reset command completing, second notifications are sent to each I/O enclosure management engine that code activation for the first set of I/O enclosures has completed.
    Type: Application
    Filed: December 8, 2016
    Publication date: June 14, 2018
    Inventors: Gary W. Batchelor, Veronica S. Davila, Enrique Q. Garcia, Robin Han, Jay T. Kirch, Ronald D. Martens, Trung N. Nguyen, Brian A. Rinaldi, Todd C. Sorenson
  • Publication number: 20180160561
    Abstract: Provided are techniques for detecting a type of storage adapter connected to an Input/Output (I/O) bay and miscabling of a microbay housing the storage adapter. Under control of an Input/Ouput (I/O) bay, cable sidebands are driven high for a predetermined period of time. It is determined whether a cable sidebands response has been detected that indicates that the cable sidebands have been driven low. In response to determining that the cable sidebands response has been detected, it is determined that the I/O bay is connected to a first storage adapter supporting a first protocol for the cable sidebands. In response to determining that the cable sidebands response has not been detected, it is determined that the I/O bay is connected to a second storage adapter supporting a second protocol for the cable sidebands. Moreover, I/O bay and port numbers stored by the microbay are used to determine miscabling.
    Type: Application
    Filed: December 5, 2016
    Publication date: June 7, 2018
    Inventors: Gary W. Batchelor, Enrique Q. Garcia, Jay T. Kirch, Trung N. Nguyen, Todd C. Sorenson
  • Publication number: 20180143774
    Abstract: Event detection logic detects events which may be associated with a change in risk of potential data loss in a data replication system. Mode selection logic is responsive to detection of such an event to select a data replication mode such as a synchronous data replication mode, for example, as a function of a detected event for initiation of a switch to the selected mode. In one embodiment, upon detecting that the event which lead to initiation of a switch to the synchronous mode has been completed or otherwise resolved, the mode selection logic can initiation of a switch of the data replication mode of multi-mode data replication logic back to an asynchronous mode so that data is replicated in the asynchronous data replication mode. Other features and aspects may be realized, depending upon the particular application.
    Type: Application
    Filed: November 18, 2016
    Publication date: May 24, 2018
    Inventors: Matthew D. Carson, Joshua J. Crawford, David Fei, Larry Juarez, Jay T. Kirch, Sean P. Riley, Todd C. Sorenson, Maoyun Tang, Matthew J. Ward
  • Patent number: 9959163
    Abstract: Provided are a computer program product, system, and method for processing main cause errors and sympathetic errors in devices in a system. Error data for the devices in the system are analyzed to determine a main cause error for one of the devices that cause at least one sympathetic error in the system. A main cause event object for the determined main cause error and at least one sympathetic event object for the determined at least one sympathetic error resulting from the main cause error are generated. A determination is made from the at least one sympathetic event object of at least one sympathetic event action to perform. The determined at least one sympathetic event action is performed to recover from the at least one sympathetic error represented by the at least one sympathetic event object providing the at least one sympathetic event action.
    Type: Grant
    Filed: May 3, 2016
    Date of Patent: May 1, 2018
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Ricardo S. Padilla, Todd C. Sorenson, David V. Valverde, Wang Ping He
  • Patent number: 9946618
    Abstract: Provided are a computer program product, system, and method for a computer program product, system, and method for determining an availability score based on available resources of different resource types in a distributed computing environment of storage servers to determine whether to perform a failure operation for one of the storage servers. A health status monitor program deployed in the storage servers performs: maintaining information indicating availability of a plurality of storage server resources for a plurality of resource types; calculating an availability score as a function of a number of available resources of the resource types; and transmitting information on the availability score to a management program. The management program uses the transmitted information to determine whether to migrate services from the storage server from which the availability score is received to at least one of the other storage servers in the distributed computing environment.
    Type: Grant
    Filed: July 8, 2016
    Date of Patent: April 17, 2018
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Herve G. P. Andre, Matthew D. Carson, Rashmi Chandra, Clint A. Hardy, Larry Juarez, Tony Leung, Todd C. Sorenson
  • Patent number: 9946628
    Abstract: Provided are a computer program product, system, and method for embedding and executing trace functions in code to gather trace data. A plurality of trace functions are embedded in the code. For each embedded trace function, a trace level is included indicating code to which the trace applies. The trace level comprises one of a plurality of levels. During the execution of the code, the embedded trace functions having one of the levels associated with a specified at least one level specified are executed. The embedded trace functions associated with at least one level not comprising one of the at least one specified level are not invoked.
    Type: Grant
    Filed: April 22, 2016
    Date of Patent: April 17, 2018
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Herve G. P. Andre, Yolanda Colpo, Enrique Q. Garcia, Mark E. Hack, Larry Juarez, Ricardo S. Padilla, Todd C. Sorenson
  • Publication number: 20180102966
    Abstract: In accordance with one aspect of the present description, a node of the distributed computing system has multiple communication paths to a data processing resource lock which controls access to shared resources, for example. In this manner, at least one redundant communication path is provided between a node and a data processing resource lock to facilitate reliable transmission of data processing resource lock signals between the node and the data processing resource lock. Other features and aspects may be realized, depending upon the particular application.
    Type: Application
    Filed: November 30, 2017
    Publication date: April 12, 2018
    Inventors: Yolanda Colpo, John C. Elliott, Enrique Q. Garcia, Larry Juarez, Todd C. Sorenson
  • Publication number: 20180081772
    Abstract: Power line disturbance hold up times are dynamically adjusted based on battery capacity of a plurality of batteries in a plurality of racks upon determining an amount of the power line disturbance one of the plurality of racks, having a fewest number of remaining batteries of the plurality of batteries with the battery capacity, is able to support.
    Type: Application
    Filed: November 29, 2017
    Publication date: March 22, 2018
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Mann DU, Ya-Huey JUAN, Larry JUAREZ, Brian C. KRAEMER, Ronald D. MARTENS, Su QIN, Todd C. SORENSON, Ji Qiu XU
  • Patent number: 9910609
    Abstract: A determination is made as to whether a plurality of storage volumes controlled by a processor complex are secondary storage volumes that are in an asynchronous copy relationship with a plurality of primary storage volumes. A storage device timeout value for a storage device that stores the plurality of storage volumes is changed from a predetermined low value to a predetermined high value, wherein the predetermined high value is indicative of a greater duration of time than the predetermined low value, in response to determining that each of the plurality of storage volumes controlled by the processor complex and stored in the storage device are secondary storage volumes that are in the asynchronous copy relationship with the plurality of primary storage volumes.
    Type: Grant
    Filed: November 2, 2016
    Date of Patent: March 6, 2018
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Matthew G. Borlick, Karl A. Nielsen, Richard P. Oubre, Jr., Todd C. Sorenson
  • Publication number: 20180060158
    Abstract: In one aspect, multiple data path error collection is provided in a storage management system. In one embodiment, an error condition in a main data path between the storage controller and at least one of a host and a storage unit is detected, and in response, a sequence of error data collection operations to collect error data through a main path is initiated. In response to a failure to collect error data at a level of the sequential error data collection operations, error data is collected through an alternate data path as a function of the error data collection level at which the failure occurred. Other aspects are described.
    Type: Application
    Filed: November 6, 2017
    Publication date: March 1, 2018
    Inventors: Gary W. Batchelor, Matthew D. Carson, Enrique Q. Garcia, Larry Juarez, Jay T. Kirch, Tony Leung, Trung N. Nguyen, Brian A. Rinaldi, Todd C. Sorenson
  • Publication number: 20180060200
    Abstract: Provided are a computer program product, system, and method for a computer program product, system, and method for determining an availability score based on available resources of different resource types in a distributed computing environment of storage servers to determine whether to perform a failure operation for one of the storage servers. A health status monitor program deployed in the storage servers performs: maintaining information indicating availability of a plurality of storage server resources for a plurality of resource types; calculating an availability score as a function of a number of available resources of the resource types; and transmitting information on the availability score to a management program. The management program uses the transmitted information to determine whether to migrate services from the storage server from which the availability score is received to at least one of the other storage servers in the distributed computing environment.
    Type: Application
    Filed: October 25, 2017
    Publication date: March 1, 2018
    Inventors: Herve G.P. Andre, Matthew D. Carson, Rashmi Chandra, Clint A. Hardy, Larry Juarez, Tony Leung, Todd C. Sorenson