Abstract: A manufacturing method of a semiconductor device comprises a step of ion-implanting a P-type impurity at a first dose amount to form semiconductor regions that are low concentration semiconductor regions of a high breakdown voltage P-type transistor, and a step of ion-implanting a P-type impurity at a second dose amount to form P? semiconductor regions that are low concentration semiconductor regions of a low breakdown voltage P-type transistor and form a P-type impurity layer that is a resistance portion of a polysilicon resistor. The manufacturing method further comprises a resistance portion forming step in which a resistance portion of the polysilicon resistor is made thinner than terminal portions at both ends of the resistance portion, and the second dose amount is larger than the first dose amount.

Abstract: A semiconductor device aims to prevent a leak current from flowing between a well and a corner of an active region formed on an upper surface of another well in an SRAM. In a memory cell of the SRAM, a load MOSFET is formed. An end of an active region extending in y-direction is arranged to gradually go away from a p-well as it goes from a gate electrode G2 side to a gate electrode G4 side in such a manner that a distance in x-direction between the end of the active region and the p-well is larger than a shortest distance in the x-direction between the p-well and the active region.

Abstract: Provided is an SOI substrate which has a substrate, an insulating layer formed over the substrate, and a semiconductor layer formed over the insulating layer. Optical waveguides are formed in the semiconductor layer of the SOI substrate. This substrate has a low resistance semiconductor layer and a high resistance semiconductor layer thereover. Further, wirings which are formed through insulating films are provided on the optical waveguides. In this manner, the low resistance semiconductor layer is arranged in the surface part of the substrate of the insulating films, thereby restraining an eddy current generated in the substrate due to an electric signal transmitted through the wirings.

Abstract: A manufacturing method of a semiconductor device comprises a step of ion-implanting a P-type impurity at a first dose amount to form semiconductor regions that are low concentration semiconductor regions of a high breakdown voltage P-type transistor, and a step of ion-implanting a P-type impurity at a second dose amount to form P? semiconductor regions that are low concentration semiconductor regions of a low breakdown voltage P-type transistor and form a P-type impurity layer that is a resistance portion of a polysilicon resistor. The manufacturing method further comprises a resistance portion forming step in which a resistance portion of the polysilicon resistor is made thinner than terminal portions at both ends of the resistance portion, and the second dose amount is larger than the first dose amount.

Abstract: A semiconductor device aims to prevent a leak current from flowing between a well and a corner of an active region formed on an upper surface of another well in an SRAM. In a memory cell of the SRAM, a load MOSFET is formed. An end of an active region extending in y-direction is arranged to gradually go away from a p-well as it goes from a gate electrode G2 side to a gate electrode G4 side in such a manner that a distance in x-direction between the end of the active region and the p-well is larger than a shortest distance in the x-direction between the p-well and the active region.

Abstract: A semiconductor device aims to prevent a leak current from flowing between a well and a corner of an active region formed on an upper surface of another well in an SRAM. In a memory cell of the SRAM, a load MOSFET is formed. An end of an active region extending in y-direction is arranged to gradually go away from a p-well as it goes from a gate electrode G2 side to a gate electrode G4 side in such a manner that a distance in x-direction between the end of the active region and the p-well is larger than a shortest distance in the x-direction between the p-well and the active region.

Abstract: A semiconductor device aims to prevent a leak current from flowing between a well and a corner of an active region formed on an upper surface of another well in an SRAM. In a memory cell of the SRAM, a load MOSFET is formed. An end of an active region extending in y-direction is arranged to gradually go away from a p-well as it goes from a gate electrode G2 side to a gate electrode G4 side in such a manner that a distance in x-direction between the end of the active region and the p-well is larger than a shortest distance in the x-direction between the p-well and the active region.

Abstract: Provided is an SOI substrate which has a substrate, an insulating layer formed over the substrate, and a semiconductor layer formed over the insulating layer. Optical waveguides are formed in the semiconductor layer of the SOI substrate. This substrate has a low resistance semiconductor layer and a high resistance semiconductor layer thereover. Further, wirings which are formed through insulating films are provided on the optical waveguides. In this manner, the low resistance semiconductor layer is arranged in the surface part of the substrate of the insulating films, thereby restraining an eddy current generated in the substrate due to an electric signal transmitted through the wirings.

Abstract: Performance of a semiconductor device is improved without increasing an area size of a semiconductor chip. For example, a source electrode of a power transistor and an upper electrode of a capacitor element have an overlapping portion. In other word, the upper electrode of the capacitor element is formed over the source electrode of the power transistor through a capacitor insulating film. That is, the power transistor and the capacitor element are arranged in a laminated manner in a thickness direction of the semiconductor chip. As a result, it becomes possible to add a capacitor element to be electrically coupled to the power transistor while suppressing an increase in planar size of the semiconductor chip.

Abstract: Performance of a semiconductor device is improved without increasing an area size of a semiconductor chip. For example, a source electrode of a power transistor and an upper electrode of a capacitor element have an overlapping portion. In other word, the upper electrode of the capacitor element is formed over the source electrode of the power transistor through a capacitor insulating film. That is, the power transistor and the capacitor element are arranged in a laminated manner in a thickness direction of the semiconductor chip. As a result, it becomes possible to add a capacitor element to be electrically coupled to the power transistor while suppressing an increase in planar size of the semiconductor chip.

Abstract: Performance of a semiconductor device is improved without increasing an area size of a semiconductor chip. For example, a source electrode of a power transistor and an upper electrode of a capacitor element have an overlapping portion. In other word, the upper electrode of the capacitor element is formed over the source electrode of the power transistor through a capacitor insulating film. That is, the power transistor and the capacitor element are arranged in a laminated manner in a thickness direction of the semiconductor chip. As a result, it becomes possible to add a capacitor element to be electrically coupled to the power transistor while suppressing an increase in planar size of the semiconductor chip.

Abstract: A semiconductor device including a first nitride semiconductor layer formed over a substrate, a second nitride semiconductor layer formed on the first nitride semiconductor layer and having a band gap wider than that of the first nitride semiconductor layer, a trench penetrating through the second nitride semiconductor layer to reach the middle of the first nitride semiconductor layer, a conductive film formed at a corner portion corresponding to an end portion of a bottom surface of the trench and a gate electrode disposed via a gate insulating film inside the trench including a region on the conductive film.

Abstract: A field plate causes excessive gate capacitance that interferes with high-speed transistor switching. To suppress the excessive gate capacitance, an aperture includes a first side wall positioned on the side of a drain electrode, and a second side wall positioned on the side of a source electrode. A gate electrode at the same time includes a first side surface facing opposite the drain electrode as seen from a plan view. The first side surface of the gate electrode is positioned on the inner side of the first side wall and the second side wall as seen from a flat view. Moreover, a portion of a first field plate is embedded between the first side surface and the first side wall. The gate electrode and the first field plate are electrically insulated by a first insulation member.

Abstract: A semiconductor device includes a buffer layer, a channel layer and a barrier layer formed over a substrate, a trench penetrating through the barrier layer to reach the middle of the channel layer, and a gate electrode disposed inside the trench via a gate insulating film. The channel layer contains n-type impurities, and a region of the channel layer positioned on a buffer layer side has an n-type impurity concentration larger than a region of the channel layer positioned on a barrier layer side, and the buffer layer is made of nitride semiconductor having a band gap wider than that of the channel layer. The channel layer is made of GaN and the buffer layer is made of AlGaN. The channel layer has a channel lower layer containing n-type impurities at an intermediate concentration and a main channel layer formed thereon and containing n-type impurities at a low concentration.

Abstract: A semiconductor device includes a buffer layer, a channel layer and a barrier layer formed over a substrate, a trench penetrating through the barrier layer to reach the middle of the channel layer, and a gate electrode disposed inside the trench via a gate insulating film. The channel layer contains n-type impurities, and a region of the channel layer positioned on a buffer layer side has an n-type impurity concentration larger than a region of the channel layer positioned on a barrier layer side, and the buffer layer is made of nitride semiconductor having a band gap wider than that of the channel layer. The channel layer is made of GaN and the buffer layer is made of AlGaN. The channel layer has a channel lower layer containing n-type impurities at an intermediate concentration and a main channel layer formed thereon and containing n-type impurities at a low concentration.

Abstract: An image-taking apparatus is disclosed which allows a selection of a type of image stabilization to be used from optical image stabilization and electronic image stabilization as required to provide an excellent output image. The image-taking apparatus has an image generator which is operable in a first mode in which it performs electronic image stabilization processing based on a plurality of images sequentially taken with an image-pickup device to generate an output image and a second mode in which it generates an output image without performing the electronic image stabilization processing on an image taken with the image-pickup device. The image-taking apparatus also has a controller which causes image stabilization operation to be performed through driving of an optical system in both of the first and second modes and selects one of the first mode and the second mode.

Abstract: A camera is provided which includes an image capturing element; a memory for recording images obtained from the image capturing element; and a controller for changing the number of recorded pixels of the images stored in the memory based on information about a lens apparatus that can be operatively connected to the camera.

Abstract: Provided are a lens apparatus and an optical apparatus having the same, the lens apparatus including a lens holding member holding a lens, a supporting member for supporting the lens holding member movably in the direction of the optical axis of the lens, a first drive mechanism for moving the supporting member in the direction of the optical axis, and a second drive mechanism for moving the lens holding member in the direction of the optical axis, wherein a focusing lens can be moved to an in-focus position within a short time and highly accurately by an AF system.

Abstract: A camera system has a recording portion for recording an object image, a display portion for displaying an object image, a first blur correction portion for correcting blur of the object image displayed on the display portion by signal processing, and a second blur correction portion for optically correcting blur of the object image recorded by the recording portion. The camera system includes a controller for switching between a first blur correction mode in which the first blur correction portion is operated, a second blur correction mode in which the second blur correction portion is operated and a third blur correction mode in which both the first blur correction portion and the second blur correction portion are operated.

Abstract: An image-taking apparatus is disclosed which allows a selection of a type of image stabilization to be used from optical image stabilization and electronic image stabilization as required to provide an excellent output image. The image-taking apparatus has an image generator which is operable in a first mode in which it performs electronic image stabilization processing based on a plurality of images sequentially taken with an image-pickup device to generate an output image and a second mode in which it generates an output image without performing the electronic image stabilization processing on an image taken with the image-pickup device. The image-taking apparatus also has a controller which causes image stabilization operation to be performed through driving of an optical system in both of the first and second modes and selects one of the first mode and the second mode.