Patents by Inventor Tokuhiko Tamaki

Tokuhiko Tamaki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6349401
    Abstract: A first to fifth plugs provide interconnection between each transistor and a first metallic interconnection layer. A sixth to eighth plugs provide interconnection between the first metallic interconnection layer and a second metallic interconnection layer. The total opening area of a connecting window including at least one connecting hole (or the number of connecting holes) is designed in a smaller zone when the type of electric current (waveform) is a bidirectional-directional current, when the flow: direction of electric current is from a plug to an interconnection line, when the length of interconnection line is long, or when the width of interconnection line is small. Such arrangement makes it possible to achieve a reduction of the area occupied by interconnections by performing layout design allowing for the permissible electric current amount, without having to prepare complicated tables or without having to perform huge amounts of arithmetic processing.
    Type: Grant
    Filed: September 10, 1997
    Date of Patent: February 19, 2002
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventor: Tokuhiko Tamaki
  • Patent number: 6311315
    Abstract: A first to fifth plugs provide interconnection between each transistor and a first metallic interconnection layer. A sixth to eighth plugs provide interconnection between the first metallic interconnection layer and a second metallic interconnection layer. The total opening area of a connecting window including at least one connecting hole (or the number of connecting holes) is designed in a smaller zone when the type of electric current (waveform) is a bidirectional-directional current, when the flow direction of electric current is from a plug to an interconnection line, when the length of interconnection line is long, or when the width of interconnection line is small. Such arrangement makes it possible to achieve a reduction of the area occupied by interconnections by performing layout design allowing for the permissible electric current amount, without having to prepare complicated tables or without having to perform huge amounts of arithmetic processing.
    Type: Grant
    Filed: November 8, 1999
    Date of Patent: October 30, 2001
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventor: Tokuhiko Tamaki
  • Publication number: 20010029667
    Abstract: A silicon substrate on which a silicon dioxide film having a groove is formed is placed on a sample stage disposed in a vacuum chamber. Subsequently, a titanium film and a tungsten film are deposited sequentially on the silicon dioxide film. The surface of the tungsten film is nitrided by using a plasma under the pressure maintained at 10 Pa or higher inside the vacuum chamber, so as to form a tungsten nitride film. After a copper film is deposited on the tungsten nitride film, the portions of the titanium film, tungsten film, tungsten nitride film, and copper film located outside the groove are removed, thus forming a buried interconnecting wire made of copper.
    Type: Application
    Filed: April 3, 2001
    Publication date: October 18, 2001
    Applicant: Matsushita Electric Industrial Co., Ltd.
    Inventor: Tokuhiko Tamaki
  • Publication number: 20010015464
    Abstract: A first to fifth plugs provide interconnection between each transistor and a first metallic interconnection layer. A sixth to eighth plugs provide interconnection between the first metallic interconnection layer and a second metallic interconnection layer. The total opening area of a connecting window including at least one connecting hole (or the number of connecting holes) is designed in a smaller zone when the type of electric current (waveform) is a bidirectional-directional current, when the flow direction of electric current is from a plug to an interconnection line, when the length of interconnection line is long, or when the width of interconnection line is small. Such arrangement makes it possible to achieve a reduction of the area occupied by interconnections by performing layout design allowing for the permissible electric current amount, without having to prepare complicated tables or without having to perform huge amounts of arithmetic processing.
    Type: Application
    Filed: September 10, 1997
    Publication date: August 23, 2001
    Inventor: TOKUHIKO TAMAKI
  • Patent number: 6260266
    Abstract: A silicon substrate on which a silicon dioxide film having a groove is formed is placed on a sample stage disposed in a vacuum chamber. Subsequently, a titanium film and a tungsten film are deposited sequentially on the silicon dioxide film. The surface of the tungsten film is nitrided by using a plasma under the pressure maintained at 10 Pa or higher inside the vacuum chamber, so as to form a tungsten nitride film. After a copper film is deposited on the tungsten nitride film, the portions of the titanium film, tungsten film, tungsten nitride film, and copper film located outside the groove are removed, thus forming a buried interconnecting wire made of copper.
    Type: Grant
    Filed: November 8, 1996
    Date of Patent: July 17, 2001
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventor: Tokuhiko Tamaki
  • Patent number: 6089183
    Abstract: In performing plasma etching or plasma CVD, a gas containing an interhalogen compound gas or a XeF.sub.2 gas is used as a process gas. Such a process gas generates, in the state of non-plasma and with activation energy lower than a specified level, a volatile material from a deposition species generated in the above etching so as to contribute to the suppression of film formation. For example, the XeF.sub.2 gas, a BrF.sub.3 gas, a BrCl gas are used in the cases of etching a silicon dioxide film, a silicide film, and a polysilicon film, respectively. On the surface of a substrate is formed a non-volatile protective film so as to improve the profiles of an opening. At the wall surface of a reaction chamber which is barely influenced by the plasma, the deposition species is turned into a volatile material (e.g., SiF.sub.4) so as to suppress the deposition of reaction products thereon. If the interhalogen compound gas, XeF.sub.
    Type: Grant
    Filed: March 6, 1998
    Date of Patent: July 18, 2000
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Shinichi Imai, Tokuhiko Tamaki
  • Patent number: 5780898
    Abstract: On a semiconductor substrate made of p-type silicon, there are formed, in a successively layered fashion, a first p-type silicon semiconductor layer, laterally paired first n-type silicon semiconductor layers, laterally paired second p-type silicon semiconductor layers, and laterally paired n-type silicon semiconductor layers, by an epitaxial growth method. On the second n-type silicon semiconductor layer on the right side, there are successively formed a third p-type silicon semiconductor layer, a third n-type silicon semiconductor layer and a fourth p-type silicon semiconductor layer. The left first n-type silicon semiconductor layer, left second p-type silicon semiconductor layer and left second n-type silicon semiconductor layer form a first insular multilayered portion forming an n-channel MOSFET. The third p-type silicon semiconductor layer, third n-type silicon semiconductor layer and fourth p-type silicon semiconductor layer form a second insular portion forming a p-channel MOSFET.
    Type: Grant
    Filed: May 15, 1997
    Date of Patent: July 14, 1998
    Assignee: Matsushita Electric Industrial Co. Ltd.
    Inventors: Tokuhiko Tamaki, Tatsuo Sugiyama, Hiroaki Nakaoka
  • Patent number: 5767021
    Abstract: In performing plasma etching or plasma CVD, a gas containing an interhalogen compound gas or a XeF.sub.2 gas is used as a process gas. Such a process gas generates, in the state of non-plasma and with activation energy lower than a specified level, a volatile material from a deposition species generated in the above etching so as to contribute to the suppression of film formation. For example, the XeF.sub.2 gas, a BrF.sub.3 gas, a BrCl gas are used in the cases of etching a silicon dioxide film, a silicide film, and a polysilicon film, respectively. On the surface of a substrate is formed a non-volatile protective film so as to improve the profiles of an opening. At the wall surface of a reaction chamber which is barely influenced by the plasma, the deposition species is turned into a volatile material (e.g., SiF.sub.4) so as to suppress the deposition of reaction products thereon. If the interhalogen compound gas, XeF.sub.
    Type: Grant
    Filed: June 25, 1997
    Date of Patent: June 16, 1998
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Shinichi Imai, Tokuhiko Tamaki
  • Patent number: 5753066
    Abstract: An apparatus for generating plasma is disclosed. The apparatus comprises: a plasma chamber; pairs of parallel plate electrodes; and a power supply for applying high-frequency powers on the pairs of electrodes. The frequencies of the high-frequency powers and the phase difference between the high-frequency powers are adjusted so as to cause each of electrons in the plasma to move in a circular path. A dense and highly uniform plasma is generated at a low pressure level, by utilizing the phenomenon of the oscillation, revolution or cycloidal motion of electrons in a high-frequency electric field formed between the parallel plate electrodes. This plasma is suitable for etching in the LSI fabrication process.
    Type: Grant
    Filed: September 12, 1996
    Date of Patent: May 19, 1998
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Masafumi Kubota, Noboru Nomura, Tokuhiko Tamaki
  • Patent number: 5716494
    Abstract: In performing plasma etching or plasma CVD, a gas containing an interhalogen compound gas or a XeF.sub.2 gas is used as a process gas. Such a process gas generates, in the state of non-plasma and with activation energy lower than a specified level, a volatile material from a deposition species generated in the above etching so as to contribute to the suppression of film formation. For example, the XeF.sub.2 gas, a BrF.sub.3 gas, a BrCl gas are used in the cases of etching a silicon dioxide film, a silicide film, and a polysilicon film, respectively. On the surface of a substrate is formed a non-volatile protective film so as to improve the profiles of an opening. At the wall surface of a reaction chamber which is barely influenced by the plasma, the deposition species is turned into a volatile material (e.g., SiF.sub.4) so as to suppress the deposition of reaction products thereon. If the interhalogen compound gas, XeF.sub.
    Type: Grant
    Filed: December 29, 1994
    Date of Patent: February 10, 1998
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Shinichi Imai, Tokuhiko Tamaki
  • Patent number: 5696008
    Abstract: On a semiconductor substrate made of p-type silicon, there are formed, in a successively layered fashion, a first p-type silicon semiconductor layer, laterally paired first n-type silicon semiconductor layers, laterally paired second p-type silicon semiconductor layers, and laterally paired n-type silicon semiconductor layers, by an epitaxial growth method. On the second n-type silicon semiconductor layer on the right side, there are successively formed a third p-type silicon semiconductor layer, a third n-type silicon semiconductor layer and a fourth p-type silicon semiconductor layer. The left first n-type silicon semiconductor layer, left second p-type silicon semiconductor layer and left second n-type silicon semiconductor layer form a first insular multilayered portion forming an n-channel MOSFET. The third p-type silicon semiconductor layer, third n-type silicon semiconductor layer and fourth p-type silicon semiconductor layer form a second insular portion forming a p-channel MOSFET.
    Type: Grant
    Filed: June 21, 1996
    Date of Patent: December 9, 1997
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Tokuhiko Tamaki, Tatsuo Sugiyama, Hiroaki Nakaoka
  • Patent number: 5670810
    Abstract: On a semiconductor substrate made of p-type silicon, there are formed, in a successively layered fashion, a first p-type silicon semiconductor layer, laterally paired first n-type silicon semiconductor layers, laterally paired second p-type silicon semiconductor layers, and laterally paired n-type silicon semiconductor layers, by an epitaxial growth method. On the second n-type silicon semiconductor layer on the right side, there are successively formed a third p-type silicon semiconductor layer, a third n-type silicon semiconductor layer and a fourth p-type silicon semiconductor layer. The left first n-type silicon semiconductor layer, left second p-type silicon semiconductor layer and left second n-type silicon semiconductor layer form a first insular multilayered portion forming an n-channel MOSFET. The third p-type silicon semiconductor layer, third n-type silicon semiconductor layer and fourth p-type silicon semiconductor layer form a second insular portion forming a p-channel MOSFET.
    Type: Grant
    Filed: August 24, 1995
    Date of Patent: September 23, 1997
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Tokuhiko Tamaki, Tatsuo Sugiyama, Hiroaki Nakaoka
  • Patent number: 5593539
    Abstract: An apparatus for generating plasma is disclosed. The apparatus comprises: a plasma chamber; pairs of parallel plate electrodes; and a power supply for applying high-frequency powers on the pairs of electrodes. The frequencies of the high-frequency powers and the phase difference between the high-frequency powers are adjusted so as to cause each of electrons in the plasma to move in a circular path. A dense and highly uniform plasma is generated at a low pressure level, by utilizing the phenomenon of the oscillation, revolution or cycloidal motion of electrons in a high-frequency electric field formed between the parallel plate electrodes. This plasma is suitable for etching in the LSI fabrication process.
    Type: Grant
    Filed: April 8, 1994
    Date of Patent: January 14, 1997
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Masafumi Kubota, Noboru Nomura, Tokuhiko Tamaki
  • Patent number: 5546890
    Abstract: Inert gas is introduced in and then discharged from the inside of a pneumatic device such as a chamber, a pipe or the like which is used for producing semiconductor devices and through which interhalogen compound gas passes. Then, gas having humidity exceeding 1% is introduced into the chamber or the like. Before the gas having humidity exceeding 1% is introduced into the chamber or the like, the interhalogen compound gas in the chamber or the like is lowered in concentration to such an extent that the inner wall of the chamber or the like is not corroded. Thereafter, when the gas having humidity exceeding 1% is introduced, the interhalogen compound (for example, ClF.sub.3 gas) is decomposed into a substance such as HF or the like of which toxicity is low and of which adsorptivity to the inner wall of the chamber or the like is also low. Thereafter, the inside of the chamber or the like is opened to atmosphere.
    Type: Grant
    Filed: February 21, 1995
    Date of Patent: August 20, 1996
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Tokuhiko Tamaki, Shinichi Imai
  • Patent number: 5436424
    Abstract: A plasma generating apparatus includes a vacuum chamber having an insulated inner surface, more than two electrodes arranged on the insulated inner surface of the vacuum chamber, a high frequency applying device for applying high frequencies having different phases in order of positions of the electrodes, and a holder on which an object to be processed is placed. In the apparatus, a magnetic field is produced under plural alternating electric fields, so that electrons in a plasma generating portion are rotated to generate high density plasma under a high vacuum when the high frequencies are applied to the electrodes to generate the plasma and a specified process such as etching, CVD, or doping is carried on the object by reaction products generated at the portion.
    Type: Grant
    Filed: June 24, 1993
    Date of Patent: July 25, 1995
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Ichiro Nakayama, Noboru Nomura, Tokuhiko Tamaki, Mitsuhiro Okuni, Masafumi Kubota
  • Patent number: 5424905
    Abstract: Three electrodes are disposed at lateral sides of a plasma generating chamber of an etching apparatus serving as a plasma generating apparatus. A sample stage is disposed at a lower part of the plasma generating chamber, and an opposite electrode is disposed at an upper part thereof. High frequency electric power having a first frequency is supplied to the sample stage and the opposite electrode. Respectively supplied to the three electrodes 4, 5, 6 are high frequency electric powers which are oscillated by a three-phase magnetron, which have a second frequency different from the first frequency and of which respective phases are successively different by about 120.degree. from one another, thus forming a rotational electric field in the plasma generating chamber.
    Type: Grant
    Filed: March 30, 1993
    Date of Patent: June 13, 1995
    Assignee: Matsushita Electric Company, Ltd.
    Inventors: Noboru Nomura, Kenji Harafuji, Masafumi Kubota, Tokuhiko Tamaki, Mitsuhiro Ohkuni, Ichiro Nakayama
  • Patent number: 5404079
    Abstract: On the inner surface of a chamber are circumferentially disposed three lateral electrodes at regular intervals. To the lateral electrodes are applied three high-frequency electric powers of 50 MHz, each differing in phase by approximately 120.degree.. On the bottom of the chamber is placed a sample stage serving as a second electrode, around which is provided a ring-shaped earth electrode. To the sample stage is applied high-frequency electric power of 13.56 MHz. The distance between each of the three lateral electrodes and the earth electrode is longer than the distance between the sample stage and the earth electrode.
    Type: Grant
    Filed: July 27, 1993
    Date of Patent: April 4, 1995
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Mitsuhiro Ohkuni, Masafumi Kubota, Noboru Nomura, Ichiro Nakayama, Tokuhiko Tamaki
  • Patent number: 5345145
    Abstract: A plasma generating method comprises: a first step of disposing a plurality of lateral electrodes at lateral sides of a plasma generating part in a vacuum chamber; a second step of respectively applying, to the lateral electrodes, high frequency electric powers of which frequencies are the same as one another and of which phases are different from one another, thereby to excite, in the plasma generating part, a high frequency rotating electric field to cause electrons under translational motions in the plasma generating part to present oscillating or rotating motions; and a third step of applying, to the plasma generating part, a magnetic field substantially at a right angle to the working plane of the high frequency rotating electric field, thereby to convert the translational movement of the electrons in the plasma generating part into revolving motions under oscillating or rotating motions by which the electrons revolve in the plasma generating part.
    Type: Grant
    Filed: March 30, 1993
    Date of Patent: September 6, 1994
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Kenji Harafuji, Mitsuhiro Ohkuni, Tokuhiko Tamaki, Masafumi Kubota, Noboru Nomura
  • Patent number: 5332880
    Abstract: At lateral sides of a plasma generating part under a vacuum, first to fourth lateral electrodes are so disposed as to surround the plasma generating part. High frequency electric power is supplied to the first lateral electrode from a first high frequency power supply, high frequency electric power is supplied to the second lateral electrode from the first high frequency power supply through a first delay circuit, high frequency electric power is supplied to the third lateral electrode from the first high frequency power supply through the first delay circuit and through a second delay circuit, and high frequency electric power is supplied to the fourth lateral electrode from the first high frequency power supply through the first and second delay circuits and through a third delay circuit.
    Type: Grant
    Filed: March 30, 1993
    Date of Patent: July 26, 1994
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Masafumi Kubota, Kenji Harafuji, Tokuhiko Tamaki, Mitsuhiro Ohkuni, Noboru Nomura, Ichiro Nakayama
  • Patent number: 5330606
    Abstract: An apparatus for generating plasma is disclosed. The apparatus comprises: a plasma chamber; pairs of parallel plate electrodes; and a power supply for applying high-frequency powers on the pairs of electrodes. The frequencies of the high-frequency powers and the phase difference between the high-frequency powers are adjusted so as to cause each of electrons in the plasma to move in a circular path. A dense and highly uniform plasma is generated at a low pressure level, by utilizing the phenomenon of the oscillation, revolution or cycloidal motion of electrons in a high-frequency electric field formed between the parallel plate electrodes. This plasma is suitable for etching in the LSI fabrication process.
    Type: Grant
    Filed: December 10, 1991
    Date of Patent: July 19, 1994
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Masafumi Kubota, Noboru Nomura, Tokuhiko Tamaki