Patents by Inventor Tokuro Kubo

Tokuro Kubo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7496152
    Abstract: Disclosed is an adaptive control apparatus having an error calculation unit for calculating the difference between a reference signal and a feedback signal, and an adaptive controller for applying adaptive control so as to diminish the difference and causing the result of adaptive control to be reflected in the reference signal. The adaptive control apparatus has a delay unit for delaying at least one of the reference signal and feedback signal by a set delay time in such a manner that the reference signal and feedback signal will be input simultaneously to the arithmetic unit; a frequency-component detecting unit for detecting a frequency component of the reference signal; a delay-time acquisition unit for acquiring delay time conforming to the frequency component; and a delay-time setting unit for setting the acquired delay time in the delay unit.
    Type: Grant
    Filed: October 26, 2004
    Date of Patent: February 24, 2009
    Assignee: Fujitsu Limited
    Inventors: Kazuo Nagatani, Tokuro Kubo, Hiroyoshi Ishikawa, Yasuyuki Oishi, Toru Maniwa, Hiroyuki Hayashi, Hajime Hamada, Nobukazu Fudaba
  • Patent number: 7447485
    Abstract: A device is disclosed that includes an amplification part for a linear transmitter, the amplification part being configured to amplify a transmission signal in accordance with a supply voltage control signal; a generation part configured to generate a power supply signal showing the level of the transmission signal; and a control part configured to output the supply voltage control signal based on the power supply signal. The control part includes a storage part configured to store a series of values of the power supply signal belonging to a time range including a certain point of time; and an output part configured to output a maximum one of a predetermined number of values of the series of values of the power supply signal as the supply voltage control signal at the certain point of time.
    Type: Grant
    Filed: March 6, 2006
    Date of Patent: November 4, 2008
    Assignee: Fujitsu Limited
    Inventors: Hiroyoshi Ishikawa, Kazuo Nagatani, Hajime Hamada, Nobukazu Fudaba, Tokuro Kubo
  • Patent number: 7447484
    Abstract: A timing controller is disclosed that includes: an amplifier part configured to amplify a first input signal in accordance with a control voltage, the first input signal being one of a transmission signal and a signal of a fixed value; a detector part configured to detect envelope information from the output signal of the amplifier part; a controller part configured to determine a delay difference from the transmission signal and the envelope information and transmit a timing control signal based on the delay difference; and a delay corrector part configured to correct the delay of a second input signal in accordance with the timing control signal, the second input signal being one of the transmission signal and a signal of a fixed value. One of the first and second input signals employs the corresponding signal of the fixed value in the case of correcting the delay.
    Type: Grant
    Filed: March 24, 2006
    Date of Patent: November 4, 2008
    Assignee: Fujitsu Limited
    Inventors: Hiroyoshi Ishikawa, Kazuo Nagatani, Hajime Hamada, Nobukazu Fudaba, Tokuro Kubo
  • Publication number: 20080204136
    Abstract: A distortion compensation apparatus includes an amplifier for amplifying an input signal, a calculation unit for obtaining a distortion compensation coefficient of the amplifier corresponding to an amplitude level of the input signal, based on the input signal input to the amplifier and an output signal output from the amplifier, a memory for storing the distortion compensation coefficient, obtained by the calculation unit, into a write address being made to correspond to the input signal amplitude level, a distortion compensation processing unit for reading out the distortion compensation coefficient from the readout address of the memory, and for performing distortion compensation processing of the input signal using the distortion compensation coefficient, and an address generator for generating the write address and the readout address, based on the input signal amplitude level.
    Type: Application
    Filed: March 27, 2008
    Publication date: August 28, 2008
    Inventors: Kazuo Nagatani, Hiroyoshi Ishikawa, Nobukazu Fudaba, Hajime Hamada, Tokuro Kubo
  • Publication number: 20080200133
    Abstract: A radio transmission apparatus executing peak suppression processing to an input signal in at least two stages, includes a first peak detector detecting a first peak, a maximum peak among peaks exceeding a first threshold, for a plurality of envelopes included in a predetermined input signal section; a second peak detector detecting a second peak exceeding a second threshold, on the basis of each input signal envelope; a first peak suppression unit suppressing the predetermined input signal section to the limit of a first level based on the first peak; a modulation signal generation unit generating a modulated signal modulated from the input signal suppressed by the first peak suppression unit; and a second peak suppression unit suppressing the second peak to the limit of a second level by each modulated signal envelope based on the first level and the second peak.
    Type: Application
    Filed: March 24, 2008
    Publication date: August 21, 2008
    Inventors: Kazuo Nagatani, Hiroyoshi Ishikawa, Nobukazu Fudaba, Hajime Hamada, Tokuro Kubo
  • Patent number: 7392020
    Abstract: The purpose of the present invention is to compensate the distortion of an amplifier by a predistorter which compensates the distortion of a power amplifier even when a frequency amplitude deviation exists. The predistorter comprises a distortion compensation coefficient storage unit for storing a distortion compensation coefficient corresponding to the reference value using the characteristic quantity of the envelope of a transmission signal before being inputted to the power amplifier as a reference value; and a reference value conversion unit for converting the characteristic quantity into a predetermined value according to the size of the characteristic quantity, and when the characteristic quantity is, for example, the amplitude value of an envelope and the amplitude value is small, that value is rounded up, for example, to an upper-limit value within a linear range of the amplifier.
    Type: Grant
    Filed: November 30, 2004
    Date of Patent: June 24, 2008
    Assignee: Fujitsu Limited
    Inventors: Toru Maniwa, Tokuro Kubo, Kazuo Nagatani, Hiroyoshi Ishikawa
  • Publication number: 20080144338
    Abstract: A DC/DC converter capable of controlling an output signal using a broadband signal input is provided. By employing the above DC/DC converter as a power supply, a highly efficient power amplifier can be configured. The above DC/DC converter includes two class-C amplifiers, a rectifier circuit connected between each output of the two class-C amplifiers, and an oscillator of a predetermined frequency signal. The predetermined frequency signal output from the oscillator is input to each of the two class-C amplifiers, and by controlling the phase difference of the predetermined frequency signal input to the two class-C amplifiers, the magnitude of a direct current voltage output from the rectifier circuit is made variable.
    Type: Application
    Filed: December 27, 2007
    Publication date: June 19, 2008
    Inventors: Takeshi Takano, Yasuyuki Oishi, Tokuro Kubo, Toru Maniwa
  • Patent number: 7388926
    Abstract: A disclosed quadrature modulation system inputs an inphase signal component and an orthogonal signal component, and outputs an output signal that is quadrature modulated by a quadrature modulator. The quadrature modulation system calculates a first cumulative total based on the inphase signal component input into the quadrature modulator and an inphase signal component of a feedback signal obtained from the output signal. The quadrature modulation system calculates a second cumulative total based on the orthogonal signal component input into the quadrature modulator and an orthogonal signal component of the feedback signal. Based on the first and the second cumulative totals, a time difference between the inphase signal component and the orthogonal signal component is determined. The inphase signal component and the orthogonal signal component to be provided to the quadrature modulator are adjusted based on the time difference such that the time difference is compensated for.
    Type: Grant
    Filed: September 20, 2004
    Date of Patent: June 17, 2008
    Assignee: Fujitsu Limited
    Inventors: Hiroyoshi Ishikawa, Kazuo Nagatani, Nobukazu Fudaba, Hajime Hamada, Tokuro Kubo
  • Publication number: 20080013646
    Abstract: A peak suppression threshold value control unit receives an input of quality requirement information, such as a modulation system and coding ratio, from a baseband signal generation unit, determines a threshold value of a peak suppression unit based on the quality requirement information and outputs the threshold value to a peak suppression unit. The peak suppression unit applies a peak suppression control to a baseband signal input from a baseband signal generation unit based on the threshold value and outputs a signal (i.e., a peak suppression signal) applied by the peak suppression process.
    Type: Application
    Filed: July 11, 2007
    Publication date: January 17, 2008
    Inventors: Hajime Hamada, Tokuro Kubo, Kazuo Nagatani, Hiroyoshi Ishikawa, Nobukazu Fudaba
  • Publication number: 20080002983
    Abstract: A bias control signal generation unit detects ON and OFF of a transmission signal input to an amplifier and having a property of a burst according to burst information. The bias control signal generation unit controls a bias voltage to be applied to an amplifier such that an idle current flowing through the amplifier can be flowing in a larger amount in a transmission OFF period, and can return to a normal level in a transmission ON period.
    Type: Application
    Filed: October 31, 2006
    Publication date: January 3, 2008
    Inventors: Hiroyoshi Ishikawa, Nobukazu Fudaba, Hajime Hamada, Kazuo Nagatani, Yasuhito Funyu, Norio Tozawa, Tokuro Kubo
  • Publication number: 20070281655
    Abstract: A DC offset component that occurs in a quadrature modulation system, and that is contained in a modulated transmit signal, is compensated for with good accuracy. In a DC offset compensation method according to the present invention, a DC offset correction value obtained from the transmit signal is weighted in accordance with the signal level of an input signal which is transmit data input to the quadrature modulation system, and the DC offset component contained in the transmit signal is compensated for by using the thus weighted DC offset correction value.
    Type: Application
    Filed: June 29, 2007
    Publication date: December 6, 2007
    Inventors: Hiroyoshi Ishikawa, Nobukazu Fudaba, Kazuo Nagatani, Hajime Hamada, Tokuro Kubo
  • Publication number: 20070217543
    Abstract: The present invention provides a peak suppression method, including a first step for detecting characteristic information of a peak part of a transmission signal; and a second step for changing a suppression method for the peak part based on the characteristic information.
    Type: Application
    Filed: July 7, 2006
    Publication date: September 20, 2007
    Inventors: Hajime Hamada, Tokuro Kubo, Kazuo Nagatani, Hiroyoshi Ishikawa, Nobukazu Fudaba
  • Publication number: 20070195909
    Abstract: As in a conventional technology, a hard clipping process and a filtering process are performed on a transmission signal. An original transmission signal is subtracted from a signal on which the processes have been performed, and an inverse sign signal to the suppressed signal is retrieved. By giving a gain to the signal, and adding up to the original transmission signal, a peak voltage is suppressed. The gain can be a ratio of a difference signal between a hard clipped signal and an original transmission signal to a signal of suppression of a filtered signal from the original transmission signal, or a value determined by a simulation depending on the cutoff frequency of a low pass filter used in the filtering process.
    Type: Application
    Filed: May 31, 2006
    Publication date: August 23, 2007
    Inventors: Hiroyoshi Ishikawa, Hajime Hamada, Kazuo Nagatani, Nobukazu Fudaba, Tokuro Kubo
  • Patent number: 7254377
    Abstract: A parallel operation system of transmission amplifiers enable the parallel running by the two distortion compensation amplifiers using the digital pre-distorter system and to provide a parallel operation system of the transmission amplifiers that makes it possible to switch to respective single running easily. The parallel operation system includes first and second transmission amplifiers which receive common input signals for outputting amplified signals from respective ones; and a coupling unit which combines outputs of the first and second transmission amplifiers, to provide as its output; the first and second transmission amplifiers each having a main amplifier; and a modulation unit disposed on the input side of the main amplifier; wherein the output of one of the modulation units included in the first and second transmission amplifiers is fed in common to the main amplifiers included in the first and second transmission amplifiers.
    Type: Grant
    Filed: December 12, 2001
    Date of Patent: August 7, 2007
    Assignees: Fujitsu Limited, NTT DoCoMo, Inc.
    Inventors: Satoshi Maruyama, Osamu Mita, Yasuyuki Oishi, Tokuro Kubo, Norio Tozawa, Fumihiko Kobayashi
  • Publication number: 20070178853
    Abstract: A multicarrier signal transmission apparatus provided with a hard clip suppression unit for hard clipping a peak part of a multicarrier signal, a low pass filter for filtering the signal hard clipped by the hard clip suppression unit, and a peak suppression unit for suppressing the peak part of the signal after filtering by the low pass filter, the peak suppression unit provided with a peak detection unit for detecting a peak part of the filtered signal, a window function generation unit for generating a window function of an amplitude in accordance with a peak level of the peak part, and a peak suppressor for attenuating the peak part in accordance with the value of the window function.
    Type: Application
    Filed: April 27, 2006
    Publication date: August 2, 2007
    Inventors: Hajime Hamada, Tokuro Kubo, Kazuo Nagatani, Hiroyoshi Ishikawa, Nobukazu Fudaba
  • Publication number: 20070159256
    Abstract: A timing controller is disclosed that includes: an amplifier part configured to amplify a first input signal in accordance with a control voltage, the first input signal being one of a transmission signal and a signal of a fixed value; a detector part configured to detect envelope information from the output signal of the amplifier part; a controller part configured to determine a delay difference from the transmission signal and the envelope information and transmit a timing control signal based on the delay difference; and a delay corrector part configured to correct the delay of a second input signal in accordance with the timing control signal, the second input signal being one of the transmission signal and a signal of a fixed value. One of the first and second input signals employs the corresponding signal of the fixed value in the case of correcting the delay.
    Type: Application
    Filed: March 24, 2006
    Publication date: July 12, 2007
    Inventors: Hiroyoshi Ishikawa, Kazuo Nagatani, Hajime Hamada, Nobukazu Fudaba, Tokuro Kubo
  • Publication number: 20070159242
    Abstract: A timing adjusting method detects a phase error between a main signal path from which a transmitting signal is obtained and a control signal path from which a voltage control signal is obtained, based on a to-be-amplified signal that is to be amplified and represents an amplitude or a power of the transmitting signal prior to amplification and a feedback signal that represents an amplitude or a power of the transmitting signal after the amplification, adjusts an amount of delay of at least one of the main signal path and the control signal path so as to mutually cancel the phase error, and amplifies the transmitting signal from the main signal path depending on the voltage control signal from the control signal path. The detecting the phase error may include detecting polarity transition points of a slope of a waveform of the to-be-amplified signal or the feedback signal, and measuring the phase error using the detected polarity transition points.
    Type: Application
    Filed: May 5, 2006
    Publication date: July 12, 2007
    Inventors: Kazuo Nagatani, Hiroyoshi Ishikawa, Nobukazu Fudaba, Hajime Hamada, Tokuro Kubo
  • Publication number: 20070146068
    Abstract: A device is disclosed that includes an amplification part for a linear transmitter, the amplification part being configured to amplify a transmission signal in accordance with a supply voltage control signal; a generation part configured to generate a power supply signal showing the level of the transmission signal; and a control part configured to output the supply voltage control signal based on the power supply signal. The control part includes a storage part configured to store a series of values of the power supply signal belonging to a time range including a certain point of time; and an output part configured to output a maximum one of a predetermined number of values of the series of values of the power supply signal as the supply voltage control signal at the certain point of time.
    Type: Application
    Filed: March 6, 2006
    Publication date: June 28, 2007
    Inventors: Hiroyoshi Ishikawa, Kazuo Nagatani, Hajime Hamada, Nobukazu Fudaba, Tokuro Kubo
  • Publication number: 20070110183
    Abstract: In an electronic device having a circuit outputting a vector sum of two quadrature vector signals, an offset compensating device compensates the offset contained in the vector sum. The offset compensating device aims to flexibly adapt to deviation in characteristics and performances and various fluctuations, and to compensate offset stably and accurately. The offset compensating device includes a deviation monitor unit creating a vector signal by A/D-converting the aforementioned vector sum and by quadrature-demodulating it and monitoring the deviation of the DC components superposed on the vector signal, and an adaptive control unit updating the compensation vector determined in advance, based on adaptive algorithm minimizing expectation value of the product of the inner product between an increment vector and the compensation vector, and the latest deviation vector, and adding the compensation vector to an offset vector to be inputted, while being superposed on the input signal, to a circuit.
    Type: Application
    Filed: March 31, 2004
    Publication date: May 17, 2007
    Inventors: Kazuo Nagatani, Hiroyoshi Ishikawa, Nobukazu Fudaba, Tokuro Kubo
  • Patent number: 7187667
    Abstract: An input signal includes spread signals which are respectively transmitted over a plurality of channels. First and second despread demodulators demodulate the spread signals transmitted over first and second communications channels by despreading them with first and second spread codes, respectively. A path detector generates a timing signal for instructing the timing at which the despread demodulators perform the despread operation. The path detector is shared by the first and the second despread demodulators, and operates in a time-division manner.
    Type: Grant
    Filed: May 28, 1999
    Date of Patent: March 6, 2007
    Assignee: Fujitsu Limited
    Inventors: Morihiko Minowa, Tokuro Kubo