Patents by Inventor Tom Zhong

Tom Zhong has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11963457
    Abstract: A layered thin film device, such as a MTJ (Magnetic Tunnel Junction) device can be customized in shape by sequentially forming its successive layers over a symmetrically curved electrode. By initially shaping the electrode to have a concave or convex surface, the sequentially formed layers conform to that shape and acquire it and are subject to stresses that cause various crystal defects to migrate away from the axis of symmetry, leaving the region immediately surrounding the axis of symmetry relatively defect free. The resulting stack can then be patterned to leave only the region that is relatively defect free.
    Type: Grant
    Filed: December 12, 2022
    Date of Patent: April 16, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Jesmin Haq, Tom Zhong, Zhongjian Teng, Vinh Lam, Yi Yang
  • Publication number: 20240104958
    Abstract: Methods and apparatus for providing eye model matching in a device are disclosed. When a user activates a device and the presence of the user's eye is detected, an image of the user's eye is captured. An eye model matching process is then implemented to determine a stored eye model (e.g., an eye model stored after enrollment of the eye on the device) that best matches the eye in the captured image. Determination of the best matching eye model may be based on matching between properties of the user's eye in the captured image (such as cornea and pupil features) and properties of the user's eye determined by the eye model. The best matching eye model may then be implemented in, for example, an eye gaze tracking process. In certain instances, the best matching eye model satisfies a threshold for matching before being implemented in the downstream process.
    Type: Application
    Filed: September 19, 2023
    Publication date: March 28, 2024
    Applicant: Apple Inc.
    Inventors: Hao Qin, Hua Gao, Tom Sengelaub, Jie Zhong
  • Patent number: 11895928
    Abstract: A three terminal spin-orbit-torque (SOT) device is disclosed wherein a free layer (FL) with a switchable magnetization is formed on a Spin Hall Effect (SHE) layer comprising a Spin Hall Angle (SHA) material. The SHE layer has a first side contacting a first bottom electrode (BE) and an opposite side contacting a second BE where the first and second BE are separated by a dielectric spacer. A first current is applied between the two BE, and the SHE layer generates SOT on the FL thereby switching the FL magnetization to an opposite perpendicular-to-plane direction. The SHE layer is a positive or negative SHA material, and may be a topological insulator such as Bi2Sb3. A top electrode is formed on an uppermost hard mask in each SOT device. A single etch through the FL and SHE layer ensures a reliable first current pathway that is separate from a read current pathway.
    Type: Grant
    Filed: October 3, 2019
    Date of Patent: February 6, 2024
    Assignee: Headway Technologies, Inc.
    Inventors: Jesmin Haq, Tom Zhong, Luc Thomas, Zhongjian Teng, Dongna Shen
  • Publication number: 20230380298
    Abstract: An STT-MRAM device incorporating a multiplicity of MTJ junctions is encapsulated so that it dissipates heat produced by repeated read/write processes and is simultaneously shielded from external magnetic fields of neighboring devices. In addition, the encapsulation layers can be structured to reduced top lead stresses that have been shown to affect DR/R and Hc. We provide a device design and its method of fabrication that can simultaneously address all of these problems.
    Type: Application
    Filed: July 28, 2023
    Publication date: November 23, 2023
    Inventors: Tom Zhong, Jesmin Haq, Zhongjian Teng
  • Publication number: 20230371398
    Abstract: A magnetic tunneling junction (MTJ) structure is described. The MJT structure includes a stress modulating layer on a first electrode layer, where a material of the stress modulating layer is different from a material of the first electrode layer. The MJT structure further includes a MTJ material stack on the stress modulating layer. And the MJT structure further includes a second electrode layer on the MTJ material stack. The stress modulating layer reduces crystal growth defects and interfacial defects during annealing and improve the interface lattice epitaxy. This will improve device performance.
    Type: Application
    Filed: July 27, 2023
    Publication date: November 16, 2023
    Inventors: Jesmin Haq, Tom Zhong, Vinh Lam, Vignesh Sundar, Zhongjian Teng
  • Publication number: 20230343362
    Abstract: Methods of critical dimension (CD) uniformity control for magnetic head devices are disclosed. In some embodiments, a method can include providing a film stack, the film stack including a substrate, a magnetoresistive (MR) sensor layer, and a hard mask layer, patterning the hard mask layer using a first mask that defines critical shape patterns other than the CD, forming a mandrel pattern using a second mask that defines the CD, and forming a sidewall spacer pattern on sidewalls of the mandrel pattern, and removing the mandrel pattern.
    Type: Application
    Filed: June 28, 2023
    Publication date: October 26, 2023
    Inventors: Tom Zhong, Hiroshi Omine, Jianing Zhou, Kunliang Zhang, Ruhang Ding, Min Li
  • Patent number: 11785864
    Abstract: A magnetic tunneling junction (MTJ) structure is described. The MJT structure includes a stress modulating layer on a first electrode layer, where a material of the stress modulating layer is different from a material of the first electrode layer. The MJT structure further includes a MTJ material stack on the stress modulating layer. And the MJT structure further includes a second electrode layer on the MTJ material stack. The stress modulating layer reduces crystal growth defects and interfacial defects during annealing and improve the interface lattice epitaxy. This will improve device performance.
    Type: Grant
    Filed: August 10, 2022
    Date of Patent: October 10, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD
    Inventors: Jesmin Haq, Tom Zhong, Vinh Lam, Vignesh Sundar, Zhongjian Teng
  • Publication number: 20230258747
    Abstract: A composite hard mask is disclosed. In some embodiments, a first sacrificial hard mask layer comprising an amorphous carbon or silicon nitride and a second sacrificial hard mask layer comprising a silicon nitride, silicon oxide, metal, metal oxide, or metal nitride, wherein the first and second sacrificial hard mask layers are not made of the same material.
    Type: Application
    Filed: February 14, 2022
    Publication date: August 17, 2023
    Inventors: Tom Zhong, Min Li, Ruhang Ding, Hiroshi Omine, QingJun Qin, Richard Zhou, Yunqing Cai, Yewhee Chye, Minghui Yu
  • Patent number: 11723286
    Abstract: An STT-MRAM device incorporating a multiplicity of MTJ junctions is encapsulated so that it dissipates heat produced by repeated read/write processes and is simultaneously shielded from external magnetic fields of neighboring devices. In addition, the encapsulation layers can be structured to reduced top lead stresses that have been shown to affect DR/R and Hc. We provide a device design and its method of fabrication that can simultaneously address all of these problems.
    Type: Grant
    Filed: November 30, 2020
    Date of Patent: August 8, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Tom Zhong, Jesmin Haq, Zhongjian Teng
  • Patent number: 11715491
    Abstract: Methods of critical dimension (CD) uniformity control for magnetic head devices are disclosed. In some embodiments, a method can include providing a film stack, the film stack including a substrate, a magnetoresistive (MR) sensor layer, and a hard mask layer, patterning the hard mask layer using a first mask that defines critical shape patterns other than the CD, forming a mandrel pattern using a second mask that defines the CD, and forming a sidewall spacer pattern on sidewalls of the mandrel pattern, and removing the mandrel pattern.
    Type: Grant
    Filed: June 30, 2021
    Date of Patent: August 1, 2023
    Assignee: Headway Technologies, Inc.
    Inventors: Tom Zhong, Hiroshi Omine, Jianing Zhou, Kunliang Zhang, Ruhang Ding, Min Li
  • Publication number: 20230217834
    Abstract: A plurality of conductive via connections are fabricated on a substrate located at positions where MTJ devices are to be fabricated, wherein a width of each of the conductive via connections is smaller than or equivalent to a width of the MTJ devices. The conductive via connections are surrounded with a dielectric layer having a height sufficient to ensure that at the end of a main MTJ etch, an etch front remains in the dielectric layer surrounding the conductive via connections. Thereafter, a MTJ film stack is deposited on the plurality of conductive via connections surrounded by the dielectric layer. The MTJ film stack is etched using an ion beam etch process (IBE), etching through the MTJ film stack and into the dielectric layer surrounding the conductive via connections to form the MTJ devices wherein by etching into the dielectric layer, re-deposition on sidewalls of the MTJ devices is insulating.
    Type: Application
    Filed: March 10, 2023
    Publication date: July 6, 2023
    Inventors: Vignesh Sundar, Yi Yang, Dongna Shen, Zhongjian Teng, Jesmin Haq, Sahil Patel, Yu-Jen Wang, Tom Zhong
  • Patent number: 11631802
    Abstract: A plurality of conductive via connections are fabricated on a substrate located at positions where MTJ devices are to be fabricated, wherein a width of each of the conductive via connections is smaller than or equivalent to a width of the MTJ devices. The conductive via connections are surrounded with a dielectric layer having a height sufficient to ensure that at the end of a main MTJ etch, an etch front remains in the dielectric layer surrounding the conductive via connections. Thereafter, a MTJ film stack is deposited on the plurality of conductive via connections surrounded by the dielectric layer. The MTJ film stack is etched using an ion beam etch process (IBE), etching through the MTJ film stack and into the dielectric layer surrounding the conductive via connections to form the MTJ devices wherein by etching into the dielectric layer, re-deposition on sidewalls of the MTJ devices is insulating.
    Type: Grant
    Filed: November 7, 2019
    Date of Patent: April 18, 2023
    Assignee: Headway Technologies, Inc.
    Inventors: Vignesh Sundar, Yi Yang, Dongna Shen, Zhongjian Teng, Jesmin Haq, Sahil Patel, Yu-Jen Wang, Tom Zhong
  • Publication number: 20230107977
    Abstract: A layered thin film device, such as a MTJ (Magnetic Tunnel Junction) device can be customized in shape by sequentially forming its successive layers over a symmetrically curved electrode. By initially shaping the electrode to have a concave or convex surface, the sequentially formed layers conform to that shape and acquire it and are subject to stresses that cause various crystal defects to migrate away from the axis of symmetry, leaving the region immediately surrounding the axis of symmetry relatively defect free. The resulting stack can then be patterned to leave only the region that is relatively defect free.
    Type: Application
    Filed: December 12, 2022
    Publication date: April 6, 2023
    Inventors: Jesmin Haq, Tom Zhong, Zhongjian Teng, Vinh Lam, Yi Yang
  • Patent number: 11573494
    Abstract: A photoresist film is patterned into an array of island shapes with improved critical dimension uniformity and no phase edges by using two alternating phase shifting masks (AltPSMs) and one post expose bake (PEB). The photoresist layer is exposed with a first AltPSM having a line/space (L/S) pattern where light through alternating clear regions on each side of an opaque line is 180° phase shifted. Thereafter, there is a second exposure with a second AltPSM having a L/S pattern where opaque lines are aligned orthogonal to the lengthwise dimension of opaque lines in the first exposure, and with alternating 0° and 180° clear regions. Then, a PEB and subsequent development process are used to form an array of island shapes. The double exposure method enables smaller island shapes than conventional photolithography and uses relatively simple AltPSM designs that are easier to implement in production than other optical enhancement techniques.
    Type: Grant
    Filed: November 9, 2020
    Date of Patent: February 7, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Jesmin Haq, Tom Zhong, Zhongjian Teng
  • Publication number: 20230005500
    Abstract: Methods of critical dimension (CD) uniformity control for magnetic head devices are disclosed. In some embodiments, a method can include providing a film stack, the film stack including a substrate, a magnetoresistive (MR) sensor layer, and a hard mask layer, patterning the hard mask layer using a first mask that defines critical shape patterns other than the CD, forming a mandrel pattern using a second mask that defines the CD, and forming a sidewall spacer pattern on sidewalls of the mandrel pattern, and removing the mandrel pattern.
    Type: Application
    Filed: June 30, 2021
    Publication date: January 5, 2023
    Inventors: Tom Zhong, Hiroshi Omine, Jianing Zhou, Kunliang Zhang, Ruhang Ding, Min Li
  • Patent number: 11527711
    Abstract: A layered thin film device, such as a MTJ (Magnetic Tunnel Junction) device can be customized in shape by sequentially forming its successive layers over a symmetrically curved electrode. By initially shaping the electrode to have a concave or convex surface, the sequentially formed layers conform to that shape and acquire it and are subject to stresses that cause various crystal defects to migrate away from the axis of symmetry, leaving the region immediately surrounding the axis of symmetry relatively defect free. The resulting stack can then be patterned to leave only the region that is relatively defect free.
    Type: Grant
    Filed: March 8, 2021
    Date of Patent: December 13, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Jesmin Haq, Tom Zhong, Zhongjian Teng, Vinh Lam, Yi Yang
  • Publication number: 20220384713
    Abstract: A magnetic tunneling junction (MTJ) structure is described. The MJT structure includes a stress modulating layer on a first electrode layer, where a material of the stress modulating layer is different from a material of the first electrode layer. The MJT structure further includes a MTJ material stack on the stress modulating layer. And the MJT structure further includes a second electrode layer on the MTJ material stack. The stress modulating layer reduces crystal growth defects and interfacial defects during annealing and improve the interface lattice epitaxy. This will improve device performance.
    Type: Application
    Filed: August 10, 2022
    Publication date: December 1, 2022
    Inventors: Jesmin Haq, Tom Zhong, Vinh Lam, Vignesh Sundar, Zhongjian Teng
  • Patent number: 11430945
    Abstract: A method for fabricating an improved magnetic tunneling junction (MTJ) structure is described. A bottom electrode is provided on a substrate. A MTJ stack is deposited on the bottom electrode. A top electrode is deposited on the MTJ stack. A first stress modulating layer is deposited between the bottom electrode and the MTJ stack, or a second stress modulating layer is deposited between the MTJ stack and the top electrode, or both a first stress modulating layer is deposited between the bottom electrode and the MTJ stack and a second stress modulating layer is deposited between the MTJ stack and the top electrode. The top electrode and MTJ stack are patterned and etched to form a MTJ device. The stress modulating layers reduce crystal growth defects and interfacial defects during annealing and improve the interface lattice epitaxy. This will improve device performance.
    Type: Grant
    Filed: November 11, 2019
    Date of Patent: August 30, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Jesmin Haq, Tom Zhong, Vinh Lam, Vignesh Sundar, Zhongjian Teng
  • Publication number: 20210193915
    Abstract: A layered thin film device, such as a MTJ (Magnetic Tunnel Junction) device can be customized in shape by sequentially forming its successive layers over a symmetrically curved electrode. By initially shaping the electrode to have a concave or convex surface, the sequentially formed layers conform to that shape and acquire it and are subject to stresses that cause various crystal defects to migrate away from the axis of symmetry, leaving the region immediately surrounding the axis of symmetry relatively defect free. The resulting stack can then be patterned to leave only the region that is relatively defect free.
    Type: Application
    Filed: March 8, 2021
    Publication date: June 24, 2021
    Inventors: Jesmin Haq, Tom Zhong, Zhongjian Teng, Vinh Lam, Yi Yang
  • Publication number: 20210143322
    Abstract: A plurality of conductive via connections are fabricated on a substrate located at positions where MTJ devices are to be fabricated, wherein a width of each of the conductive via connections is smaller than or equivalent to a width of the MTJ devices. The conductive via connections are surrounded with a dielectric layer having a height sufficient to ensure that at the end of a main MTJ etch, an etch front remains in the dielectric layer surrounding the conductive via connections. Thereafter, a MTJ film stack is deposited on the plurality of conductive via connections surrounded by the dielectric layer. The MTJ film stack is etched using an ion beam etch process (IBE), etching through the MTJ film stack and into the dielectric layer surrounding the conductive via connections to form the MTJ devices wherein by etching into the dielectric layer, re-deposition on sidewalls of the MTJ devices is insulating.
    Type: Application
    Filed: November 7, 2019
    Publication date: May 13, 2021
    Inventors: Vignesh Sundar, Yi Yang, Dongna Shen, Zhongjian Teng, Jesmin Haq, Sahil Patel, Yu-Jen Wang, Tom Zhong