Patents by Inventor Tom Zhong

Tom Zhong has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20090104718
    Abstract: A method for forming a MTJ in a STT-MRAM is disclosed in which the easy-axis CD is determined independently of the hard-axis CD. One approach involves two photolithography steps and two etch steps to form a post in a hard mask which is transferred through a MTJ stack of layers by a third etch process. Optionally, the third etch may stop on the tunnel barrier or in the free layer. A second embodiment involves forming a first parallel line pattern on a hard mask layer and transferring the line pattern through the MTJ stack with a first etch step. A planar insulation layer is formed adjacent to the sidewalls in the line pattern and then a second parallel line pattern is formed which is transferred by a second etch through the MTJ stack to form a post pattern. Etch end point may be controlled independently for hard-axis and easy-axis dimensions.
    Type: Application
    Filed: October 17, 2007
    Publication date: April 23, 2009
    Inventors: Tom Zhong, Rongfu Xiao, Chyu-Jiuh Torng, Adam Zhong
  • Publication number: 20090078927
    Abstract: A composite hard mask is disclosed that enables sub-100 nm sized MTJ cells to be formed for advanced devices such as spin torque MRAMs. The hard mask has a lower non-magnetic metallic layer such as Ru to magnetically isolate an overlying middle metallic spacer such as MnPt from an underlying free layer. The middle metallic spacer provides a height margin during subsequent processing to avoid shorting between a bit line and the MTJ cell in the final device. An upper conductive layer may be made of Ta and is thin enough to allow a MTJ pattern in a thin overlying photoresist layer to be transferred through the Ta during a fluorocarbon etch without consuming all of the photoresist. The MTJ pattern is transferred through the remaining hard mask layers and underlying MTJ stack of layers with a second etch step using a C, H, and O etch gas composition.
    Type: Application
    Filed: September 20, 2007
    Publication date: March 26, 2009
    Inventors: Rongfu Xiao, Chyu-Jiuh Torng, Tom Zhong, Witold Kula, Adam Zhong
  • Patent number: 7508700
    Abstract: An MTJ pattern layout for a memory device is disclosed that includes two CMP assist features outside active MTJ device blocks. A first plurality of dummy MTJ devices is located in two dummy bands formed around an active MTJ device block. The inner dummy band is separated from the outer dummy band by the MTJ ILD layer and has a MTJ device density essentially the same as the MTJ device block. The outer dummy band has a MTJ device density at least 10% greater than the inner dummy band. The inner dummy band serves to minimize CMP edge effect in the MTJ device block while the outer dummy band improves planarization. A second plurality of dummy MTJ devices is employed in contact pads outside the outer dummy band and is formed between a WL ILD layer and a BIT ILD layer thereby minimizing delamination of the MTJ ILD layer.
    Type: Grant
    Filed: March 15, 2007
    Date of Patent: March 24, 2009
    Assignee: Magic Technologies, Inc.
    Inventors: Tom Zhong, Terry Kin Ting Ko, Chyu-Jiuh Torng, Wai-Ming Kan, Adam Zhong
  • Patent number: 7476919
    Abstract: An MRAM structure is disclosed where the distance from a bit line or word line to an underlying free layer in an MTJ is small and well controlled. As a result, the bit line or word line switching current is reduced and tightly distributed for better device performance. A key feature in the method of forming the MRAM cell structure is a two step planarization of an insulation layer deposited on the MTJ array. A CMP step flattens the insulation layer at a distance about 60 to 200 Angstroms above the cap layer in the MTJ. Then an etch back step thins the insulation layer to a level about 50 to 190 Angstroms below the top of the cap layer. Less than 5 Angstroms of the cap layer is removed. The distance variation from the free layer to an overlying bit line or word line is within +/?5 Angstroms.
    Type: Grant
    Filed: May 5, 2006
    Date of Patent: January 13, 2009
    Assignees: Headway Technologies, Inc., Applied Spintronics, Inc.
    Inventors: Liubo Hong, Tom Zhong, Lin Yang
  • Publication number: 20080225576
    Abstract: An MTJ pattern layout for a memory device is disclosed that includes two CMP assist features outside active MTJ device blocks. A first plurality of dummy MTJ devices is located in two dummy bands formed around an active MTJ device block. The inner dummy band is separated from the outer dummy band by the MTJ ILD layer and has a MTJ device density essentially the same as the MTJ device block. The outer dummy band has a MTJ device density at least 10% greater than the inner dummy band. The inner dummy band serves to minimize CMP edge effect in the MTJ device block while the outer dummy band improves planarization. A second plurality of dummy MTJ devices is employed in contact pads outside the outer dummy band and is formed between a WL ILD layer and a BIT ILD layer thereby minimizing delamination of the MTJ ILD layer.
    Type: Application
    Filed: March 15, 2007
    Publication date: September 18, 2008
    Inventors: Tom Zhong, Terry Kin Ting Ko, Chyu-Jiuh Torng, Wai-Ming Kan, Adam Zhong
  • Publication number: 20080090307
    Abstract: Formation of a bottom electrode for an MTJ device on a silicon nitride substrate is facilitated by including a layer of ruthenium near the silicon nitride surface. The ruthenium is a good electrical conductor and it responds differently from Ta and TaN to certain etchants. Adhesion to SiN is enhanced by using a TaN/NiCr bilayer as “glue”. Thus, said included layer of ruthenium may be used as an etch stop layer during the etching of Ta and/or TaN while the latter materials may be used to form a hard mask for etching the ruthenium without significant corrosion of the silicon nitride surface.
    Type: Application
    Filed: September 28, 2006
    Publication date: April 17, 2008
    Inventors: Rongfu Xiao, Cheng T. Horng, Ru-Ying Tong, Chyu-Jinh Torng, Tom Zhong, Witold Kula, Terry Kin Ting Ko, Wei Cao, Wai-Ming J. Kan, Liubo Hong
  • Patent number: 7122386
    Abstract: A method of forming a Cu—Cu junction between a word line pad (WLP) and bit line (BL) contact is described. An opening above a WL contact is formed in a first SiNx layer on a substrate that includes a WLP and word line. After a bottom electrode (BE) layer, MTJ stack, and hard mask are sequentially deposited, an etch forms an MTJ element above the word line. Another etch forms a BE and exposes the first SiNx layer above the WLP and bond pad (BP). An MTJ ILD layer is deposited and planarized followed by deposition of a second SiNx layer and BL ILD layer. Trenches are formed in the BL ILD layer and second SiNx layer above the WLP, hard mask and BP. After vias are formed in the MTJ ILD and first SiNx layers above the WLP and BP, Cu deposition follows to form dual damascene BL contacts.
    Type: Grant
    Filed: September 21, 2005
    Date of Patent: October 17, 2006
    Assignee: MagIC Technologies, Inc.
    Inventors: Chyu-Jiuh Torng, Tom Zhong, Wei Cao, Po-Kang Wang
  • Publication number: 20060209591
    Abstract: An MRAM structure is disclosed where the distance from a bit line or word line to an underlying free layer in an MTJ is small and well controlled. As a result, the bit line or word line switching current is reduced and tightly distributed for better device performance. A key feature in the method of forming the MRAM cell structure is a two step planarization of an insulation layer deposited on the MTJ array. A CMP step flattens the insulation layer at a distance about 60 to 200 Angstroms above the cap layer in the MTJ. Then an etch back step thins the insulation layer to a level about 50 to 190 Angstroms below the top of the cap layer. Less than 5 Angstroms of the cap layer is removed. The distance variation from the free layer to an overlying bit line or word line is within +/?5 Angstroms.
    Type: Application
    Filed: May 5, 2006
    Publication date: September 21, 2006
    Inventors: Liubo Hong, Tom Zhong, Lin Yang
  • Patent number: 7045368
    Abstract: An MRAM structure is disclosed where the distance from a bit line or word line to an underlying free layer in an MTJ is small and well controlled. As a result, the bit line or word line switching current is reduced and tightly distributed for better device performance. A key feature in the method of forming the MRAM cell structure is a two step planarization of an insulation layer deposited on the MTJ array. A CMP step flattens the insulation layer at a distance about 60 to 200 Angstroms above the cap layer in the MTJ. Then an etch back step thins the insulation layer to a level about 50 to 190 Angstroms below the top of the cap layer. Less than 5 Angstroms of the cap layer is removed. The distance variation from the free layer to an overlying bit line or word line is within +/?5 Angstroms.
    Type: Grant
    Filed: May 19, 2004
    Date of Patent: May 16, 2006
    Assignees: Headway Technologies, Inc., Applied Spintronics, Inc.
    Inventors: Liubo Hong, Tom Zhong, Lin Yang
  • Patent number: 7030039
    Abstract: A method of and an apparatus for coating a substrate with a polymer solution to produce a film of uniform thickness, includes mounting the substrate inside an enclosed housing and passing a control gas, which may be a solvent vapor-bearing gas into the housing through an inlet. The polymer solution is deposited onto the surface of the substrate in the housing and the substrate is then spun. The control gas and any solvent vapor and particulate contaminants suspended in the control gas are exhausted from the housing through an outlet and the solvent vapor concentration is controlled by controlling the temperature of the housing and the solvent from which the solvent vapor-bearing gas is produced. Instead the concentration can be controlled by mixing gases having different solvent concentrations. The humidity of the gas may also be controlled.
    Type: Grant
    Filed: June 30, 2001
    Date of Patent: April 18, 2006
    Assignee: ASML Holding N.V.
    Inventors: Emir Gurer, Tom Zhong, John Lewellen, Edward C. Lee, Robert P. Mandal, James C. Grambow, Ted C. Bettes, Donald R. Sauer, Edmond R. Ward, Jung-Hoon Chun, Sangjun Han
  • Patent number: 7018943
    Abstract: A method of and an apparatus for coating a substrate with a polymer solution to produce a film of uniform thickness, includes mounting the substrate inside an enclosed housing and passing a control gas, which may be a solvent vapor-bearing gas into the housing through an inlet. The polymer solution is deposited onto the surface of the substrate in the housing and the substrate is then spun. The control gas and any solvent vapor and particulate contaminants suspended in the control gas are exhausted from the housing through an outlet and the solvent vapor concentration is controlled by controlling the temperature of the housing and the solvent from which the solvent vapor-bearing gas is produced. Instead the concentration can be controlled by mixing gases having different solvent concentrations. The humidity of the gas may also be controlled.
    Type: Grant
    Filed: June 30, 2001
    Date of Patent: March 28, 2006
    Assignee: ASML Holding N.V.
    Inventors: Gurer Emir, Tom Zhong, John Lewellen, Edward C. Lee, Robert P. Mandal, James C. Grambow, Ted C. Bettes, Donald R. Sauer, Edmond R. Ward
  • Patent number: 6977098
    Abstract: A method of and an apparatus for coating a substrate with a polymer solution to produce a film of uniform thickness, includes mounting the substrate inside an enclosed housing and passing a control gas, which may be a solvent vapor-bearing gas into the housing through an inlet. The polymer solution is deposited onto the surface of the substrate in the housing and the substrate is then spun. The control gas and any solvent vapor and particulate contaminants suspended in the control gas are exhausted from the housing through an outlet and the solvent vapor concentration is controlled by controlling the temperature of the housing and the solvent from which the solvent vapor-bearing gas is produced. Instead the concentration can be controlled by mixing gases having different solvent concentrations. The humidity of the gas may also be controlled.
    Type: Grant
    Filed: February 28, 2001
    Date of Patent: December 20, 2005
    Assignee: ASML Holding N.V.
    Inventors: Emir Gurer, Tom Zhong, John Lewellen, Ed Lee, Robert P. Mandal, James C. Grambow, Ted C. Bettes, Donald R. Sauer, Edmond R. Ward
  • Publication number: 20050260773
    Abstract: An MRAM structure is disclosed where the distance from a bit line or word line to an underlying free layer in an MTJ is small and well controlled. As a result, the bit line or word line switching current is reduced and tightly distributed for better device performance. A key feature in the method of forming the MRAM cell structure is a two step planarization of an insulation layer deposited on the MTJ array. A CMP step flattens the insulation layer at a distance about 60 to 200 Angstroms above the cap layer in the MTJ. Then an etch back step thins the insulation layer to a level about 50 to 190 Angstroms below the top of the cap layer. Less than 5 Angstroms of the cap layer is removed. The distance variation from the free layer to an overlying bit line or word line is within +/?5 Angstroms.
    Type: Application
    Filed: May 19, 2004
    Publication date: November 24, 2005
    Inventors: Liubo Hong, Tom Zhong, Lin Yang
  • Patent number: 6911091
    Abstract: Systems and methods are described for environmental exchange control for a polymer on a wafer surface. An apparatus for controlling an exchange between an environment and a polymer on a surface of a wafer located in the environment includes: a chamber adapted to hold the wafer, define the environment, and maintain the polymer in an adjacent relationship with the environment; and a heater coupled to the chamber. A method for improving performance of a spin-on material includes: forming the spin-on material on a surface of a wafer; then locating the spin-on material in an environment so that said environment is adjacent said spin-on material; and then controlling an exchange between the spin-on material and said environment. The systems and methods provide advantages because inappropriate deprotection is mitigated by careful control of the environmental temperature and environmental species partial pressures (e.g. relative humidity).
    Type: Grant
    Filed: June 3, 2002
    Date of Patent: June 28, 2005
    Assignee: ASML Netherlands B.V.
    Inventors: Emir Gurer, Ed C. Lee, Tom Zhong, Kevin Golden, John W. Lewellen, Scott C. Wackerman, Reese Reynolds
  • Patent number: 6844027
    Abstract: Systems and methods are described for environmental exchange control for a polymer on a wafer surface. An apparatus for controlling an exchange between an environment and a polymer on a surface of a wafer located in the environment includes: a chamber adapted to hold the wafer, define the environment, and maintain the polymer in an adjacent relationship with the environment; and a heater coupled to the chamber. A method for improving performance of a spin-on material includes: forming the spin-on material on a surface of a wafer; then locating the spin-on material in an environment so that said environment is adjacent said spin-on material; and then controlling an exchange between the spin-on material and said environment. The systems and methods provide advantages because inappropriate deprotection is mitigated by careful control of the environmental temperature and environmental species partial pressures (e.g. relative humidity).
    Type: Grant
    Filed: May 2, 2000
    Date of Patent: January 18, 2005
    Assignee: ASML Holding N.V.
    Inventors: Emir Gurer, Ed C. Lee, Tom Zhong, Kevin Golden, John W. Lewellen, Scott C. Wackerman, Reese Reynolds
  • Patent number: 6780461
    Abstract: Systems and methods are described for environmental exchange control for a polymer on a wafer surface. An apparatus for controlling an exchange between an environment and a polymer on a surface of a wafer located in the environment includes: a chamber adapted to hold the wafer, define the environment, and maintain the polymer in an adjacent relationship with the environment; and a heater coupled to the chamber. A method for improving performance of a spin-on material includes: forming the spin-on material on a surface of a wafer; then locating the spin-on material in an environment so that said environment is adjacent said spin-on material; and then controlling an exchange between the spin-on material and said environment. The systems and methods provide advantages because inappropriate deprotection is mitigated by careful control of the environmental temperature and environmental species partial pressures (e.g. relative humidity).
    Type: Grant
    Filed: March 1, 2001
    Date of Patent: August 24, 2004
    Assignee: ASML Holding N.V.
    Inventors: Emir Gurer, Ed C. Lee, Tom Zhong, Kevin Golden, John W. Lewellen, Scott C. Wackerman, Reese Reynolds
  • Patent number: 6662466
    Abstract: A process for drying a polymeric material present on a substrate is provided. Temperatures of the polymeric material is measured and the ambient temperature in the vicinity of the substrate. A temperature of the substrate is also measured. A variation in the measured ambient temperature is detected. The substrate temperature, polymeric temperature, ambient temperature or a substrate drying spin speed is adjusted in response to the detected variation in the measured ambient temperature.
    Type: Grant
    Filed: December 11, 2001
    Date of Patent: December 16, 2003
    Assignee: ASML Holdings, N.V.
    Inventors: Emir Gurer, Tom Zhong, John W. Lewellen, Eddie Lee
  • Publication number: 20030190427
    Abstract: Systems and methods are described for environmental exchange control for a polymer on a wafer surface. An apparatus for controlling an exchange between an environment and a polymer on a surface of a wafer located in the environment includes: a chamber adapted to hold the wafer, define the environment, and maintain the polymer in an adjacent relationship with the environment; and a heater coupled to the chamber. A method for improving performance of a spin-on material includes: forming the spin-on material on a surface of a wafer; then locating the spin-on material in an environment so that said environment is adjacent said spin-on material; and then controlling an exchange between the spin-on material and said environment. The systems and methods provide advantages because inappropriate deprotection is mitigated by careful control of the environmental temperature and environmental species partial pressures (e.g. relative humidity).
    Type: Application
    Filed: March 1, 2001
    Publication date: October 9, 2003
    Inventors: Emir Gurer, Ed C. Lee, Tom Zhong, Kevin Golden, John Lewellen, Scott Wackerman, Reese Reynolds
  • Publication number: 20030010289
    Abstract: Systems and methods are described for environmental exchange control for a polymer on a wafer surface. An apparatus for controlling an exchange between an environment and a polymer on a surface of a wafer located in the environment includes: a chamber adapted to hold the wafer, define the environment, and maintain the polymer in an adjacent relationship with the environment; and a heater coupled to the chamber.
    Type: Application
    Filed: June 3, 2002
    Publication date: January 16, 2003
    Inventors: Emir Gurer, Ed C. Lee, Tom Zhong, Kevin Golden, John W. Lewellen, Scott C. Wackerman, Reese Reynolds
  • Patent number: 6468586
    Abstract: Systems and methods are described for environmental exchange control for a polymer on a wafer surface. An apparatus for controlling an exchange between an environment and a polymer on a surface of a wafer located in the environment includes: a chamber adapted to hold the wafer, define the environment, and maintain the polymer in an adjacent relationship with the environment; and a heater coupled to the chamber. A method for improving performance of a spin-on material includes: forming the spin-on material on a surface of a wafer; then locating the spin-on material in an environment so that said environment is adjacent said spin-on material; and then controlling an exchange between the spin-on material and said environment. The systems and methods provide advantages because inappropriate deprotection is mitigated by careful control of the environmental temperature and environmental species partial pressures (e.g. relative humidity).
    Type: Grant
    Filed: May 8, 2000
    Date of Patent: October 22, 2002
    Assignee: Silicon Valley Group, Inc.
    Inventors: Emir Gurer, Ed C. Lee, Tom Zhong, Kevin Golden, John W. Lewellen, Scott C. Wackerman, Reese Reynolds