Patents by Inventor Tomas Geurts

Tomas Geurts has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12294794
    Abstract: Fixed pattern noise (FPN) reduction techniques in image sensors operated with pulse illumination are disclosed herein. In one embodiment, a method includes, during a first sub-exposure period of a frame, (a) operating a first tap of a pixel to capture a first signal corresponding to first charge at a first floating diffusion, the first charge corresponding to first light incident on a photosensor, and (b) operating a second tap of the pixel to capture a first parasitic signal corresponding to FPN at a second floating diffusion. The method further includes, during a second sub-exposure period of the frame, (a) operating the second tap to capture a second signal corresponding to second charge at the second floating diffusion, the second charge corresponding to second light incident on the photosensor, and (b) operating the first tap to capture a second parasitic signal corresponding to FPN at the first floating diffusion.
    Type: Grant
    Filed: August 17, 2023
    Date of Patent: May 6, 2025
    Assignee: OMNIVISION TECHNOLOGIES, INC.
    Inventors: Andreas Suess, Tomas Geurts
  • Publication number: 20250097607
    Abstract: Multiple read image sensors, and associated methods for the same, are disclosed herein. In one embodiment, a method comprises reading out a reset level from a pixel to a corresponding sample and hold circuit; storing the reset level to a first storage device and to a second storage device of the sample and hold circuit; reading out a signal level from the pixel to the sample and hold circuit; and storing the signal level to a third storage device and to a fourth storage device of the sample and hold circuit. The reset level and the signal level can correspond to a same correlated double sampling of an image data signal captured by the pixel. The method can further include reading out the reset level from the first storage device; reading out the signal level from the third storage device; and recovering a first copy of the image data signal.
    Type: Application
    Filed: December 5, 2024
    Publication date: March 20, 2025
    Inventors: Tomas Geurts, Amit Mittra, Kevin Johnson
  • Patent number: 12200390
    Abstract: Multiple read image sensors, and associated methods for the same, are disclosed herein. In one embodiment, a method comprises reading out a reset level from a pixel to a corresponding sample and hold circuit; storing the reset level to a first storage device and to a second storage device of the sample and hold circuit; reading out a signal level from the pixel to the sample and hold circuit; and storing the signal level to a third storage device and to a fourth storage device of the sample and hold circuit. The reset level and the signal level can correspond to a same correlated double sampling of an image data signal captured by the pixel. The method can further include reading out the reset level from the first storage device; reading out the signal level from the third storage device; and recovering a first copy of the image data signal.
    Type: Grant
    Filed: August 2, 2023
    Date of Patent: January 14, 2025
    Assignee: OMNIVISION TECHNOLOGIES, INC.
    Inventors: Tomas Geurts, Amit Mittra, Kevin Johnson
  • Patent number: 12200388
    Abstract: An imaging system includes a pixel array with odd and even pixel cells. Each of the odd and even pixel cells includes a photodiode, a floating diffusion, a transfer transistor, a reset transistor, a lateral overflow integration capacitor (LOFIC), and an overflow gate (OFG) transistor. The imaging system further includes a readout circuit with a sample and hold (SH) circuit and an analog to digital converter. The OFG transistor of each of the odd and even pixel cells is configured to direct the image charge photogenerated by the respective photodiode away from the respective transfer transistor and reduce photodiode exposure shift during LOFIC readouts during a global transfer period.
    Type: Grant
    Filed: May 8, 2023
    Date of Patent: January 14, 2025
    Assignee: OMNIVISION TECHNOLOGIES, INC.
    Inventors: Zhe Gao, Tomas Geurts, Ling Fu, Tiejun Dai
  • Publication number: 20250016474
    Abstract: A gated imaging system includes a pulsed illuminator configured to generate a plurality of light pulses and a pixel circuit. The pixel circuit includes a photodiode configured to collect photogenerated image charge in response to incident light, a floating diffusion coupled to receive the image charge from the photodiode, a sense node amplifier includes a gate terminal coupled to the floating diffusion, and a storage network coupled between the photodiode and the floating diffusion. The storage network includes a plurality of memory nodes coupled between the photodiode and the floating diffusion in parallel. The storage network is configured to capture a plurality of depth slices between two successive ones of the light pulses.
    Type: Application
    Filed: July 7, 2023
    Publication date: January 9, 2025
    Inventor: Tomas Geurts
  • Publication number: 20240381002
    Abstract: An imaging system includes a pixel array with odd and even pixel cells. Each of the odd and even pixel cells includes a photodiode, a floating diffusion, a transfer transistor, a reset transistor, a lateral overflow integration capacitor (LOFIC), and an overflow gate (OFG) transistor. The imaging system further includes a readout circuit with a sample and hold (SH) circuit and an analog to digital converter. The OFG transistor of each of the odd and even pixel cells is configured to direct the image charge photogenerated by the respective photodiode away from the respective transfer transistor and reduce photodiode exposure shift during LOFIC readouts during a global transfer period.
    Type: Application
    Filed: May 8, 2023
    Publication date: November 14, 2024
    Inventors: Zhe Gao, Tomas Geurts, Ling Fu, Tiejun Dai
  • Patent number: 12080739
    Abstract: Implementations of a semiconductor device may include a photodiode included in a second epitaxial layer of a semiconductor substrate; light shield coupled over the photodiode; and a first epitaxial layer located in one or more openings in the light shield. The first epitaxial layer and the second epitaxial layer may form a single crystal.
    Type: Grant
    Filed: September 23, 2020
    Date of Patent: September 3, 2024
    Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Manuel H. Innocent, Tomas Geurts, David T. Price
  • Publication number: 20240292131
    Abstract: Multiple read image sensors, and associated methods for the same, are disclosed herein. In one embodiment, a method comprises reading out a reset level from a pixel to a corresponding sample and hold circuit; storing the reset level to a first storage device and to a second storage device of the sample and hold circuit; reading out a signal level from the pixel to the sample and hold circuit; and storing the signal level to a third storage device and to a fourth storage device of the sample and hold circuit. The reset level and the signal level can correspond to a same correlated double sampling of an image data signal captured by the pixel. The method can further include reading out the reset level from the first storage device; reading out the signal level from the third storage device; and recovering a first copy of the image data signal.
    Type: Application
    Filed: August 2, 2023
    Publication date: August 29, 2024
    Inventors: Tomas Geurts, Amit Mittra, Kevin Johnson
  • Patent number: 12047697
    Abstract: An image sensor may include an array of image pixels. The array of image pixel may be coupled to row control circuitry and column readout circuitry. An image pixel in the array may include a charge integration portion having a photodiode, a floating diffusion region, and a capacitor coupled to the floating diffusion region and may include a voltage-domain sampling portion having three capacitors. High light and low light image level and reset level signals may be sampled and stored at the voltage-domain sampling portion before being readout to the column readout circuitry during a readout operation. The high light reset level signal may be sampled and stored during the readout operation.
    Type: Grant
    Filed: February 3, 2022
    Date of Patent: July 23, 2024
    Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Manuel H. Innocent, Tomas Geurts, Genis Chapinal Gomez, Tze Ching Fung, Bartosz Piotr Banachowicz
  • Publication number: 20240073557
    Abstract: Fixed pattern noise (FPN) reduction techniques in image sensors operated with pulse illumination are disclosed herein. In one embodiment, a method includes, during a first sub-exposure period of a frame, (a) operating a first tap of a pixel to capture a first signal corresponding to first charge at a first floating diffusion, the first charge corresponding to first light incident on a photosensor, and (b) operating a second tap of the pixel to capture a first parasitic signal corresponding to FPN at a second floating diffusion. The method further includes, during a second sub-exposure period of the frame, (a) operating the second tap to capture a second signal corresponding to second charge at the second floating diffusion, the second charge corresponding to second light incident on the photosensor, and (b) operating the first tap to capture a second parasitic signal corresponding to FPN at the first floating diffusion.
    Type: Application
    Filed: August 17, 2023
    Publication date: February 29, 2024
    Inventors: Andreas Suess, Tomas Geurts
  • Publication number: 20240073556
    Abstract: Fixed pattern noise (FPN) reduction techniques in image sensors operated with pulse illumination are disclosed herein. In one embodiment, a method includes, during a first sub-exposure period of a frame, (a) operating a first tap of a pixel to capture a first signal corresponding to first charge at a first floating diffusion, the first charge corresponding to first light incident on a photosensor, and (b) operating a second tap of the pixel to capture a first parasitic signal corresponding to FPN at a second floating diffusion. The method further includes, during a second sub-exposure period of the frame, (a) operating the second tap to capture a second signal corresponding to second charge at the second floating diffusion, the second charge corresponding to second light incident on the photosensor, and (b) operating the first tap to capture a second parasitic signal corresponding to FPN at the first floating diffusion.
    Type: Application
    Filed: August 17, 2023
    Publication date: February 29, 2024
    Inventors: Andreas Suess, Tomas Geurts
  • Patent number: 11818478
    Abstract: An image sensor may include an array of image pixels. The array of image pixel may be coupled to control circuitry and readout circuitry. One or more image pixels in the array may each include a coupled-gates structure coupling a photodiode at one input terminal to a capacitor at a first output terminal and to a floating diffusion region at a second output terminal. The coupled-gates structure may include a first transistor that sets a potential barrier defining overflow portions of the photodiode-generated charge. Second and third transistors in the coupled-gates structure may be modulated to transfer the overflow charge to the capacitor and to the floating diffusion region at suitable times. The second and third transistors may form a conductive path between the capacitor and the floating diffusion region for a low conversion gain mode of operation.
    Type: Grant
    Filed: March 31, 2022
    Date of Patent: November 14, 2023
    Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Manuel H. Innocent, Robert Michael Guidash, Tomas Geurts
  • Patent number: 11778343
    Abstract: An image sensor may include an array of image sensor pixels. Each pixel in the array may be a global shutter pixel having a first charge storage node configured to capture scenery information and a second charge storage node configured to capture background information generated as a result of parasitic light and dark noise signals. The first and/or second charge storage nodes may each be provided with an overflow charge storage to provide high dynamic range (HDR) functionality. The background information may be subtracted from the scenery information to cancel out the desired background signal contribution and to obtain an HDR signal with high global shutter efficiency. The charge storage nodes may be implemented as storage diode or storage gate devices. The pixels may be backside illuminated pixels with optical diffracting structures and multiple microlenses formed at the backside to distribute light equally between the two charge storage nodes.
    Type: Grant
    Filed: November 30, 2021
    Date of Patent: October 3, 2023
    Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Dajiang Yang, Sergey Velichko, Bartosz Piotr Banachowicz, Tomas Geurts, Muhammad Maksudur Rahman
  • Patent number: 11743616
    Abstract: A time-of-flight (TOF) sensing system may include an illumination module and a sensor module. The sensor module may include an array of sensor pixels, pixel-level readout circuitry, and column-level readout circuitry coupled to the pixel-level readout circuitry via corresponding column lines. Pixel-level readout circuitry may be provided on a per-pixel basis (e.g., dedicated or unshared per-pixel readout circuitry may be provided for each pixel). Pixel-level readout circuitry may include one or more correlated double sampling stages and a storage stage. The storage stage may include a set of capacitors each configured to store different phase data generated by a corresponding pixel for a TOF sensing operation.
    Type: Grant
    Filed: December 15, 2020
    Date of Patent: August 29, 2023
    Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Erez Tadmor, Tomas Geurts
  • Patent number: 11323644
    Abstract: An image sensor may include an array of image pixels. The array of image pixel may be coupled to control circuitry and readout circuitry. One or more image pixels in the array may each include a coupled-gates structure coupling a photodiode at one input terminal to a capacitor at a first output terminal and to a floating diffusion region at a second output terminal. The coupled-gates structure may include a first transistor that sets a potential barrier defining overflow portions of the photodiode-generated charge. Second and third transistors in the coupled-gates structure may be modulated to transfer the overflow charge to the capacitor and to the floating diffusion region at suitable times. The second and third transistors may form a conductive path between the capacitor and the floating diffusion region for a low conversion gain mode of operation.
    Type: Grant
    Filed: February 18, 2021
    Date of Patent: May 3, 2022
    Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Manuel H. Innocent, Robert Michael Guidash, Tomas Geurts
  • Patent number: 11218653
    Abstract: An image sensor may include an array of image sensor pixels. Each pixel in the array may be a global shutter pixel having a first charge storage node configured to capture scenery information and a second charge storage node configured to capture background information generated as a result of parasitic light and dark noise signals. The first and/or second charge storage nodes may each be provided with an overflow charge storage to provide high dynamic range (HDR) functionality. The background information may be subtracted from the scenery information to cancel out the desired background signal contribution and to obtain an HDR signal with high global shutter efficiency. The charge storage nodes may be implemented as storage diode or storage gate devices. The pixels may be backside illuminated pixels with optical diffracting structures and multiple microlenses formed at the backside to distribute light equally between the two charge storage nodes.
    Type: Grant
    Filed: October 23, 2019
    Date of Patent: January 4, 2022
    Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Dajiang Yang, Sergey Velichko, Bartosz Piotr Banachowicz, Tomas Geurts, Muhammad Maksudur Rahman
  • Patent number: 11165977
    Abstract: An imaging system may include an image sensor having an image sensor. The image sensor may include an image sensor pixel array coupled to row control circuitry and column readout circuitry. The image sensor pixel array may include a plurality of image sensor pixels. Each image sensor pixel may include a photosensitive element configured to generate charge in response to incident light, a first charge storage structure configured to accumulate an overflow portion of the generated charge for a low gain signal and a second charge storage structure configured to store a remaining portion of the generated charge for a high gain signal. Each image sensor pixel may also include a dedicated overflow charge storage structure interposed between the first charge storage structure and a floating diffusion region.
    Type: Grant
    Filed: April 28, 2020
    Date of Patent: November 2, 2021
    Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Tomas Geurts, Manuel H. Innocent, Robert Michael Guidash, Genis Chapinal
  • Publication number: 20210337149
    Abstract: A time-of-flight (TOF) sensing system may include an illumination module and a sensor module. The sensor module may include an array of sensor pixels, pixel-level readout circuitry, and column-level readout circuitry coupled to the pixel-level readout circuitry via corresponding column lines. Pixel-level readout circuitry may be provided on a per-pixel basis (e.g., dedicated or unshared per-pixel readout circuitry may be provided for each pixel). Pixel-level readout circuitry may include one or more correlated double sampling stages and a storage stage. The storage stage may include a set of capacitors each configured to store different phase data generated by a corresponding pixel for a TOF sensing operation.
    Type: Application
    Filed: December 15, 2020
    Publication date: October 28, 2021
    Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Erez Tadmor, Tomas Geurts
  • Patent number: 11114493
    Abstract: Image sensors may include multiple vertically stacked photodiodes interconnected using vertical deep trench transfer gates. A first n-epitaxial layer may be formed on a residual substrate; a first p-epitaxial layer may be formed on the first n-epitaxial layer; a second n-epitaxial layer may be formed on the first p-epitaxial layer; a second p-epitaxial layer may be formed on the second n-epitaxial layer; and so on. The n-epitaxial layers may serve as accumulation regions for the different epitaxial photodiodes. A separate color filter array is not needed. The vertical transfer gates may be a deep trench that is filled with doped conductive material, lined with gate dielectric liner, and surrounded by a p-doped region. Image sensors formed in this way may be used to support a rolling shutter configuration or a global shutter configuration and can either be front-side illuminated or backside illuminated.
    Type: Grant
    Filed: February 24, 2020
    Date of Patent: September 7, 2021
    Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Johan Camiel Julia Janssens, Manuel H. Innocent, Sergey Velichko, Tomas Geurts
  • Patent number: 11064141
    Abstract: An image sensor may include an array of image pixels. Control circuitry coupled to the array of pixels may be configured to operate the image pixels in an overflow mode of operation, in which each pixel generates an overflow image signal and a complete image signal from a single exposure time period. The overflow image signals and the complete image signals from the pixels may be used to generate a high dynamic range image. While the floating diffusion region in each pixel is not in use, control circuitry may control that pixel to generate a reference signal at the floating diffusion region indicative of pixel-specific dark signal noise. Processing circuitry may mitigate for dark signal non-uniformity across the pixels by correcting the complete image signals using the reference signal to remove dark signal noise in the complete image signals.
    Type: Grant
    Filed: October 23, 2019
    Date of Patent: July 13, 2021
    Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Minseok Oh, Tomas Geurts, Richard Scott Johnson, Kai Shen