Patents by Inventor Tomas Manuel Reiter

Tomas Manuel Reiter has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11978684
    Abstract: A power semiconductor module includes: an electrically insulative frame having opposite first and second mounting sides, and a border that defines a periphery of the electrically insulative frame; a first substrate seated in the electrically insulative frame; a plurality of power semiconductor dies attached to the first substrate; a plurality of signal pins attached to the first substrate and electrically connected to the power semiconductor dies; a plurality of busbars attached to the first substrate and extending through the border of the electrically insulative frame; a plurality of fixing positions at the first mounting side of the electrically insulative frame; and a plurality of electrically insulative protrusions jutting out from the second mounting side of the electrically insulative frame, wherein the protrusions are vertically aligned with the fixing positions.
    Type: Grant
    Filed: June 29, 2021
    Date of Patent: May 7, 2024
    Assignee: Infineon Technologies AG
    Inventors: Tomas Manuel Reiter, Peter Bayer, Christoph Koch
  • Patent number: 11935875
    Abstract: A power semiconductor module arrangement includes a power electronics substrate comprising a first DC voltage pad, a second DC voltage pad, a first load pad, and a second load pad, first and second transistor dies mounted on the first load pad, third and fourth transistor dies mounted the first DC voltage pad, the first and second transistor dies collectively form a first switch, the third and fourth transistor dies collectively form a second switch, the first and second DC voltage pads are arranged such that a DC supply impedance for a first commutation loop that flows through the first and third transistor dies matches a DC supply impedance for a second commutation loop that flows through the second and fourth transistor dies, and an impedance of a first load connection to the third transistor die is greater than an impedance of a second load connection to the fourth transistor die.
    Type: Grant
    Filed: November 30, 2021
    Date of Patent: March 19, 2024
    Assignee: Infineon Technologies AG
    Inventors: Tomas Manuel Reiter, Waldemar Jakobi, Michael Niendorf
  • Patent number: 11937413
    Abstract: A power electronics module includes at least one first substrate having on a first side one or more first semiconductor dies, the one or more first semiconductor dies and the at least one first substrate providing a higher power part of the power electronics module, at least one second substrate having on a first side one or more second semiconductor dies, the one or more second semiconductor dies and the at least one second substrate providing a lower power part of the power electronics module, and a common frame at least partially encasing the first and second substrates and being a monobloc part, the higher power part being configured for direct liquid cooling and the lower power part being configured for indirect cooling.
    Type: Grant
    Filed: February 18, 2022
    Date of Patent: March 19, 2024
    Assignee: Infineon Technologies AG
    Inventors: Tomas Manuel Reiter, Elvis Keli
  • Patent number: 11901883
    Abstract: Overload detection and protection for power switch circuits. For circuits with faster switching speed, fast fault detection and response to a detected overload condition may be desirable. Detection circuitry may monitor a voltage on the control terminal of one or more power switches. Based on empirical measurements, in an overload condition of a power switch circuit, e.g., a half-bridge circuit, the voltage at the control terminal may increase, and in some examples, increase to a magnitude that is greater than a supply voltage. A comparator may detect a voltage increase that exceeds a voltage magnitude threshold, output an indication to control circuitry for the power switch circuit, and the control circuitry may take action to protect the rest of the circuitry, such as reduce voltage or shut off the power switch circuit.
    Type: Grant
    Filed: November 29, 2021
    Date of Patent: February 13, 2024
    Assignee: Infineon Technologies AG
    Inventors: Michael Krug, Marco Bachhuber, Marcus Nuebling, Tomas Manuel Reiter
  • Patent number: 11874303
    Abstract: A power semiconductor module includes: an electrically insulative frame having opposite mounting sides and a border wall that defines a periphery of the frame; a substrate seated in the frame; power semiconductor dies attached to the substrate; signal pins attached to the substrate and electrically connected to the power semiconductor dies; a busbar attached to the substrate and extending through the border wall; a receptacle in the border wall configured to receive a current sensor module and that exposes part of the busbar, the exposed part of the busbar having an opening; and a rotation bar jutting out from a sidewall of the receptacle and onto the exposed part of the busbar without obstructing the opening in the busbar, wherein the rotation bar forms an axis of rotation within the receptacle. A power electronic assembly that incorporates the power semiconductor module and corresponding method of production are also described.
    Type: Grant
    Filed: July 6, 2021
    Date of Patent: January 16, 2024
    Assignee: Infineon Technologies AG
    Inventors: Tomas Manuel Reiter, Christoph Koch, Dietmar Spitzer
  • Patent number: 11863186
    Abstract: This disclosure describes circuits and techniques for identifying potential problems with control signals for power switches. More specifically, this disclosure describes the use of registers, e.g., volatile or non-volatile storage elements, configured to count the rising and/or falling edges of pulse modulation (PM) signals within driver circuits or other control circuits. By counting the edges of PM signals within driver circuits, signaling problems can be identified based on mismatch between different counters. The techniques may be used by a driver circuit to detect circuit problems, or readout of the registers can be done after device failure, in order to help identify whether signaling problems may have caused the device failure.
    Type: Grant
    Filed: March 24, 2022
    Date of Patent: January 2, 2024
    Assignee: Infineon Technologies AG
    Inventors: Tomas Manuel Reiter, Michael Krug, Marco Bachhuber
  • Patent number: 11799026
    Abstract: A semiconductor die includes: a SiC substrate; power and current sense transistors integrated in the substrate such that the current sense transistor mirrors current flow in the main power transistor; a gate terminal electrically connected to gate electrodes of both transistors; a drain terminal electrically connected to a drain region in the substrate and which is common to both transistors; a source terminal electrically connected to source and body regions of the power transistor; a dual mode sense terminal; and a doped resistor region in the substrate between the transistors. The dual mode sense terminal is electrically connected to source and body regions of the current sense transistor. The doped resistor region has a same conductivity type as the body regions of both transistors and is configured as a temperature sense resistor that electrically connects the source terminal to the dual mode sense terminal.
    Type: Grant
    Filed: February 22, 2021
    Date of Patent: October 24, 2023
    Assignee: Infineon Technologies AG
    Inventors: Dethard Peters, Sascha Axel Baier, Tomas Manuel Reiter, Sandeep Walia, Frank Wolter
  • Patent number: 11778735
    Abstract: A circuit board includes: an electrically insulating part and an electrically conductive part; at least one semiconductor chip embedded into the electrically insulating part in a part of the circuit board; and a cooling area above and below the at least one semiconductor chip. The electrically conductive part includes a first outer conductive layer on the first surface, a second outer conductive layer on the second surface, and a first inner conductive layer which is electrically connected to the semiconductor chip. The first inner conductive layer is electrically insulated from the first outer conductive layer and from the second outer conductive layer by the electrically insulating part in the cooling area, or is electrically connected to the first outer conductive layer outside the cooling area.
    Type: Grant
    Filed: March 1, 2022
    Date of Patent: October 3, 2023
    Assignee: Infineon Technologies AG
    Inventors: Tomas Manuel Reiter, Mark Nils Muenzer, Andre Uhlemann
  • Publication number: 20230308083
    Abstract: This disclosure describes circuits and techniques for identifying potential problems with control signals for power switches. More specifically, this disclosure describes the use of registers, e.g., volatile or non-volatile storage elements, configured to count the rising and/or falling edges of pulse modulation (PM) signals within driver circuits or other control circuits. By counting the edges of PM signals within driver circuits, signaling problems can be identified based on mismatch between different counters. The techniques may be used by a driver circuit to detect circuit problems, or readout of the registers can be done after device failure, in order to help identify whether signaling problems may have caused the device failure.
    Type: Application
    Filed: March 24, 2022
    Publication date: September 28, 2023
    Inventors: Tomas Manuel Reiter, Michael Krug, Marco Bachhuber
  • Publication number: 20230170892
    Abstract: Overload detection and protection for power switch circuits. For circuits with faster switching speed, fast fault detection and response to a detected overload condition may be desirable. Detection circuitry may monitor a voltage on the control terminal of one or more power switches. Based on empirical measurements, in an overload condition of a power switch circuit, e.g., a half-bridge circuit, the voltage at the control terminal may increase, and in some examples, increase to a magnitude that is greater than a supply voltage. A comparator may detect a voltage increase that exceeds a voltage magnitude threshold, output an indication to control circuitry for the power switch circuit, and the control circuitry may take action to protect the rest of the circuitry, such as reduce voltage or shut off the power switch circuit.
    Type: Application
    Filed: November 29, 2021
    Publication date: June 1, 2023
    Inventors: Michael Krug, Marco Bachhuber, Marcus Nuebling, Tomas Manuel Reiter
  • Publication number: 20230170333
    Abstract: A power semiconductor module arrangement includes a power electronics substrate comprising a first DC voltage pad, a second DC voltage pad, a first load pad, and a second load pad, first and second transistor dies mounted on the first load pad, third and fourth transistor dies mounted the first DC voltage pad, the first and second transistor dies collectively form a first switch, the third and fourth transistor dies collectively form a second switch, the first and second DC voltage pads are arranged such that a DC supply impedance for a first commutation loop that flows through the first and third transistor dies matches a DC supply impedance for a second commutation loop that flows through the second and fourth transistor dies, and an impedance of a first load connection to the third transistor die is greater than an impedance of a second load connection to the fourth transistor die.
    Type: Application
    Filed: November 30, 2021
    Publication date: June 1, 2023
    Inventors: Tomas Manuel Reiter, Waldemar Jakobi, Michael Niendorf
  • Publication number: 20230009758
    Abstract: A power semiconductor module includes: an electrically insulative frame having opposite mounting sides and a border wall that defines a periphery of the frame; a substrate seated in the frame; power semiconductor dies attached to the substrate; signal pins attached to the substrate and electrically connected to the power semiconductor dies; a busbar attached to the substrate and extending through the border wall; a receptable in the border wall configured to receive a current sensor module and that exposes part of the busbar, the exposed part of the busbar having an opening; and a rotation bar jutting out from a sidewall of the receptable and onto the exposed part of the busbar without obstructing the opening in the busbar, wherein the rotation bar forms an axis of rotation within the receptable. A power electronic assembly that incorporates the power semiconductor module and corresponding method of production are also described.
    Type: Application
    Filed: July 6, 2021
    Publication date: January 12, 2023
    Inventors: Tomas Manuel Reiter, Christoph Koch, Dietmar Spitzer
  • Publication number: 20220415730
    Abstract: A power semiconductor module includes: an electrically insulative frame having opposite first and second mounting sides, and a border that defines a periphery of the electrically insulative frame; a first substrate seated in the electrically insulative frame; a plurality of power semiconductor dies attached to the first substrate; a plurality of signal pins attached to the first substrate and electrically connected to the power semiconductor dies; a plurality of busbars attached to the first substrate and extending through the border of the electrically insulative frame; a plurality of fixing positions at the first mounting side of the electrically insulative frame; and a plurality of electrically insulative protrusions jutting out from the second mounting side of the electrically insulative frame, wherein the protrusions are vertically aligned with the fixing positions.
    Type: Application
    Filed: June 29, 2021
    Publication date: December 29, 2022
    Inventors: Tomas Manuel Reiter, Peter Bayer, Christoph Koch
  • Patent number: 11502064
    Abstract: Described is a power semiconductor module that includes: a frame made of an electrically insulative material; a first substrate seated in the frame; a plurality of power semiconductor dies attached to the first substrate; a plurality of signal pins attached to the first substrate and electrically connected to the power semiconductor dies; a busbar extending from the first substrate through a side face of the frame; a current sensor module seated in a receptacle of the frame in sensing proximity of the busbar, the current sensor module including a current sensor attached to a circuit board; and a potting material fixing the current sensor module to the frame such that no air gap is present between the current sensor and the busbar. The potting material contacts the frame and the current sensor. Methods of producing the power semiconductor module are also described.
    Type: Grant
    Filed: February 17, 2021
    Date of Patent: November 15, 2022
    Assignee: Infineon Technologies AG
    Inventors: Tomas Manuel Reiter, Christoph Koch, Mark Nils Muenzer
  • Publication number: 20220287209
    Abstract: A power electronics module includes at least one first substrate having on a first side one or more first semiconductor dies, the one or more first semiconductor dies and the at least one first substrate providing a higher power part of the power electronics module, at least one second substrate having on a first side one or more second semiconductor dies, the one or more second semiconductor dies and the at least one second substrate providing a lower power part of the power electronics module, and a common frame at least partially encasing the first and second substrates and being a monobloc part, the higher power part being configured for direct liquid cooling and the lower power part being configured for indirect cooling.
    Type: Application
    Filed: February 18, 2022
    Publication date: September 8, 2022
    Inventors: Tomas Manuel Reiter, Elvis Keli
  • Publication number: 20220271156
    Abstract: A semiconductor die includes: a SiC substrate; power and current sense transistors integrated in the substrate such that the current sense transistor mirrors current flow in the main power transistor; a gate terminal electrically connected to gate electrodes of both transistors; a drain terminal electrically connected to a drain region in the substrate and which is common to both transistors; a source terminal electrically connected to source and body regions of the power transistor; a dual mode sense terminal; and a doped resistor region in the substrate between the transistors. The dual mode sense terminal is electrically connected to source and body regions of the current sense transistor. The doped resistor region has a same conductivity type as the body regions of both transistors and is configured as a temperature sense resistor that electrically connects the source terminal to the dual mode sense terminal.
    Type: Application
    Filed: February 22, 2021
    Publication date: August 25, 2022
    Inventors: Dethard Peters, Sascha Axel Baier, Tomas Manuel Reiter, Sandeep Walia, Frank Wolter
  • Publication number: 20220262773
    Abstract: Described is a power semiconductor module that includes: a frame made of an electrically insulative material; a first substrate seated in the frame; a plurality of power semiconductor dies attached to the first substrate; a plurality of signal pins attached to the first substrate and electrically connected to the power semiconductor dies; a busbar extending from the first substrate through a side face of the frame; a current sensor module seated in a receptacle of the frame in sensing proximity of the busbar, the current sensor module including a current sensor attached to a circuit board; and a potting material fixing the current sensor module to the frame such that no air gap is present between the current sensor and the busbar. The potting material contacts the frame and the current sensor. Methods of producing the power semiconductor module are also described.
    Type: Application
    Filed: February 17, 2021
    Publication date: August 18, 2022
    Inventors: Tomas Manuel Reiter, Christoph Koch, Mark Nils Muenzer
  • Patent number: 11394378
    Abstract: An integrated circuit comprises a power switch comprising a current path and a current sense node; and a temperature sense circuit internally coupled between the current path and the current sense node.
    Type: Grant
    Filed: March 5, 2018
    Date of Patent: July 19, 2022
    Assignee: INFINEON TECHNOLOGIES AG
    Inventors: Tomas Manuel Reiter, Georg Schinner, Frank Wolter
  • Publication number: 20220183147
    Abstract: A circuit board includes: an electrically insulating part and an electrically conductive part; at least one semiconductor chip embedded into the electrically insulating part in a part of the circuit board; and a cooling area above and below the at least one semiconductor chip. The electrically conductive part includes a first outer conductive layer on the first surface, a second outer conductive layer on the second surface, and a first inner conductive layer which is electrically connected to the semiconductor chip. The first inner conductive layer is electrically insulated from the first outer conductive layer and from the second outer conductive layer by the electrically insulating part in the cooling area, or is electrically connected to the first outer conductive layer outside the cooling area.
    Type: Application
    Filed: March 1, 2022
    Publication date: June 9, 2022
    Inventors: Tomas Manuel Reiter, Mark Nils Muenzer, Andre Uhlemann
  • Patent number: 11340268
    Abstract: A method may include pressing a sensor module onto a control board such that the sensor module is at an initial position where an air gap is present between a module body of the sensor module and the control board such that compliant pins of the sensor module are partially inserted into the control board. The method may include mounting the control board on a power module to cause pins of the power module to be at least partially inserted into the control board and the sensor module to be at least partially inserted in the power module such that a protrusion is through an opening in a busbar. The method may include pressing the control board onto the power module to cause the pins of the power module to be further inserted into the control board, the sensor module to be further inserted in the power module, and the sensor module to be at a final position.
    Type: Grant
    Filed: September 21, 2020
    Date of Patent: May 24, 2022
    Assignee: Infineon Technologies AG
    Inventors: Gerald Wriessnegger, Leo Aichriedler, Tomas Manuel Reiter, Christoph Koch, Andreas Schenk, Johannes Hackl, Volker Thorsten Schmidt